/* construct load address */
memset(addr, 0, sizeof(addr[0]));
- ia32_create_address_mode(addr, ptr, /*force=*/0);
+ ia32_create_address_mode(addr, ptr, 0);
noreg_gp = ia32_new_NoReg_gp(env_cg);
addr->base = addr->base ? be_transform_node(addr->base) : noreg_gp;
addr->mem = be_transform_node(mem);
}
-static void build_address(ia32_address_mode_t *am, ir_node *node)
+static void build_address(ia32_address_mode_t *am, ir_node *node,
+ ia32_create_am_flags_t flags)
{
ir_node *noreg_gp = ia32_new_NoReg_gp(env_cg);
ia32_address_t *addr = &am->addr;
am->am_node = node;
/* construct load address */
- ia32_create_address_mode(addr, ptr, /*force=*/0);
+ ia32_create_address_mode(addr, ptr, flags);
addr->base = addr->base ? be_transform_node(addr->base) : noreg_gp;
addr->index = addr->index ? be_transform_node(addr->index) : noreg_gp;
noreg_gp = ia32_new_NoReg_gp(env_cg);
if (new_op2 == NULL &&
use_am && ia32_use_source_address_mode(block, op2, op1, other_op, flags)) {
- build_address(am, op2);
+ build_address(am, op2, 0);
new_op1 = (op1 == NULL ? NULL : be_transform_node(op1));
if (mode_is_float(mode)) {
new_op2 = ia32_new_NoReg_vfp(env_cg);
use_am &&
ia32_use_source_address_mode(block, op1, op2, other_op, flags)) {
ir_node *noreg;
- build_address(am, op1);
+ build_address(am, op1, 0);
if (mode_is_float(mode)) {
noreg = ia32_new_NoReg_vfp(env_cg);
* 3. Otherwise -> Lea
*/
memset(&addr, 0, sizeof(addr));
- ia32_create_address_mode(&addr, node, /*force=*/1);
+ ia32_create_address_mode(&addr, node, ia32_create_am_force);
add_immediate_op = NULL;
dbgi = get_irn_dbg_info(node);
/* construct load address */
memset(&addr, 0, sizeof(addr));
- ia32_create_address_mode(&addr, ptr, /*force=*/0);
+ ia32_create_address_mode(&addr, ptr, 0);
base = addr.base;
index = addr.index;
return 0;
}
- if (is_Sync(mem)) {
- int i;
-
- for (i = get_Sync_n_preds(mem) - 1; i >= 0; --i) {
- ir_node *const pred = get_Sync_pred(mem, i);
-
- if (is_Proj(pred) && get_Proj_pred(pred) == load)
- continue;
-
- if (get_nodes_block(pred) == block &&
- heights_reachable_in_block(heights, pred, load)) {
- return 0;
- }
- }
- } else {
- /* Store should be attached to the load */
- if (!is_Proj(mem) || get_Proj_pred(mem) != load)
- return 0;
- }
+ if (prevents_AM(block, load, mem))
+ return 0;
+ /* Store should be attached to the load via mem */
+ assert(heights_reachable_in_block(heights, mem, load));
return 1;
}
commutative = (flags & match_commutative) != 0;
if (use_dest_am(src_block, op1, mem, ptr, op2)) {
- build_address(&am, op1);
+ build_address(&am, op1, ia32_create_am_double_use);
new_op = create_immediate_or_transform(op2, 0);
} else if (commutative && use_dest_am(src_block, op2, mem, ptr, op1)) {
- build_address(&am, op2);
+ build_address(&am, op2, ia32_create_am_double_use);
new_op = create_immediate_or_transform(op1, 0);
} else {
return NULL;
ir_node *mem_proj;
ia32_address_mode_t am;
ia32_address_t *addr = &am.addr;
- memset(&am, 0, sizeof(am));
if (!use_dest_am(src_block, op, mem, ptr, NULL))
return NULL;
- build_address(&am, op);
+ memset(&am, 0, sizeof(am));
+ build_address(&am, op, ia32_create_am_double_use);
dbgi = get_irn_dbg_info(node);
block = be_transform_node(src_block);
case iro_Add:
op1 = get_Add_left(val);
op2 = get_Add_right(val);
- if (is_Const_1(op2)) {
- new_node = dest_am_unop(val, op1, mem, ptr, mode,
- new_rd_ia32_IncMem);
- break;
- } else if (is_Const_Minus_1(op2)) {
- new_node = dest_am_unop(val, op1, mem, ptr, mode,
- new_rd_ia32_DecMem);
- break;
+ if (ia32_cg_config.use_incdec) {
+ if (is_Const_1(op2)) {
+ new_node = dest_am_unop(val, op1, mem, ptr, mode, new_rd_ia32_IncMem);
+ break;
+ } else if (is_Const_Minus_1(op2)) {
+ new_node = dest_am_unop(val, op1, mem, ptr, mode, new_rd_ia32_DecMem);
+ break;
+ }
}
new_node = dest_am_binop(val, op1, op2, mem, ptr, mode,
new_rd_ia32_AddMem, new_rd_ia32_AddMem8Bit,
}
new_node = dest_am_binop(val, op1, op2, mem, ptr, mode,
new_rd_ia32_SubMem, new_rd_ia32_SubMem8Bit,
- match_dest_am | match_immediate |
- match_immediate);
+ match_dest_am | match_immediate);
break;
case iro_And:
op1 = get_And_left(val);
}
/**
- * Transform a Store(floatConst).
+ * Transform a Store(floatConst) into a sequence of
+ * integer stores.
*
* @return the created ia32 Store node
*/
return new_node;
}
/**
- * Transforms a normal Store.
+ * Transforms a general (no special case) Store.
*
* @return the created ia32 Store node
*/
-static ir_node *gen_normal_Store(ir_node *node)
+static ir_node *gen_general_Store(ir_node *node)
{
ir_node *val = get_Store_value(node);
ir_mode *mode = get_irn_mode(val);
/* construct store address */
memset(&addr, 0, sizeof(addr));
- ia32_create_address_mode(&addr, ptr, /*force=*/0);
+ ia32_create_address_mode(&addr, ptr, 0);
if (addr.base == NULL) {
addr.base = noreg;
ir_mode *mode = get_irn_mode(val);
if (mode_is_float(mode) && is_Const(val)) {
- int transform;
-
- /* we are storing a floating point constant */
- if (ia32_cg_config.use_sse2) {
- transform = !is_simple_sse_Const(val);
- } else {
- transform = !is_simple_x87_Const(val);
- }
- if (transform)
- return gen_float_const_Store(node, val);
+ /* We can transform every floating const store
+ into a sequence of integer stores.
+ If the constant is already in a register,
+ it would be better to use it, but we don't
+ have this information here. */
+ return gen_float_const_Store(node, val);
}
- return gen_normal_Store(node);
+ return gen_general_Store(node);
}
/**
/* create a new barrier */
arity = get_irn_arity(barrier);
- in = alloca(arity * sizeof(in[0]));
+ in = ALLOCAN(ir_node*, arity);
for (i = 0; i < arity; ++i) {
ir_node *new_in;
long proj = get_Proj_proj(node);
ir_mode *mode = get_irn_mode(node);
ir_node *sse_load;
- const arch_register_class_t *cls;
- ir_node *res;
+ ir_node *res;
/* The following is kinda tricky: If we're using SSE, then we have to
* move the result value of the call in floating point registers to an
/* transform call modes */
if (mode_is_data(mode)) {
- cls = arch_get_irn_reg_class(node, -1);
+ const arch_register_class_t *cls = arch_get_irn_reg_class_out(node);
mode = cls->mode;
}
} else if (proj == pn_be_Call_M_regular) {
proj = pn_ia32_Call_M;
} else {
- arch_register_req_t const *const req = arch_get_register_req(node, BE_OUT_POS(proj));
+ arch_register_req_t const *const req = arch_get_register_req_out(node);
int const n_outs = get_ia32_n_res(new_call);
int i;