xStore, xLoad should have base latency 0
[libfirm] / ir / be / ia32 / ia32_transform.c
index d6447ef..56fce24 100644 (file)
@@ -1878,7 +1878,7 @@ static ir_node *gen_Store(ir_node *node) {
        if(new_op != NULL)
                return new_op;
 
-       /* construct load address */
+       /* construct store address */
        memset(&addr, 0, sizeof(addr));
        ia32_create_address_mode(&addr, ptr, 0);
        base  = addr.base;
@@ -3738,13 +3738,26 @@ static ir_node *gen_ia32_l_IMul(ir_node *node) {
        ir_node *muls = new_rd_ia32_IMul1OP(dbgi, irg, block, noreg, noreg, new_left,
                                        new_right, new_NoMem());
        clear_ia32_commutative(muls);
-       set_ia32_am_support(muls, ia32_am_Source, ia32_am_binary);
 
        SET_IA32_ORIG_NODE(muls, ia32_get_old_node_name(env_cg, node));
 
        return muls;
 }
 
+static ir_node *gen_ia32_Add64Bit(ir_node *node)
+{
+       ir_node  *a_l    = be_transform_node(get_irn_n(node, 0));
+       ir_node  *a_h    = be_transform_node(get_irn_n(node, 1));
+       ir_node  *b_l    = create_immediate_or_transform(get_irn_n(node, 2), 0);
+       ir_node  *b_h    = create_immediate_or_transform(get_irn_n(node, 3), 0);
+       ir_node  *block  = be_transform_node(get_nodes_block(node));
+       dbg_info *dbgi   = get_irn_dbg_info(node);
+       ir_graph *irg    = current_ir_graph;
+       ir_node  *new_op = new_rd_ia32_Add64Bit(dbgi, irg, block, a_l, a_h, b_l, b_h);
+       SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node));
+       return new_op;
+}
+
 /**
  * Transforms a l_ShlD/l_ShrD into a ShlD/ShrD. Those nodes have 3 data inputs:
  * op1 - target to be shifted
@@ -3760,8 +3773,8 @@ static ir_node *gen_lowered_64bit_shifts(ir_node *node, ir_node *op1,
        ir_graph *irg       = current_ir_graph;
        dbg_info *dbgi      = get_irn_dbg_info(node);
        ir_node  *new_op1   = be_transform_node(op1);
-       ir_node  *new_op2   = create_immediate_or_transform(op2, 'I');
-       ir_node  *new_count = be_transform_node(count);
+       ir_node  *new_op2   = be_transform_node(op2);
+       ir_node  *new_count = create_immediate_or_transform(count, 'I');
 
        /* TODO proper AM support */
 
@@ -4426,6 +4439,7 @@ static void register_transformers(void)
        GEN(IJmp);
 
        /* transform ops from intrinsic lowering */
+       GEN(ia32_Add64Bit);
        GEN(ia32_l_Add);
        GEN(ia32_l_Adc);
        GEN(ia32_l_Sub);