added include for harness.c

[libfirm] / ir / be / ia32 / ia32_transform.c

diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c
index 33fcca8..4fa60b1 100644 (file)
--- a/ir/be/ia32/ia32_transform.c
+++ b/ir/be/ia32/ia32_transform.c
@@ -184,11 +184,11 @@ static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2,
        dbg_info          *dbg      = env->dbg;
        ir_graph          *irg      = env->irg;
        ir_node           *block    = env->block;
-       firm_dbg_module_t *mod      = env->mod;
        ir_node           *noreg_gp = ia32_new_NoReg_gp(env->cg);
        ir_node           *noreg_fp = ia32_new_NoReg_fp(env->cg);
        ir_node           *nomem    = new_NoMem();
        ir_node           *expr_op, *imm_op;
+       DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
 
        /* Check if immediate optimization is on and */
        /* if it's an operation with immediate.      */
@@ -275,11 +275,11 @@ static ir_node *gen_shift_binop(ia32_transform_env_t *env, ir_node *op1, ir_node
        dbg_info          *dbg    = env->dbg;
        ir_graph          *irg    = env->irg;
        ir_node           *block  = env->block;
-       firm_dbg_module_t *mod    = env->mod;
        ir_node           *noreg  = ia32_new_NoReg_gp(env->cg);
        ir_node           *nomem  = new_NoMem();
        ir_node           *expr_op, *imm_op;
        tarval            *tv;
+       DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
 
        assert(! mode_is_float(mode) && "Shift/Rotate with float not supported");
 
@@ -345,11 +345,11 @@ static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_
        ir_node           *new_op = NULL;
        ir_mode           *mode   = env->mode;
        dbg_info          *dbg    = env->dbg;
-       firm_dbg_module_t *mod    = env->mod;
        ir_graph          *irg    = env->irg;
        ir_node           *block  = env->block;
        ir_node           *noreg  = ia32_new_NoReg_gp(env->cg);
        ir_node           *nomem  = new_NoMem();
+       DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
 
        new_op = func(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
 
@@ -383,7 +383,6 @@ static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_
 static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
        ir_node                *new_op     = NULL;
        tarval                 *tv         = get_ia32_Immop_tarval(const_op);
-       firm_dbg_module_t      *mod        = env->mod;
        dbg_info               *dbg        = env->dbg;
        ir_graph               *irg        = env->irg;
        ir_node                *block      = env->block;
@@ -391,6 +390,7 @@ static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node
        ir_node                *nomem      = new_NoMem();
        int                     normal_add = 1;
        tarval_classification_t class_tv, class_negtv;
+       DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
 
        /* try to optimize to inc/dec  */
        if (env->cg->opt.incdec && tv) {
@@ -704,7 +704,6 @@ static ir_node *gen_Min(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
 static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
        ir_node                *new_op     = NULL;
        tarval                 *tv         = get_ia32_Immop_tarval(const_op);
-       firm_dbg_module_t      *mod        = env->mod;
        dbg_info               *dbg        = env->dbg;
        ir_graph               *irg        = env->irg;
        ir_node                *block      = env->block;
@@ -712,6 +711,7 @@ static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node
        ir_node                *nomem      = new_NoMem();
        int                     normal_sub = 1;
        tarval_classification_t class_tv, class_negtv;
+       DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
 
        /* try to optimize to inc/dec  */
        if (env->cg->opt.incdec && tv) {
@@ -1241,32 +1241,39 @@ static ir_node *gen_Load(ia32_transform_env_t *env) {
        ir_node    *node  = env->irn;
        ir_node    *noreg = ia32_new_NoReg_gp(env->cg);
        ir_node    *ptr   = get_Load_ptr(node);
+       ir_node    *lptr  = ptr;
        ir_mode    *mode  = get_Load_mode(node);
-       const char *offs  = NULL;
+       int        is_imm = 0;
        ir_node *new_op;
        ia32_am_flavour_t am_flav = ia32_B;
 
        /* address might be a constant (symconst or absolute address) */
        if (is_ia32_Const(ptr)) {
-               offs = get_ia32_cnst(ptr);
-               ptr  = noreg;
+               lptr   = noreg;
+               is_imm = 1;
        }
 
        if (mode_is_float(mode)) {
                if (USE_SSE2(env->cg))
-                       new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+                       new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
                else {
                        env->cg->used_x87 = 1;
-                       new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+                       new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
                }
        }
        else {
-               new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+               new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
        }
 
        /* base is an constant address */
-       if (offs) {
-               add_ia32_am_offs(new_op, offs);
+       if (is_imm) {
+               if (get_ia32_immop_type(ptr) == ia32_ImmSymConst) {
+                       set_ia32_am_sc(new_op, get_ia32_id_cnst(ptr));
+               }
+               else {
+                       add_ia32_am_offs(new_op, get_ia32_cnst(ptr));
+               }
+
                am_flav = ia32_O;
        }
 
@@ -1296,13 +1303,14 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
        ir_node *noreg   = ia32_new_NoReg_gp(env->cg);
        ir_node *val     = get_Store_value(node);
        ir_node *ptr     = get_Store_ptr(node);
+       ir_node *sptr    = ptr;
        ir_node *mem     = get_Store_mem(node);
        ir_mode *mode    = get_irn_mode(val);
        ir_node *sval    = val;
-       const char *offs = NULL;
+       int      is_imm  = 0;
        ir_node *new_op;
        ia32_am_flavour_t am_flav = ia32_B;
-  ia32_immop_type_t immop   = ia32_ImmNone;
+       ia32_immop_type_t immop   = ia32_ImmNone;
 
        if (! mode_is_float(mode)) {
                /* in case of storing a const (but not a symconst) -> make it an attribute */
@@ -1323,20 +1331,20 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
 
        /* address might be a constant (symconst or absolute address) */
        if (is_ia32_Const(ptr)) {
-               offs = get_ia32_cnst(ptr);
-               ptr  = noreg;
+               sptr   = noreg;
+               is_imm = 0;
        }
 
        if (mode_is_float(mode)) {
                if (USE_SSE2(env->cg))
-                       new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+                       new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
                else {
                        env->cg->used_x87 = 1;
-                       new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+                       new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
                }
        }
        else if (get_mode_size_bits(mode) == 8) {
-               new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+               new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
        }
        else {
                new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
@@ -1348,8 +1356,14 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
        }
 
        /* base is an constant address */
-       if (offs) {
-               add_ia32_am_offs(new_op, offs);
+       if (is_imm) {
+               if (get_ia32_immop_type(ptr) == ia32_ImmSymConst) {
+                       set_ia32_am_sc(new_op, get_ia32_id_cnst(ptr));
+               }
+               else {
+                       add_ia32_am_offs(new_op, get_ia32_cnst(ptr));
+               }
+
                am_flav = ia32_O;
        }
 
@@ -1612,8 +1626,8 @@ static ir_node *gen_Conv(ia32_transform_env_t *env, ir_node *op) {
        ir_node           *new_op   = NULL;
        ir_node           *noreg    = ia32_new_NoReg_gp(env->cg);
        ir_node           *nomem    = new_rd_NoMem(irg);
-       firm_dbg_module_t *mod      = env->mod;
        ir_node           *proj;
+       DEBUG_ONLY(firm_dbg_module_t *mod = env->mod;)
 
        if (src_mode == tgt_mode) {
                /* this can happen when changing mode_P to mode_Is */
@@ -1880,7 +1894,7 @@ void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg) {
        tenv.dbg      = get_irn_dbg_info(irn);
        tenv.irg      = cg->irg;
        tenv.irn      = irn;
-       tenv.mod      = cg->mod;
+       DEBUG_ONLY(tenv.mod      = cg->mod;)
        tenv.mode     = get_ia32_res_mode(irn);
        tenv.cg       = cg;
 
@@ -1963,7 +1977,7 @@ void ia32_transform_lea_to_add(ir_node *irn, ia32_code_gen_t *cg) {
        tenv.dbg   = get_irn_dbg_info(irn);
        tenv.irg   = cg->irg;
        tenv.irn   = irn;
-       tenv.mod   = cg->mod;
+       DEBUG_ONLY(tenv.mod   = cg->mod;)
        tenv.mode  = get_irn_mode(irn);
        tenv.cg    = cg;
 
@@ -2055,7 +2069,7 @@ void ia32_transform_node(ir_node *node, void *env) {
        tenv.dbg      = get_irn_dbg_info(node);
        tenv.irg      = current_ir_graph;
        tenv.irn      = node;
-       tenv.mod      = cgenv->mod;
+       DEBUG_ONLY(tenv.mod      = cgenv->mod;)
        tenv.mode     = get_irn_mode(node);
        tenv.cg       = cgenv;