#include "gen_ia32_regalloc_if.h"
-#ifdef NDEBUG
-#define SET_IA32_ORIG_NODE(n, o)
-#else
-#define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o);
-#endif /* NDEBUG */
-
-
#define SFP_SIGN "0x80000000"
#define DFP_SIGN "0x8000000000000000"
#define SFP_ABS "0x7FFFFFFF"
/**
* Prints the old node name on cg obst and returns a pointer to it.
*/
-const char *get_old_node_name(ia32_transform_env_t *env) {
+const char *ia32_get_old_node_name(ia32_transform_env_t *env) {
ia32_isa_t *isa = (ia32_isa_t *)env->cg->arch_env->isa;
lc_eoprintf(firm_get_arg_env(), isa->name_obst, "%+F", env->irn);
}
}
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
/* set AM support */
set_ia32_am_support(new_op, ia32_am_Dest);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
+ set_ia32_emit_cl(new_op);
return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
}
set_ia32_am_support(new_op, ia32_am_Dest);
}
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
if (USE_SSE2(env->cg))
return gen_binop(env, op1, op2, new_rd_ia32_fAdd);
else {
+ env->cg->used_x87 = 1;
return gen_binop(env, op1, op2, new_rd_ia32_vfadd);
}
}
/* No expr_op means, that we have two const - one symconst and */
/* one tarval or another symconst - because this case is not */
/* covered by constant folding */
+ /* We need to check for: */
+ /* 1) symconst + const -> becomes a LEA */
+ /* 2) symconst + symconst -> becomes a const + LEA as the elf */
+ /* linker doesn't support two symconsts */
+
+ if (get_ia32_op_type(op1) == ia32_SymConst && get_ia32_op_type(op2) == ia32_SymConst) {
+ /* this is the 2nd case */
+ new_op = new_rd_ia32_Lea(dbg, irg, block, op1, noreg, mode);
+ set_ia32_am_sc(new_op, get_ia32_id_cnst(op2));
+ set_ia32_am_flavour(new_op, ia32_am_OB);
+ }
+ else {
+ /* this is the 1st case */
+ new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
- new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
- add_ia32_am_offs(new_op, get_ia32_cnst(op1));
- add_ia32_am_offs(new_op, get_ia32_cnst(op2));
+ if (get_ia32_op_type(op1) == ia32_SymConst) {
+ set_ia32_am_sc(new_op, get_ia32_id_cnst(op1));
+ add_ia32_am_offs(new_op, get_ia32_cnst(op2));
+ }
+ else {
+ add_ia32_am_offs(new_op, get_ia32_cnst(op1));
+ set_ia32_am_sc(new_op, get_ia32_id_cnst(op2));
+ }
+ set_ia32_am_flavour(new_op, ia32_am_O);
+ }
/* set AM support */
set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
- set_ia32_am_flavour(new_op, ia32_am_O);
/* Lea doesn't need a Proj */
return new_op;
}
}
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
if (mode_is_float(env->mode)) {
if (USE_SSE2(env->cg))
new_op = gen_binop(env, op1, op2, new_rd_ia32_fMul);
- else
+ else {
+ env->cg->used_x87 = 1;
new_op = gen_binop(env, op1, op2, new_rd_ia32_vfmul);
+ }
}
else {
new_op = gen_binop(env, op1, op2, new_rd_ia32_Mul);
ir_node *new_op;
if (mode_is_float(env->mode)) {
- new_op = gen_binop(env, op1, op2, new_rd_ia32_fMax);
+ if (USE_SSE2(env->cg))
+ new_op = gen_binop(env, op1, op2, new_rd_ia32_fMax);
+ else {
+ env->cg->used_x87 = 1;
+ assert(0);
+ }
}
else {
new_op = new_rd_ia32_Max(env->dbg, env->irg, env->block, op1, op2, env->mode);
set_ia32_am_support(new_op, ia32_am_None);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
}
return new_op;
ir_node *new_op;
if (mode_is_float(env->mode)) {
- new_op = gen_binop(env, op1, op2, new_rd_ia32_fMin);
+ if (USE_SSE2(env->cg))
+ new_op = gen_binop(env, op1, op2, new_rd_ia32_fMin);
+ else {
+ env->cg->used_x87 = 1;
+ assert(0);
+ }
}
else {
new_op = new_rd_ia32_Min(env->dbg, env->irg, env->block, op1, op2, env->mode);
set_ia32_am_support(new_op, ia32_am_None);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
}
return new_op;
if (mode_is_float(mode)) {
if (USE_SSE2(env->cg))
return gen_binop(env, op1, op2, new_rd_ia32_fSub);
- else
+ else {
+ env->cg->used_x87 = 1;
return gen_binop(env, op1, op2, new_rd_ia32_vfsub);
+ }
}
else {
/* integer SUB */
/* No expr_op means, that we have two const - one symconst and */
/* one tarval or another symconst - because this case is not */
/* covered by constant folding */
+ /* We need to check for: */
+ /* 1) symconst + const -> becomes a LEA */
+ /* 2) symconst + symconst -> becomes a const + LEA as the elf */
+ /* linker doesn't support two symconsts */
+
+ if (get_ia32_op_type(op1) == ia32_SymConst && get_ia32_op_type(op2) == ia32_SymConst) {
+ /* this is the 2nd case */
+ new_op = new_rd_ia32_Lea(dbg, irg, block, op1, noreg, mode);
+ set_ia32_am_sc(new_op, get_ia32_id_cnst(op2));
+ set_ia32_am_sc_sign(new_op);
+ set_ia32_am_flavour(new_op, ia32_am_OB);
+ }
+ else {
+ /* this is the 1st case */
+ new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
- new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
- add_ia32_am_offs(new_op, get_ia32_cnst(op1));
- sub_ia32_am_offs(new_op, get_ia32_cnst(op2));
+ if (get_ia32_op_type(op1) == ia32_SymConst) {
+ set_ia32_am_sc(new_op, get_ia32_id_cnst(op1));
+ sub_ia32_am_offs(new_op, get_ia32_cnst(op2));
+ }
+ else {
+ add_ia32_am_offs(new_op, get_ia32_cnst(op1));
+ set_ia32_am_sc(new_op, get_ia32_id_cnst(op2));
+ set_ia32_am_sc_sign(new_op);
+ }
+ set_ia32_am_flavour(new_op, ia32_am_O);
+ }
/* set AM support */
set_ia32_am_support(new_op, ia32_am_Source);
set_ia32_op_type(new_op, ia32_AddrModeS);
- set_ia32_am_flavour(new_op, ia32_am_O);
/* Lea doesn't need a Proj */
return new_op;
}
}
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep);
}
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode_Is);
set_ia32_am_support(new_op, ia32_am_Source);
}
set_ia32_res_mode(new_op, get_irn_mode(get_proj_for_pn(env->irn, pn_Quot_res)));
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
set_ia32_sc(new_op, name);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, env->mode);
set_ia32_immop_type(new_op, ia32_ImmSymConst);
new_op = new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
}
else {
+ env->cg->used_x87 = 1;
new_op = new_rd_ia32_vfchs(env->dbg, env->irg, env->block, op, env->mode);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
}
}
else {
set_ia32_sc(res, name);
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode);
set_ia32_immop_type(res, ia32_ImmSymConst);
res = new_rd_Proj(dbg, irg, block, res, mode, 0);
}
else {
+ env->cg->used_x87 = 1;
res = new_rd_ia32_vfabs(dbg, irg, block, op, mode);
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
}
}
else {
res = new_rd_ia32_Cdq(dbg, irg, block, op, mode_T);
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode);
p_eax = new_rd_Proj(dbg, irg, block, res, mode, pn_EAX);
p_edx = new_rd_Proj(dbg, irg, block, res, mode, pn_EDX);
res = new_rd_ia32_Eor(dbg, irg, block, noreg_gp, noreg_gp, p_eax, p_edx, nomem, mode_T);
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode);
res = new_rd_Proj(dbg, irg, block, res, mode, 0);
res = new_rd_ia32_Sub(dbg, irg, block, noreg_gp, noreg_gp, res, p_edx, nomem, mode_T);
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode);
res = new_rd_Proj(dbg, irg, block, res, mode, 0);
ir_node *node = env->irn;
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
ir_node *ptr = get_Load_ptr(node);
+ ir_node *lptr = ptr;
ir_mode *mode = get_Load_mode(node);
- const char *offs = NULL;
+ int is_imm = 0;
ir_node *new_op;
ia32_am_flavour_t am_flav = ia32_B;
/* address might be a constant (symconst or absolute address) */
if (is_ia32_Const(ptr)) {
- offs = get_ia32_cnst(ptr);
- ptr = noreg;
+ lptr = noreg;
+ is_imm = 1;
}
if (mode_is_float(mode)) {
if (USE_SSE2(env->cg))
- new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
- else
- new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+ new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
+ else {
+ env->cg->used_x87 = 1;
+ new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
+ }
}
else {
- new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+ new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
}
/* base is an constant address */
- if (offs) {
- add_ia32_am_offs(new_op, offs);
+ if (is_imm) {
+ if (get_ia32_immop_type(ptr) == ia32_ImmSymConst) {
+ set_ia32_am_sc(new_op, get_ia32_id_cnst(ptr));
+ }
+ else {
+ add_ia32_am_offs(new_op, get_ia32_cnst(ptr));
+ }
+
am_flav = ia32_O;
}
set_ia32_am_flavour(new_op, am_flav);
set_ia32_ls_mode(new_op, mode);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
ir_node *val = get_Store_value(node);
ir_node *ptr = get_Store_ptr(node);
+ ir_node *sptr = ptr;
ir_node *mem = get_Store_mem(node);
ir_mode *mode = get_irn_mode(val);
ir_node *sval = val;
- const char *offs = NULL;
+ int is_imm = 0;
ir_node *new_op;
ia32_am_flavour_t am_flav = ia32_B;
- ia32_immop_type_t immop = ia32_ImmNone;
-
- /* in case of storing a const (but not a symconst) -> make it an attribute */
- if (is_ia32_Cnst(val)) {
- switch (get_ia32_op_type(val)) {
- case ia32_Const:
- immop = ia32_ImmConst;
- break;
- case ia32_SymConst:
- immop = ia32_ImmSymConst;
- break;
- default:
- assert(0 && "unsupported Const type");
+ ia32_immop_type_t immop = ia32_ImmNone;
+
+ if (! mode_is_float(mode)) {
+ /* in case of storing a const (but not a symconst) -> make it an attribute */
+ if (is_ia32_Cnst(val)) {
+ switch (get_ia32_op_type(val)) {
+ case ia32_Const:
+ immop = ia32_ImmConst;
+ break;
+ case ia32_SymConst:
+ immop = ia32_ImmSymConst;
+ break;
+ default:
+ assert(0 && "unsupported Const type");
+ }
+ sval = noreg;
}
- sval = noreg;
}
/* address might be a constant (symconst or absolute address) */
if (is_ia32_Const(ptr)) {
- offs = get_ia32_cnst(ptr);
- ptr = noreg;
+ sptr = noreg;
+ is_imm = 0;
}
if (mode_is_float(mode)) {
if (USE_SSE2(env->cg))
- new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
- else
- new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+ new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
+ else {
+ env->cg->used_x87 = 1;
+ new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
+ }
}
else if (get_mode_size_bits(mode) == 8) {
- new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+ new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
}
else {
new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
}
/* stored const is an attribute (saves a register) */
- if (is_ia32_Cnst(val)) {
+ if (! mode_is_float(mode) && is_ia32_Cnst(val)) {
set_ia32_Immop_attr(new_op, val);
}
/* base is an constant address */
- if (offs) {
- add_ia32_am_offs(new_op, offs);
+ if (is_imm) {
+ if (get_ia32_immop_type(ptr) == ia32_ImmSymConst) {
+ set_ia32_am_sc(new_op, get_ia32_id_cnst(ptr));
+ }
+ else {
+ add_ia32_am_offs(new_op, get_ia32_cnst(ptr));
+ }
+
am_flav = ia32_O;
}
set_ia32_ls_mode(new_op, get_irn_mode(val));
set_ia32_immop_type(new_op, immop);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
}
res = new_rd_ia32_TestJmp(dbg, irg, block, op1, op2, mode_T);
set_ia32_pncode(res, get_Proj_proj(sel));
+ set_ia32_res_mode(res, get_irn_mode(op1));
if (cnst) {
copy_ia32_Immop_attr(res, and);
}
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
return res;
}
}
if (mode_is_float(get_irn_mode(expr))) {
- res = new_rd_ia32_fCondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
+ if (USE_SSE2(env->cg))
+ res = new_rd_ia32_fCondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
+ else {
+ env->cg->used_x87 = 1;
+ assert(0);
+ }
}
else {
res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
}
set_ia32_Immop_attr(res, cnst);
+ set_ia32_res_mode(res, get_irn_mode(expr));
}
else {
if (mode_is_float(get_irn_mode(cmp_a))) {
- res = new_rd_ia32_fCondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
+ if (USE_SSE2(env->cg))
+ res = new_rd_ia32_fCondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
+ else {
+ env->cg->used_x87 = 1;
+ assert(0);
+ }
}
else {
res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
}
+ set_ia32_res_mode(res, get_irn_mode(cmp_a));
}
set_ia32_pncode(res, get_Proj_proj(sel));
else {
res = new_rd_ia32_SwitchJmp(dbg, irg, block, sel, mode_T);
set_ia32_pncode(res, get_Cond_defaultProj(node));
+ set_ia32_res_mode(res, get_irn_mode(sel));
}
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
return res;
}
set_ia32_immop_type(res, ia32_ImmConst);
}
- SET_IA32_ORIG_NODE(res, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
return res;
}
ir_node *new_op = new_rd_ia32_CMov(env->dbg, env->irg, env->block, \
get_Mux_sel(node), get_Mux_false(node), get_Mux_true(node), env->mode);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
* FLOAT -> FLOAT
* ================
* SSE(1/2) convert from float or double to double or float (cvtss/sd2sd/ss)
+ * x87 is mode_E internally, conversions happen only at load and store
+ * in non-strict semantic
*/
//static ir_node *gen_int_downscale_conv(ia32_transform_env_t *env, ir_node *op,
// proj = new_rd_Proj(dbg, irg, block, new_op, src_mode, 0);
// set_ia32_Immop_tarval(new_op, new_tarval_from_long(n - m, mode_Is));
// set_ia32_am_support(new_op, ia32_am_Source);
-// SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+// SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
// /* ASHR Sn, n - m */
// new_op = new_rd_ia32_Shrs(dbg, irg, block, noreg, noreg, proj, noreg, nomem, mode_T);
// set_ia32_Immop_tarval(new_op, new_tarval_from_long(n - m, mode_Is));
/* we convert from float ... */
if (mode_is_float(tgt_mode)) {
/* ... to float */
- DB((mod, LEVEL_1, "create Conv(float, float) ..."));
- new_op = new_rd_ia32_Conv_FP2FP(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
+ if (USE_SSE2(env->cg)) {
+ DB((mod, LEVEL_1, "create Conv(float, float) ..."));
+ new_op = new_rd_ia32_Conv_FP2FP(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
+ }
+ else {
+ DB((mod, LEVEL_1, "killed Conv(float, float) ..."));
+ edges_reroute(env->irn, op, irg);
+ }
}
else {
/* ... to int */
new_op = new_rd_ia32_Conv_FP2I(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
/* if target mode is not int: add an additional downscale convert */
if (tgt_bits < 32) {
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, tgt_mode);
set_ia32_am_support(new_op, ia32_am_Source);
}
if (new_op) {
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, tgt_mode);
set_ia32_am_support(new_op, ia32_am_Source);
if (mode_is_float(mode)) {
if (USE_SSE2(env->cg))
new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
- else
+ else {
+ env->cg->used_x87 = 1;
new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
+ }
}
else {
new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
set_ia32_am_flavour(new_op, ia32_B);
set_ia32_ls_mode(new_op, mode);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_rd_Proj(env->dbg, env->irg, env->block, new_op, mode, 0);
}
set_ia32_use_frame(new_op);
set_ia32_immop_type(new_op, ia32_ImmConst);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
}
if (mode_is_float(mode)) {
if (USE_SSE2(env->cg))
new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
- else
+ else {
+ env->cg->used_x87 = 1;
new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
+ }
}
else {
new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
set_ia32_am_flavour(new_op, ia32_B);
set_ia32_ls_mode(new_op, mode);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
if (mode_is_float(mode)) {
if (USE_SSE2(env->cg))
new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, val, mem, mode_T);
- else
+ else {
+ env->cg->used_x87 = 1;
new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, val, mem, mode_T);
+ }
}
else if (get_mode_size_bits(mode) == 8) {
new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, val, mem, mode_T);
set_ia32_am_flavour(new_op, ia32_B);
set_ia32_ls_mode(new_op, mode);
- SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
set_ia32_am_support(res, ia32_am_Full);
}
- SET_IA32_ORIG_NODE(res, get_old_node_name(&tenv));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(&tenv));
/* copy register */
slots = get_ia32_slots(res);
slots[0] = in2_reg;
set_ia32_immop_type(res, ia32_ImmConst);
}
- SET_IA32_ORIG_NODE(res, get_old_node_name(&tenv));
+ SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(&tenv));
/* add Add to schedule */
sched_add_before(irn, res);
projects / libfirm / blobdiff