*/
static ir_node *gen_Not(ir_node *node)
{
- ir_node *op = get_Not_op(node);
+ ir_node *op = get_Not_op(node);
assert(get_irn_mode(node) != mode_b); /* should be lowered already */
assert (! mode_is_float(get_irn_mode(node)));
}
flags = be_transform_node(pred);
*pnc_out = pnc;
+ if (mode_is_float(get_irn_mode(get_Cmp_left(pred))))
+ *pnc_out |= ia32_pn_Cmp_float;
return flags;
}
}
return new_node;
}
+static pn_Cmp ia32_get_negated_pnc(pn_Cmp pnc)
+{
+ ir_mode *mode = pnc & ia32_pn_Cmp_float ? mode_F : mode_Iu;
+ return get_negated_pnc(pnc, mode);
+}
+
static ir_node *try_create_SetMem(ir_node *node, ir_node *ptr, ir_node *mem)
{
- ir_mode *mode = get_irn_mode(node);
- ir_node *mux_true = get_Mux_true(node);
- ir_node *mux_false = get_Mux_false(node);
- ir_node *cond;
- ir_node *new_mem;
- dbg_info *dbgi;
- ir_node *block;
- ir_node *new_block;
- ir_node *flags;
- ir_node *new_node;
- int negated;
- pn_Cmp pnc;
- ia32_address_t addr;
+ ir_mode *mode = get_irn_mode(node);
+ ir_node *mux_true = get_Mux_true(node);
+ ir_node *mux_false = get_Mux_false(node);
+ ir_node *cond;
+ ir_node *new_mem;
+ dbg_info *dbgi;
+ ir_node *block;
+ ir_node *new_block;
+ ir_node *flags;
+ ir_node *new_node;
+ bool negated;
+ pn_Cmp pnc;
+ ia32_address_t addr;
if (get_mode_size_bits(mode) != 8)
return NULL;
if (is_Const_1(mux_true) && is_Const_0(mux_false)) {
- negated = 0;
+ negated = false;
} else if (is_Const_0(mux_true) && is_Const_1(mux_false)) {
- negated = 1;
+ negated = true;
} else {
return NULL;
}
+ cond = get_Mux_sel(node);
+ flags = get_flags_node(cond, &pnc);
+ /* we can't handle the float special cases with SetM */
+ if (pnc & ia32_pn_Cmp_float)
+ return NULL;
+ if (negated)
+ pnc = ia32_get_negated_pnc(pnc);
+
build_address_ptr(&addr, ptr, mem);
dbgi = get_irn_dbg_info(node);
block = get_nodes_block(node);
new_block = be_transform_node(block);
- cond = get_Mux_sel(node);
- flags = get_flags_node(cond, &pnc);
new_mem = be_transform_node(mem);
- new_node = new_bd_ia32_SetMem(dbgi, new_block, addr.base,
- addr.index, addr.mem, flags, pnc, negated);
+ new_node = new_bd_ia32_SetccMem(dbgi, new_block, addr.base,
+ addr.index, addr.mem, flags, pnc);
set_address(new_node, &addr);
set_ia32_op_type(new_node, ia32_AddrModeD);
set_ia32_ls_mode(new_node, mode);
case iro_Mux:
new_node = try_create_SetMem(val, ptr, mem);
break;
+
case iro_Minus:
op1 = get_Minus_op(val);
new_node = dest_am_unop(val, op1, mem, ptr, mode, new_bd_ia32_NegMem);
match_arguments(&am, block, val_false, val_true, flags,
match_commutative | match_am | match_16bit_am | match_mode_neutral);
- new_node = new_bd_ia32_CMov(dbgi, new_block, addr->base, addr->index,
- addr->mem, am.new_op1, am.new_op2, new_flags,
- am.ins_permuted, pnc);
+ if (am.ins_permuted)
+ pnc = ia32_get_negated_pnc(pnc);
+
+ new_node = new_bd_ia32_CMovcc(dbgi, new_block, addr->base, addr->index,
+ addr->mem, am.new_op1, am.new_op2, new_flags,
+ pnc);
set_am_attributes(new_node, &am);
SET_IA32_ORIG_NODE(new_node, node);
* Creates a ia32 Setcc instruction.
*/
static ir_node *create_set_32bit(dbg_info *dbgi, ir_node *new_block,
- ir_node *flags, pn_Cmp pnc, ir_node *orig_node,
- int ins_permuted)
+ ir_node *flags, pn_Cmp pnc,
+ ir_node *orig_node)
{
ir_mode *mode = get_irn_mode(orig_node);
ir_node *new_node;
- new_node = new_bd_ia32_Set(dbgi, new_block, flags, pnc, ins_permuted);
+ new_node = new_bd_ia32_Setcc(dbgi, new_block, flags, pnc);
SET_IA32_ORIG_NODE(new_node, orig_node);
/* we might need to conv the result up */
/**
* Create instruction for an unsigned Difference or Zero.
*/
-static ir_node *create_Doz(ir_node *psi, ir_node *a, ir_node *b)
+static ir_node *create_doz(ir_node *psi, ir_node *a, ir_node *b)
{
- ir_mode *mode = get_irn_mode(psi);
- ir_node *new_node, *sub, *sbb, *eflags, *block;
+ ir_mode *mode = get_irn_mode(psi);
+ ir_node *new_node;
+ ir_node *sub;
+ ir_node *sbb;
+ ir_node *not;
+ ir_node *eflags;
+ ir_node *block;
dbg_info *dbgi;
dbgi = get_irn_dbg_info(psi);
sbb = new_bd_ia32_Sbb0(dbgi, block, eflags);
+ not = new_bd_ia32_Not(dbgi, block, sbb);
- new_node = new_bd_ia32_And(dbgi, block, noreg_GP, noreg_GP, nomem, new_node, sbb);
+ new_node = new_bd_ia32_And(dbgi, block, noreg_GP, noreg_GP, nomem, new_node, not);
set_ia32_commutative(new_node);
return new_node;
}
}
}
}
+
if (is_Const(mux_true) && is_Const(mux_false)) {
ia32_address_mode_t am;
ir_node *load;
unsigned scale;
flags = get_flags_node(cond, &pnc);
- new_node = create_set_32bit(dbgi, new_block, flags, pnc, node, /*is_permuted=*/0);
+ new_node = create_set_32bit(dbgi, new_block, flags, pnc, node);
if (ia32_cg_config.use_sse2) {
/* cannot load from different mode on SSE */
is_Const_0(mux_false) && is_Sub(mux_true) &&
get_Sub_left(mux_true) == cmp_left && get_Sub_right(mux_true) == cmp_right) {
/* Mux(a >=u b, a - b, 0) unsigned Doz */
- return create_Doz(node, cmp_left, cmp_right);
+ return create_doz(node, cmp_left, cmp_right);
} else if ((pnc & pn_Cmp_Lt) && !mode_is_signed(mode) &&
is_Const_0(mux_true) && is_Sub(mux_false) &&
get_Sub_left(mux_false) == cmp_left && get_Sub_right(mux_false) == cmp_right) {
/* Mux(a <=u b, 0, a - b) unsigned Doz */
- return create_Doz(node, cmp_left, cmp_right);
+ return create_doz(node, cmp_left, cmp_right);
}
}
}
if (is_Const(mux_true) && is_Const(mux_false)) {
/* both are const, good */
if (is_Const_1(mux_true) && is_Const_0(mux_false)) {
- new_node = create_set_32bit(dbgi, new_block, flags, pnc, node, /*is_premuted=*/0);
+ new_node = create_set_32bit(dbgi, new_block, flags, pnc, node);
} else if (is_Const_0(mux_true) && is_Const_1(mux_false)) {
- new_node = create_set_32bit(dbgi, new_block, flags, pnc, node, /*is_premuted=*/1);
+ pnc = ia32_get_negated_pnc(pnc);
+ new_node = create_set_32bit(dbgi, new_block, flags, pnc, node);
} else {
/* Not that simple. */
goto need_cmov;
assert(!mode_is_int(src_mode) || src_bits <= 32);
assert(!mode_is_int(tgt_mode) || tgt_bits <= 32);
+ /* modeB -> X should already be lowered by the lower_mode_b pass */
if (src_mode == mode_b) {
- assert(mode_is_int(tgt_mode) || mode_is_reference(tgt_mode));
- /* nothing to do, we already model bools as 0/1 ints */
- return be_transform_node(op);
+ panic("ConvB not lowered %+F", node);
}
if (src_mode == tgt_mode) {
new_op = be_transform_node(op);
/* we convert from float ... */
if (mode_is_float(tgt_mode)) {
-#if 0
- /* Matze: I'm a bit unsure what the following is for? seems wrong
- * to me... */
- if (src_mode == mode_E && tgt_mode == mode_D
- && !get_Conv_strict(node)) {
- DB((dbg, LEVEL_1, "killed Conv(mode, mode) ..."));
- return new_op;
- }
-#endif
-
/* ... to float */
if (ia32_cg_config.use_sse2) {
DB((dbg, LEVEL_1, "create Conv(float, float) ..."));
flag = new_r_Proj(block, real, mode_b, pn_ia32_flags);
/* sete */
- set = new_bd_ia32_Set(dbgi, block, flag, pn_Cmp_Eq, 0);
+ set = new_bd_ia32_Setcc(dbgi, block, flag, pn_Cmp_Eq);
SET_IA32_ORIG_NODE(set, node);
/* conv to 32bit */
cmp = fix_mem_proj(cmp, &am);
/* setp */
- new_node = new_bd_ia32_Set(dbgi, new_block, cmp, ia32_pn_Cmp_parity, 0);
+ new_node = new_bd_ia32_Setcc(dbgi, new_block, cmp, ia32_pn_Cmp_parity);
SET_IA32_ORIG_NODE(new_node, node);
/* conv to 32bit */
projects / libfirm / blobdiff