simplify and speedup belady/loopana a bit
[libfirm] / ir / be / ia32 / ia32_transform.c
index b52656e..2396a3b 100644 (file)
@@ -48,6 +48,7 @@
 #include "irdom.h"
 #include "archop.h"
 #include "error.h"
+#include "array_t.h"
 #include "height.h"
 
 #include "../benode_t.h"
@@ -801,6 +802,12 @@ static void match_arguments(ia32_address_mode_t *am, ir_node *block,
        am->commutative = commutative;
 }
 
+static void set_transformed_and_mark(ir_node *const old_node, ir_node *const new_node)
+{
+       mark_irn_visited(old_node);
+       be_set_transformed_node(old_node, new_node);
+}
+
 static ir_node *fix_mem_proj(ir_node *node, ia32_address_mode_t *am)
 {
        ir_mode  *mode;
@@ -813,8 +820,7 @@ static ir_node *fix_mem_proj(ir_node *node, ia32_address_mode_t *am)
        mode = get_irn_mode(node);
        load = get_Proj_pred(am->mem_proj);
 
-       mark_irn_visited(load);
-       be_set_transformed_node(load, node);
+       set_transformed_and_mark(load, node);
 
        if (mode != mode_T) {
                set_irn_mode(node, mode_T);
@@ -2024,12 +2030,6 @@ static int use_dest_am(ir_node *block, ir_node *node, ir_node *mem,
        return 1;
 }
 
-static void set_transformed_and_mark(ir_node *const old_node, ir_node *const new_node)
-{
-       mark_irn_visited(old_node);
-       be_set_transformed_node(old_node, new_node);
-}
-
 static ir_node *dest_am_binop(ir_node *node, ir_node *op1, ir_node *op2,
                               ir_node *mem, ir_node *ptr, ir_mode *mode,
                               construct_binop_dest_func *func,
@@ -2751,7 +2751,7 @@ static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
 
        if (is_ia32_Shr(transformed_node) && !mode_is_signed(mode)) {
                ir_node *right = get_irn_n(transformed_node, n_ia32_Shr_count);
-               if (is_ia32_Immediate(right)) {
+               if (is_ia32_Immediate(right) || is_ia32_Const(right)) {
                        const ia32_immediate_attr_t *attr
                                = get_ia32_immediate_attr_const(right);
                        if (attr->symconst == 0
@@ -2763,7 +2763,7 @@ static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
 
        if (is_ia32_And(transformed_node) && !mode_is_signed(mode)) {
                ir_node *right = get_irn_n(transformed_node, n_ia32_And_right);
-               if (is_ia32_Immediate(right)) {
+               if (is_ia32_Immediate(right) || is_ia32_Const(right)) {
                        const ia32_immediate_attr_t *attr
                                = get_ia32_immediate_attr_const(right);
                        if (attr->symconst == 0
@@ -2774,6 +2774,22 @@ static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
                }
        }
 
+       if (is_ia32_Immediate(transformed_node)
+                       || is_ia32_Const(transformed_node)) {
+               const ia32_immediate_attr_t *attr
+                       = get_ia32_immediate_attr_const(transformed_node);
+               if (mode_is_signed(mode)) {
+                       long shifted = attr->offset >> (get_mode_size_bits(mode) - 1);
+                       if (shifted == 0 || shifted == -1)
+                               return true;
+               } else {
+                       unsigned long shifted = (unsigned long) attr->offset;
+                       shifted >>= get_mode_size_bits(mode);
+                       if (shifted == 0)
+                               return true;
+               }
+       }
+
        return false;
 }
 
@@ -2813,13 +2829,12 @@ static ir_node *gen_Cmp(ir_node *node)
                /* Test(and_left, and_right) */
                ir_node *and_left  = get_And_left(left);
                ir_node *and_right = get_And_right(left);
-               ir_mode *mode      = get_irn_mode(and_left);
 
                /* matze: code here used mode instead of cmd_mode, I think it is always
                 * the same as cmp_mode, but I leave this here to see if this is really
                 * true...
                 */
-               assert(mode == cmp_mode);
+               assert(get_irn_mode(and_left) == cmp_mode);
 
                match_arguments(&am, block, and_left, and_right, NULL,
                                                                                match_commutative |
@@ -3580,8 +3595,7 @@ static ir_node *gen_be_Return(ir_node *node) {
                                  arity, in);
        copy_node_attr(barrier, new_barrier);
        be_duplicate_deps(barrier, new_barrier);
-       be_set_transformed_node(barrier, new_barrier);
-       mark_irn_visited(barrier);
+       set_transformed_and_mark(barrier, new_barrier);
 
        /* transform normally */
        return be_duplicate_node(node);
@@ -4005,8 +4019,7 @@ static ir_node *gen_Proj_be_AddSP(ir_node *node) {
                return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_ia32_SubSP_M);
        }
 
-       assert(0);
-       return new_rd_Unknown(irg, get_irn_mode(node));
+       panic("No idea how to transform proj->AddSP");
 }
 
 /**
@@ -4029,8 +4042,7 @@ static ir_node *gen_Proj_be_SubSP(ir_node *node) {
                return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_ia32_AddSP_M);
        }
 
-       assert(0);
-       return new_rd_Unknown(irg, get_irn_mode(node));
+       panic("No idea how to transform proj->SubSP");
 }
 
 /**
@@ -4128,8 +4140,7 @@ static ir_node *gen_Proj_Load(ir_node *node) {
                return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, 1);
        }
 
-       assert(0);
-       return new_rd_Unknown(irg, get_irn_mode(node));
+       panic("No idea how to transform proj");
 }
 
 /**
@@ -4141,7 +4152,6 @@ static ir_node *gen_Proj_DivMod(ir_node *node) {
        ir_node  *new_pred = be_transform_node(pred);
        ir_graph *irg      = current_ir_graph;
        dbg_info *dbgi     = get_irn_dbg_info(node);
-       ir_mode  *mode     = get_irn_mode(node);
        long     proj      = get_Proj_proj(node);
 
        assert(is_ia32_Div(new_pred) || is_ia32_IDiv(new_pred));
@@ -4196,8 +4206,7 @@ static ir_node *gen_Proj_DivMod(ir_node *node) {
                break;
        }
 
-       assert(0);
-       return new_rd_Unknown(irg, mode);
+       panic("No idea how to transform proj->DivMod");
 }
 
 /**
@@ -4209,7 +4218,6 @@ static ir_node *gen_Proj_CopyB(ir_node *node) {
        ir_node  *new_pred = be_transform_node(pred);
        ir_graph *irg      = current_ir_graph;
        dbg_info *dbgi     = get_irn_dbg_info(node);
-       ir_mode  *mode     = get_irn_mode(node);
        long     proj      = get_Proj_proj(node);
 
        switch(proj) {
@@ -4224,8 +4232,7 @@ static ir_node *gen_Proj_CopyB(ir_node *node) {
                break;
        }
 
-       assert(0);
-       return new_rd_Unknown(irg, mode);
+       panic("No idea how to transform proj->CopyB");
 }
 
 /**
@@ -4237,7 +4244,6 @@ static ir_node *gen_Proj_Quot(ir_node *node) {
        ir_node  *new_pred = be_transform_node(pred);
        ir_graph *irg      = current_ir_graph;
        dbg_info *dbgi     = get_irn_dbg_info(node);
-       ir_mode  *mode     = get_irn_mode(node);
        long     proj      = get_Proj_proj(node);
 
        switch(proj) {
@@ -4261,8 +4267,7 @@ static ir_node *gen_Proj_Quot(ir_node *node) {
                break;
        }
 
-       assert(0);
-       return new_rd_Unknown(irg, mode);
+       panic("No idea how to transform proj->Quot");
 }
 
 static ir_node *gen_be_Call(ir_node *node) {
@@ -4442,8 +4447,7 @@ static ir_node *gen_Proj(ir_node *node) {
                if (proj == pn_Store_M) {
                        return be_transform_node(pred);
                } else {
-                       assert(0);
-                       return new_r_Bad(current_ir_graph);
+                       panic("No idea how to transform proj->Store");
                }
        case iro_Load:
                return gen_Proj_Load(node);