/**
- * This file implements the IR transformation from firm into
- * ia32-Firm.
- *
+ * This file implements the IR transformation from firm into ia32-Firm.
+ * @author Christian Wuerdig
* $Id$
*/
#include "dbginfo.h"
#include "irprintf.h"
#include "debug.h"
+#include "irdom.h"
+#include "archop.h" /* we need this for Min and Max nodes */
#include "../benode_t.h"
#include "../besched.h"
#include "../beabi.h"
#include "bearch_ia32_t.h"
-
#include "ia32_nodes_attr.h"
-#include "../arch/archop.h" /* we need this for Min and Max nodes */
#include "ia32_transform.h"
#include "ia32_new_nodes.h"
#include "ia32_map_regs.h"
#include "ia32_dbg_stat.h"
+#include "ia32_optimize.h"
#include "gen_ia32_regalloc_if.h"
return NULL;
}
+/**
+ * SSE convert of an integer node into a floating point node.
+ */
+static ir_node *gen_sse_conv_int2float(ia32_code_gen_t *cg, dbg_info *dbg, ir_graph *irg, ir_node *block,
+ ir_node *in, ir_node *old_node, ir_mode *tgt_mode)
+{
+ ir_node *noreg = ia32_new_NoReg_gp(cg);
+ ir_node *nomem = new_rd_NoMem(irg);
+
+ ir_node *conv = new_rd_ia32_Conv_I2FP(dbg, irg, block, noreg, noreg, in, nomem);
+ set_ia32_src_mode(conv, get_irn_mode(in));
+ set_ia32_tgt_mode(conv, tgt_mode);
+ set_ia32_am_support(conv, ia32_am_Source);
+ SET_IA32_ORIG_NODE(conv, ia32_get_old_node_name(cg, old_node));
+
+ return new_rd_Proj(dbg, irg, block, conv, tgt_mode, pn_ia32_Conv_I2FP_res);
+}
+
/* Generates an entity for a known FP const (used for FP Neg + Abs) */
static ident *gen_fp_known_const(ir_mode *mode, ia32_known_const_t kct) {
static const struct {
return new_rd_Proj(dbg, irg, block, new_op, mode, pn_ia32_Add_res);
}
+/**
+ * Transforms an ia32_l_AddC (created in intrinsic lowering) into a "real" AddC
+ *
+ * @param env The transformation environment
+ * @return the created ia32 Add node
+ */
+static ir_node *gen_ia32_l_AddC(ia32_transform_env_t *env) {
+ return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_AddC);
+}
+
+/**
+ * Transforms an ia32_l_Add (created in intrinsic lowering) into a "real" Add
+ *
+ * @param env The transformation environment
+ * @return the created ia32 Add node
+ */
+static ir_node *gen_ia32_l_Add(ia32_transform_env_t *env) {
+ return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_Add);
+}
+
/**
return new_rd_Proj(dbg, irg, block, new_op, mode, pn_ia32_Sub_res);
}
+/**
+ * Transforms an ia32_l_SubC (created in intrinsic lowering) into a "real" SubC
+ *
+ * @param env The transformation environment
+ * @return the created ia32 SubC node
+ */
+static ir_node *gen_ia32_l_SubC(ia32_transform_env_t *env) {
+ return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_SubC);
+}
+
+/**
+ * Transforms an ia32_l_Sub (created in intrinsic lowering) into a "real" Sub
+ *
+ * @param env The transformation environment
+ * @return the created ia32 Sub node
+ */
+static ir_node *gen_ia32_l_Sub(ia32_transform_env_t *env) {
+ return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_Sub);
+}
+
/**
return NULL;
}
-typedef ir_node *set_func_t(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *cmp_a, ir_node *cmp_b, ir_mode *mode);
typedef ir_node *cmov_func_t(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *cmp_a, ir_node *cmp_b, \
ir_node *psi_true, ir_node *psi_default, ir_mode *mode);
ir_node *psi_default = get_Psi_default(node);
ir_node *noreg = ia32_new_NoReg_gp(cg);
ir_node *nomem = new_rd_NoMem(irg);
- ir_node *cmp, *cmp_a, *cmp_b, *and1, *and2, *new_op, *c1, *c2 = NULL;
+ ir_node *cmp, *cmp_a, *cmp_b, *and1, *and2, *new_op = NULL;
int pnc;
-
assert(get_irn_mode(cmp_proj) == mode_b && "Condition for Psi must have mode_b");
cmp = get_Proj_pred(cmp_proj);
/* in case the compare operands are int, we move them into xmm register */
if (! mode_is_float(get_irn_mode(cmp_a))) {
- c1 = new_rd_ia32_Conv_I2FP(dbg, irg, block, noreg, noreg, cmp_a, nomem);
- set_ia32_src_mode(c1, get_irn_mode(cmp_a));
- set_ia32_tgt_mode(c1, mode_D);
- set_ia32_am_support(c1, ia32_am_Source);
- SET_IA32_ORIG_NODE(c1, ia32_get_old_node_name(cg, node));
- c2 = new_rd_ia32_Conv_I2FP(dbg, irg, block, noreg, noreg, cmp_b, nomem);
- set_ia32_src_mode(c2, get_irn_mode(cmp_b));
- set_ia32_tgt_mode(c2, mode_D);
- set_ia32_am_support(c2, ia32_am_Source);
- SET_IA32_ORIG_NODE(c2, ia32_get_old_node_name(cg, node));
-
- cmp_a = new_rd_Proj(dbg, irg, block, c1, mode_D, pn_ia32_Conv_I2FP_res);
- cmp_b = new_rd_Proj(dbg, irg, block, c2, mode_D, pn_ia32_Conv_I2FP_res);
-
- pnc += pn_Cmp_Uo; /* transform integer compare to fp compare */
+ cmp_a = gen_sse_conv_int2float(cg, dbg, irg, block, cmp_a, node, mode_D);
+ cmp_b = gen_sse_conv_int2float(cg, dbg, irg, block, cmp_b, node, mode_D);
+
+ pnc |= 8; /* transform integer compare to fp compare */
}
new_op = new_rd_ia32_xCmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem);
SET_IA32_ORIG_NODE(and1, ia32_get_old_node_name(cg, node));
and1 = new_rd_Proj(dbg, irg, block, and1, mode, pn_ia32_xAnd_res);
- and2 = new_rd_ia32_xAndNot(dbg, irg, block, noreg, noreg, psi_default, new_op, nomem);
+ and2 = new_rd_ia32_xAndNot(dbg, irg, block, noreg, noreg, new_op, psi_default, nomem);
set_ia32_am_support(and2, ia32_am_Source);
set_ia32_res_mode(and2, mode);
SET_IA32_ORIG_NODE(and2, ia32_get_old_node_name(cg, node));
}
else {
/* integer psi */
- set_func_t *set_func = NULL;
- cmov_func_t *cmov_func = NULL;
+ construct_binop_func *set_func = NULL;
+ cmov_func_t *cmov_func = NULL;
if (mode_is_float(get_irn_mode(cmp_a))) {
/* 1st case: compare operands are floats */
set_func = new_rd_ia32_vfCmpSet;
cmov_func = new_rd_ia32_vfCmpCMov;
}
+
+ pnc &= 7; /* fp compare -> int compare */
}
else {
/* 2nd case: compare operand are integer too */
- set_func = new_rd_ia32_Set;
- cmov_func = new_rd_ia32_CMov;
+ set_func = new_rd_ia32_CmpSet;
+ cmov_func = new_rd_ia32_CmpCMov;
}
/* create the nodes */
- if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) {
- /* first case for SETcc: default is 0, set to 1 iff condition is true */
- new_op = set_func(dbg, irg, block, cmp_a, cmp_b, mode);
- set_ia32_pncode(new_op, pnc);
- }
- else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) {
- /* second case for SETcc: default is 1, set to 0 iff condition is true: */
- /* we invert condition and set default to 0 */
- new_op = set_func(dbg, irg, block, cmp_a, cmp_b, mode);
- set_ia32_pncode(new_op, get_negated_pnc(pnc, mode));
+ /* check for special case first: And/Or -- Cmp with 0 -- Psi */
+ if (is_ia32_Const_0(cmp_b) && is_Proj(cmp_a) && (is_ia32_And(get_Proj_pred(cmp_a)) || is_ia32_Or(get_Proj_pred(cmp_a)))) {
+ if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) {
+ /* first case for SETcc: default is 0, set to 1 iff condition is true */
+ new_op = new_rd_ia32_PsiCondSet(dbg, irg, block, cmp_a, mode);
+ set_ia32_pncode(new_op, pnc);
+ }
+ else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) {
+ /* second case for SETcc: default is 1, set to 0 iff condition is true: */
+ /* we invert condition and set default to 0 */
+ new_op = new_rd_ia32_PsiCondSet(dbg, irg, block, cmp_a, mode);
+ set_ia32_pncode(new_op, get_negated_pnc(pnc, mode));
+ }
+ else {
+ /* otherwise: use CMOVcc */
+ new_op = new_rd_ia32_PsiCondCMov(dbg, irg, block, cmp_a, psi_true, psi_default, mode);
+ set_ia32_pncode(new_op, pnc);
+ }
+
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
}
else {
- /* otherwise: use CMOVcc */
- new_op = cmov_func(dbg, irg, block, cmp_a, cmp_b, psi_true, psi_default, mode);
- set_ia32_pncode(new_op, pnc);
+ env->irn = cmp;
+ if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) {
+ /* first case for SETcc: default is 0, set to 1 iff condition is true */
+ new_op = gen_binop(env, cmp_a, cmp_b, set_func);
+ set_ia32_pncode(get_Proj_pred(new_op), pnc);
+ set_ia32_am_support(get_Proj_pred(new_op), ia32_am_Source);
+ }
+ else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) {
+ /* second case for SETcc: default is 1, set to 0 iff condition is true: */
+ /* we invert condition and set default to 0 */
+ new_op = gen_binop(env, cmp_a, cmp_b, set_func);
+ set_ia32_pncode(get_Proj_pred(new_op), get_negated_pnc(pnc, mode));
+ set_ia32_am_support(get_Proj_pred(new_op), ia32_am_Source);
+ }
+ else {
+ /* otherwise: use CMOVcc */
+ new_op = cmov_func(dbg, irg, block, cmp_a, cmp_b, psi_true, psi_default, mode);
+ set_ia32_pncode(new_op, pnc);
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
+ }
}
-
- SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));
}
return new_op;
*
********************************************/
+ /**
+ * Decides in which block the transformed StackParam should be placed.
+ * If the StackParam has more than one user, the dominator block of
+ * the users will be returned. In case of only one user, this is either
+ * the user block or, in case of a Phi, the predecessor block of the Phi.
+ */
+ static ir_node *get_block_transformed_stack_param(ir_node *irn) {
+ ir_node *dom_bl = NULL;
+
+ if (get_irn_n_edges(irn) == 1) {
+ ir_node *src = get_edge_src_irn(get_irn_out_edge_first(irn));
+
+ if (! is_Phi(src)) {
+ dom_bl = get_nodes_block(src);
+ }
+ else {
+ /* Determine on which in position of the Phi the irn is */
+ /* and get the corresponding cfg predecessor block. */
+
+ int i = get_irn_pred_pos(src, irn);
+ assert(i >= 0 && "kaputt");
+ dom_bl = get_Block_cfgpred_block(get_nodes_block(src), i);
+ }
+ }
+ else {
+ dom_bl = node_users_smallest_common_dominator(irn, 1);
+ }
+
+ assert(dom_bl && "dominator block not found");
+
+ return dom_bl;
+ }
+
static ir_node *gen_be_StackParam(ia32_transform_env_t *env) {
ir_node *new_op = NULL;
ir_node *node = env->irn;
entity *ent = be_get_frame_entity(node);
ir_mode *mode = env->mode;
-// /* If the StackParam has only one user -> */
-// /* put it in the Block where the user resides */
-// if (get_irn_n_edges(node) == 1) {
-// env->block = get_nodes_block(get_edge_src_irn(get_irn_out_edge_first(node)));
-// }
+ /* choose the block where to place the load */
+ env->block = get_block_transformed_stack_param(node);
if (mode_is_float(mode)) {
FP_USED(env->cg);
#define IGN(a)
GEN(Add);
+ GEN(ia32_l_Add);
+ GEN(ia32_l_AddC);
GEN(Sub);
+ GEN(ia32_l_Sub);
+ GEN(ia32_l_SubC);
GEN(Mul);
GEN(And);
GEN(Or);
DB((cg->mod, LEVEL_1, "ignored\n"));
}
}
+
+/**
+ * Transforms a psi condition.
+ */
+static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg) {
+ int i;
+
+ assert(get_irn_mode(cond) == mode_b && "logical operator for condition must be mode_b");
+ set_irn_mode(cond, mode);
+
+ for (i = get_irn_arity(cond) - 1; i >= 0; i--) {
+ ir_node *in = get_irn_n(cond, i);
+
+ /* if in is a compare: transform into Set/xCmp */
+ if (is_Proj(in)) {
+ ir_node *new_op = NULL;
+ ir_node *cmp = get_Proj_pred(in);
+ ir_node *cmp_a = get_Cmp_left(cmp);
+ ir_node *cmp_b = get_Cmp_right(cmp);
+ dbg_info *dbg = get_irn_dbg_info(cmp);
+ ir_graph *irg = get_irn_irg(cmp);
+ ir_node *block = get_nodes_block(cmp);
+ ir_node *noreg = ia32_new_NoReg_gp(cg);
+ ir_node *nomem = new_rd_NoMem(irg);
+ int pnc = get_Proj_proj(in);
+
+ /* this is a compare */
+ if (mode_is_float(mode)) {
+ /* Psi is float, we need a floating point compare */
+
+ if (USE_SSE2(cg)) {
+ /* SSE FPU */
+ if (! mode_is_float(get_irn_mode(cmp_a))) {
+ cmp_a = gen_sse_conv_int2float(cg, dbg, irg, block, cmp_a, cmp_a, mode);
+ cmp_b = gen_sse_conv_int2float(cg, dbg, irg, block, cmp_b, cmp_b, mode);
+ pnc |= 8;
+ }
+
+ new_op = new_rd_ia32_xCmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem);
+ set_ia32_pncode(new_op, pnc);
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, cmp));
+ }
+ else {
+ /* x87 FPU */
+ assert(0);
+ }
+ }
+ else {
+ /* integer Psi */
+ ia32_transform_env_t tenv;
+ construct_binop_func *set_func = NULL;
+
+ if (mode_is_float(get_irn_mode(cmp_a))) {
+ /* 1st case: compare operands are floats */
+ FP_USED(cg);
+
+ if (USE_SSE2(cg)) {
+ /* SSE FPU */
+ set_func = new_rd_ia32_xCmpSet;
+ }
+ else {
+ /* x87 FPU */
+ set_func = new_rd_ia32_vfCmpSet;
+ }
+
+ pnc &= 7; /* fp compare -> int compare */
+ }
+ else {
+ /* 2nd case: compare operand are integer too */
+ set_func = new_rd_ia32_CmpSet;
+ }
+
+ tenv.block = block;
+ tenv.cg = cg;
+ tenv.dbg = dbg;
+ tenv.irg = irg;
+ tenv.irn = cmp;
+ tenv.mode = mode;
+ tenv.mod = cg->mod;
+
+ new_op = gen_binop(&tenv, cmp_a, cmp_b, set_func);
+ set_ia32_pncode(get_Proj_pred(new_op), pnc);
+ set_ia32_am_support(get_Proj_pred(new_op), ia32_am_Source);
+ }
+
+ /* exchange with old compare */
+ exchange(in, new_op);
+ }
+ else {
+ /* another complex condition */
+ transform_psi_cond(in, mode, cg);
+ }
+ }
+}
+
+/**
+ * The Psi selector can be a tree of compares combined with "And"s and "Or"s.
+ * We create a Set node, respectively a xCmp in case the Psi is a float, for each
+ * compare, which causes the compare result to be stores in a register. The
+ * "And"s and "Or"s are transformed later, we just have to set their mode right.
+ */
+void ia32_transform_psi_cond_tree(ir_node *node, void *env) {
+ ia32_code_gen_t *cg = (ia32_code_gen_t *)env;
+ ir_node *psi_sel, *new_cmp, *block;
+ ir_graph *irg;
+ ir_mode *mode;
+
+ /* check for Psi */
+ if (get_irn_opcode(node) != iro_Psi)
+ return;
+
+ psi_sel = get_Psi_cond(node, 0);
+
+ /* if psi_cond is a cmp: do nothing, this case is covered by gen_Psi */
+ if (is_Proj(psi_sel))
+ return;
+
+ mode = get_irn_mode(node);
+
+ transform_psi_cond(psi_sel, mode, cg);
+
+ irg = get_irn_irg(node);
+ block = get_nodes_block(node);
+
+ /* we need to compare the evaluated condition tree with 0 */
+
+ /* BEWARE: new_r_Const_long works for floating point as well */
+ new_cmp = new_r_Cmp(irg, block, psi_sel, new_r_Const_long(irg, block, mode, 0));
+ /* transform the const */
+ ia32_place_consts_set_modes(new_cmp, cg);
+ new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, pn_Cmp_Ne + (mode_is_float(mode) ? pn_Cmp_Uo : 0));
+
+ set_Psi_cond(node, 0, new_cmp);
+}
projects / libfirm / blobdiff