/* base is an constant address */
if (is_imm) {
- if (get_ia32_immop_type(ptr) == ia32_ImmSymConst) {
+ if (get_ia32_op_type(ptr) == ia32_SymConst) {
set_ia32_am_sc(new_op, get_ia32_id_cnst(ptr));
am_flav = ia32_am_N;
}
if (is_Proj(sel) && sel_mode == mode_b) {
ir_node *nomem = new_NoMem();
+ pn_Cmp pnc = get_Proj_proj(sel);
pred = get_Proj_pred(sel);
expr = get_expr_op(cmp_a, cmp_b);
if (cnst && expr) {
- pn_Cmp pnc = get_Proj_proj(sel);
+ /* immop has to be the right operand, we might need to flip pnc */
+ if(cnst != cmp_b) {
+ pnc = get_inversed_pnc(pnc);
+ }
if ((pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) && mode_is_int(get_irn_mode(expr))) {
if (get_ia32_op_type(cnst) == ia32_Const &&
cnst = (is_ia32_ImmConst(and) || is_ia32_ImmSymConst(and)) ? get_ia32_cnst(and) : NULL;
}
res = new_rd_ia32_TestJmp(dbg, irg, block, op1, op2);
- set_ia32_pncode(res, get_Proj_proj(sel));
+ set_ia32_pncode(res, pnc);
set_ia32_res_mode(res, get_irn_mode(op1));
if (cnst) {
set_ia32_res_mode(res, get_irn_mode(cmp_a));
}
- set_ia32_pncode(res, get_Proj_proj(sel));
+ set_ia32_pncode(res, pnc);
//set_ia32_am_support(res, ia32_am_Source);
}
else {
if (tgt_bits < 32) {
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env->cg, env->irn));
set_ia32_am_support(new_op, ia32_am_Source);
- set_ia32_tgt_mode(new_op, tgt_mode);
+ set_ia32_tgt_mode(new_op, mode_Is);
set_ia32_src_mode(new_op, src_mode);
proj = new_rd_Proj(dbg, irg, block, new_op, mode_Is, pn_ia32_Conv_FP2I_res);
new_op = new_rd_ia32_Conv_I2I(dbg, irg, block, noreg, noreg, proj, nomem);
pn = pn_ia32_Conv_I2I_res;
}
+ src_mode = mode_Is;
}
}
}
*
********************************************/
-#if 0
- /**
- * Decides in which block the transformed StackParam should be placed.
- * If the StackParam has more than one user, the dominator block of
- * the users will be returned. In case of only one user, this is either
- * the user block or, in case of a Phi, the predecessor block of the Phi.
- */
-static ir_node *get_block_transformed_stack_param(ir_node *irn) {
- ir_node *dom_bl = NULL;
-
- if (get_irn_n_edges(irn) == 1) {
- ir_node *src = get_edge_src_irn(get_irn_out_edge_first(irn));
-
- if (! is_Phi(src)) {
- dom_bl = get_nodes_block(src);
- }
- else {
- /* Determine on which in position of the Phi the irn is */
- /* and get the corresponding cfg predecessor block. */
-
- int i = get_irn_pred_pos(src, irn);
- assert(i >= 0 && "kaputt");
- dom_bl = get_Block_cfgpred_block(get_nodes_block(src), i);
- }
- }
- else {
- dom_bl = node_users_smallest_common_dominator(irn, 1);
- }
-
- assert(dom_bl && "dominator block not found");
-
- return dom_bl;
-}
-#endif
-
static ir_node *gen_be_StackParam(ia32_transform_env_t *env) {
ir_node *new_op = NULL;
ir_node *node = env->irn;
entity *ent = arch_get_frame_entity(env->cg->arch_env, node);
ir_mode *mode = env->mode;
- /* choose the block where to place the load */
- //env->block = get_block_transformed_stack_param(node);
-
if (mode_is_float(mode)) {
FP_USED(env->cg);
if (USE_SSE2(env->cg))
if (be_Return_get_n_rets(env->irn) < 1 || ! ret_val || ! USE_SSE2(env->cg))
return NULL;
-
if (get_method_n_ress(tp) == 1) {
ir_type *res_type = get_method_res_type(tp, 0);
ir_mode *mode;
- if(is_Primitive_type(res_type)) {
+ if (is_Primitive_type(res_type)) {
mode = get_type_mode(res_type);
- if(mode_is_float(mode)) {
- ir_node *frame = get_irg_frame(env->irg);
- entity *ent = frame_alloc_area(get_irg_frame_type(env->irg), get_mode_size_bytes(mode), 16, 0);
- ir_node *sse_store, *fld, *mproj;
+ if (mode_is_float(mode)) {
+ ir_node *frame;
+ entity *ent;
+ ir_node *sse_store, *fld, *mproj, *barrier;
+ int pn_ret_val = get_Proj_proj(ret_val);
+ int pn_ret_mem = get_Proj_proj(ret_mem);
+
+ /* get the Barrier */
+ barrier = get_Proj_pred(ret_val);
+
+ /* get result input of the Barrier */
+ ret_val = get_irn_n(barrier, pn_ret_val);
+
+ /* get memory input of the Barrier */
+ ret_mem = get_irn_n(barrier, pn_ret_mem);
+
+ frame = get_irg_frame(env->irg);
+ ent = frame_alloc_area(get_irg_frame_type(env->irg), get_mode_size_bytes(mode), 16, 0);
/* store xmm0 onto stack */
sse_store = new_rd_ia32_xStoreSimple(env->dbg, env->irg, env->block, frame, ret_val, ret_mem);
set_ia32_am_support(fld, ia32_am_Source);
mproj = new_r_Proj(env->irg, env->block, fld, mode_M, pn_ia32_SetST0_M);
fld = new_r_Proj(env->irg, env->block, fld, mode, pn_ia32_SetST0_res);
+ arch_set_irn_register(env->cg->arch_env, fld, &ia32_st_regs[REG_ST0]);
/* set new return value */
- set_irn_n(env->irn, be_pos_Return_val, fld);
- set_irn_n(env->irn, be_pos_Return_mem, mproj);
+ set_irn_n(barrier, pn_ret_val, fld);
+ set_irn_n(barrier, pn_ret_mem, mproj);
}
}
}
return new_op;
}
+/**
+ * Transform a be_SubSP into an ia32_SubSP. Eat up const sizes.
+ */
+static ir_node *gen_be_SubSP(ia32_transform_env_t *env) {
+ ir_node *new_op;
+ const ir_edge_t *edge;
+ ir_node *sz = get_irn_n(env->irn, be_pos_SubSP_size);
+ ir_node *sp = get_irn_n(env->irn, be_pos_SubSP_old_sp);
+
+ new_op = new_rd_ia32_SubSP(env->dbg, env->irg, env->block, sp, sz);
+
+ if (is_ia32_Const(sz)) {
+ set_ia32_Immop_attr(new_op, sz);
+ set_irn_n(new_op, 1, ia32_new_NoReg_gp(env->cg));
+ }
+ else if (is_ia32_Load(sz) && get_ia32_am_flavour(sz) == ia32_O) {
+ set_ia32_immop_type(new_op, ia32_ImmSymConst);
+ set_ia32_op_type(new_op, ia32_AddrModeS);
+ set_ia32_am_sc(new_op, get_ia32_am_sc(sz));
+ add_ia32_am_offs(new_op, get_ia32_am_offs(sz));
+ set_irn_n(new_op, 1, ia32_new_NoReg_gp(env->cg));
+ }
+
+ /* fix proj nums */
+ foreach_out_edge(env->irn, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+
+ assert(is_Proj(proj));
+
+ if (get_Proj_proj(proj) == pn_be_SubSP_res) {
+ /* the node is not yet exchanged: we need to set the register manually */
+ ia32_attr_t *attr = get_ia32_attr(new_op);
+ attr->slots[pn_ia32_SubSP_stack] = &ia32_gp_regs[REG_ESP];
+ set_Proj_proj(proj, pn_ia32_SubSP_stack);
+ }
+ else if (get_Proj_proj(proj) == pn_be_SubSP_M) {
+ set_Proj_proj(proj, pn_ia32_SubSP_M);
+ }
+ else {
+ assert(0);
+ }
+ }
+
+ SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env->cg, env->irn));
+
+ return new_op;
+}
+
/**
* This function just sets the register for the Unknown node
* as this is not done during register allocation because Unknown
else
arch_set_irn_register(env->cg->arch_env, irn, &ia32_vfp_regs[REG_VFP_UKNWN]);
}
- else if (mode_is_int(mode) || mode_is_reference(mode)) {
+ else if (mode_is_int(mode) || mode_is_reference(mode) || mode_is_character(mode)) {
arch_set_irn_register(env->cg->arch_env, irn, &ia32_gp_regs[REG_GP_UKNWN]);
}
else {
GEN(be_FrameStore);
GEN(be_StackParam);
GEN(be_AddSP);
+ GEN(be_SubSP);
/* set the register for all Unknown nodes */
GEN(Unknown);
/* BEWARE: new_r_Const_long works for floating point as well */
new_cmp = new_r_Cmp(irg, block, psi_sel, new_r_Const_long(irg, block, mode, 0));
- new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, pn_Cmp_Ne + (mode_is_float(mode) ? pn_Cmp_Uo : 0));
+ new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, mode_is_float(mode) ? pn_Cmp_Ne : pn_Cmp_Gt | pn_Cmp_Lt);
set_Psi_cond(node, 0, new_cmp);
}
projects / libfirm / blobdiff