set_ia32_ls_mode(load, mode);
} else {
ir_mode *ls_mode;
+ ir_node *base;
floatent = create_float_const_entity(node);
/* create_float_const_ent is smart and sometimes creates
smaller entities */
ls_mode = get_type_mode(get_entity_type(floatent));
- load = new_bd_ia32_vfld(dbgi, block, noreg_GP, noreg_GP, nomem,
+ if (env_cg->birg->main_env->options->pic) {
+ base = arch_code_generator_get_pic_base(env_cg);
+ } else {
+ base = noreg_GP;
+ }
+
+ load = new_bd_ia32_vfld(dbgi, block, base, noreg_GP, nomem,
ls_mode);
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_sc(load, floatent);
* @param mode the mode for the float type (might be integer mode for SSE2 types)
* @param align alignment
*/
-static ir_type *ia32_create_float_type(ir_mode *mode, unsigned align) {
- char buf[32];
+static ir_type *ia32_create_float_type(ir_mode *mode, unsigned align)
+{
ir_type *tp;
assert(align <= 16);
static ir_type *int_Iu[16] = {NULL, };
if (int_Iu[align] == NULL) {
- snprintf(buf, sizeof(buf), "int_Iu_%u", align);
- int_Iu[align] = tp = new_type_primitive(new_id_from_str(buf), mode);
+ int_Iu[align] = tp = new_type_primitive(mode);
/* set the specified alignment */
set_type_alignment_bytes(tp, align);
}
static ir_type *int_Lu[16] = {NULL, };
if (int_Lu[align] == NULL) {
- snprintf(buf, sizeof(buf), "int_Lu_%u", align);
- int_Lu[align] = tp = new_type_primitive(new_id_from_str(buf), mode);
+ int_Lu[align] = tp = new_type_primitive(mode);
/* set the specified alignment */
set_type_alignment_bytes(tp, align);
}
static ir_type *float_F[16] = {NULL, };
if (float_F[align] == NULL) {
- snprintf(buf, sizeof(buf), "float_F_%u", align);
- float_F[align] = tp = new_type_primitive(new_id_from_str(buf), mode);
+ float_F[align] = tp = new_type_primitive(mode);
/* set the specified alignment */
set_type_alignment_bytes(tp, align);
}
static ir_type *float_D[16] = {NULL, };
if (float_D[align] == NULL) {
- snprintf(buf, sizeof(buf), "float_D_%u", align);
- float_D[align] = tp = new_type_primitive(new_id_from_str(buf), mode);
+ float_D[align] = tp = new_type_primitive(mode);
/* set the specified alignment */
set_type_alignment_bytes(tp, align);
}
static ir_type *float_E[16] = {NULL, };
if (float_E[align] == NULL) {
- snprintf(buf, sizeof(buf), "float_E_%u", align);
- float_E[align] = tp = new_type_primitive(new_id_from_str(buf), mode);
+ float_E[align] = tp = new_type_primitive(mode);
/* set the specified alignment */
set_type_alignment_bytes(tp, align);
}
*
* @param tp the atomic type
*/
-static ir_type *ia32_create_float_array(ir_type *tp) {
- char buf[32];
+static ir_type *ia32_create_float_array(ir_type *tp)
+{
ir_mode *mode = get_type_mode(tp);
unsigned align = get_type_alignment_bytes(tp);
ir_type *arr;
if (float_F[align] != NULL)
return float_F[align];
- snprintf(buf, sizeof(buf), "arr_float_F_%u", align);
- arr = float_F[align] = new_type_array(new_id_from_str(buf), 1, tp);
+ arr = float_F[align] = new_type_array(1, tp);
} else if (mode == mode_D) {
static ir_type *float_D[16] = {NULL, };
if (float_D[align] != NULL)
return float_D[align];
- snprintf(buf, sizeof(buf), "arr_float_D_%u", align);
- arr = float_D[align] = new_type_array(new_id_from_str(buf), 1, tp);
+ arr = float_D[align] = new_type_array(1, tp);
} else {
static ir_type *float_E[16] = {NULL, };
if (float_E[align] != NULL)
return float_E[align];
- snprintf(buf, sizeof(buf), "arr_float_E_%u", align);
- arr = float_E[align] = new_type_array(new_id_from_str(buf), 1, tp);
+ arr = float_E[align] = new_type_array(1, tp);
}
set_type_alignment_bytes(arr, align);
set_type_size_bytes(arr, 2 * get_type_size_bytes(tp));
ent = new_entity(get_glob_type(), new_id_from_str(ent_name), tp);
set_entity_ld_ident(ent, get_entity_ident(ent));
- set_entity_visibility(ent, visibility_local);
- set_entity_variability(ent, variability_constant);
- set_entity_allocation(ent, allocation_static);
+ add_entity_linkage(ent, IR_LINKAGE_CONSTANT);
+ set_entity_visibility(ent, ir_visibility_local);
if (kct == ia32_ULLBIAS) {
ir_initializer_t *initializer = create_initializer_compound(2);
*/
static ir_node *gen_Not(ir_node *node)
{
- ir_node *op = get_Not_op(node);
+ ir_node *op = get_Not_op(node);
assert(get_irn_mode(node) != mode_b); /* should be lowered already */
assert (! mode_is_float(get_irn_mode(node)));
}
}
}
- flags = be_transform_node(pred);
+ /* add ia32 compare flags */
+ {
+ ir_node *l = get_Cmp_left(pred);
+ ir_mode *mode = get_irn_mode(l);
+ if (mode_is_float(mode))
+ pnc |= ia32_pn_Cmp_float;
+ else if (! mode_is_signed(mode))
+ pnc |= ia32_pn_Cmp_unsigned;
+ }
*pnc_out = pnc;
+ flags = be_transform_node(pred);
return flags;
}
}
return new_node;
}
+static pn_Cmp ia32_get_negated_pnc(pn_Cmp pnc)
+{
+ ir_mode *mode = pnc & ia32_pn_Cmp_float ? mode_F : mode_Iu;
+ return get_negated_pnc(pnc, mode);
+}
+
static ir_node *try_create_SetMem(ir_node *node, ir_node *ptr, ir_node *mem)
{
- ir_mode *mode = get_irn_mode(node);
- ir_node *mux_true = get_Mux_true(node);
- ir_node *mux_false = get_Mux_false(node);
- ir_node *cond;
- ir_node *new_mem;
- dbg_info *dbgi;
- ir_node *block;
- ir_node *new_block;
- ir_node *flags;
- ir_node *new_node;
- int negated;
- pn_Cmp pnc;
- ia32_address_t addr;
+ ir_mode *mode = get_irn_mode(node);
+ ir_node *mux_true = get_Mux_true(node);
+ ir_node *mux_false = get_Mux_false(node);
+ ir_node *cond;
+ ir_node *new_mem;
+ dbg_info *dbgi;
+ ir_node *block;
+ ir_node *new_block;
+ ir_node *flags;
+ ir_node *new_node;
+ bool negated;
+ pn_Cmp pnc;
+ ia32_address_t addr;
if (get_mode_size_bits(mode) != 8)
return NULL;
if (is_Const_1(mux_true) && is_Const_0(mux_false)) {
- negated = 0;
+ negated = false;
} else if (is_Const_0(mux_true) && is_Const_1(mux_false)) {
- negated = 1;
+ negated = true;
} else {
return NULL;
}
+ cond = get_Mux_sel(node);
+ flags = get_flags_node(cond, &pnc);
+ /* we can't handle the float special cases with SetM */
+ if (pnc & ia32_pn_Cmp_float)
+ return NULL;
+ if (negated)
+ pnc = ia32_get_negated_pnc(pnc);
+
build_address_ptr(&addr, ptr, mem);
dbgi = get_irn_dbg_info(node);
block = get_nodes_block(node);
new_block = be_transform_node(block);
- cond = get_Mux_sel(node);
- flags = get_flags_node(cond, &pnc);
new_mem = be_transform_node(mem);
- new_node = new_bd_ia32_SetMem(dbgi, new_block, addr.base,
- addr.index, addr.mem, flags, pnc, negated);
+ new_node = new_bd_ia32_SetccMem(dbgi, new_block, addr.base,
+ addr.index, addr.mem, flags, pnc);
set_address(new_node, &addr);
set_ia32_op_type(new_node, ia32_AddrModeD);
set_ia32_ls_mode(new_node, mode);
case iro_Mux:
new_node = try_create_SetMem(val, ptr, mem);
break;
+
case iro_Minus:
op1 = get_Minus_op(val);
new_node = dest_am_unop(val, op1, mem, ptr, mode, new_bd_ia32_NegMem);
match_arguments(&am, block, val_false, val_true, flags,
match_commutative | match_am | match_16bit_am | match_mode_neutral);
- new_node = new_bd_ia32_CMov(dbgi, new_block, addr->base, addr->index,
- addr->mem, am.new_op1, am.new_op2, new_flags,
- am.ins_permuted, pnc);
+ if (am.ins_permuted)
+ pnc = ia32_get_negated_pnc(pnc);
+
+ new_node = new_bd_ia32_CMovcc(dbgi, new_block, addr->base, addr->index,
+ addr->mem, am.new_op1, am.new_op2, new_flags,
+ pnc);
set_am_attributes(new_node, &am);
SET_IA32_ORIG_NODE(new_node, node);
* Creates a ia32 Setcc instruction.
*/
static ir_node *create_set_32bit(dbg_info *dbgi, ir_node *new_block,
- ir_node *flags, pn_Cmp pnc, ir_node *orig_node,
- int ins_permuted)
+ ir_node *flags, pn_Cmp pnc,
+ ir_node *orig_node)
{
ir_mode *mode = get_irn_mode(orig_node);
ir_node *new_node;
- new_node = new_bd_ia32_Set(dbgi, new_block, flags, pnc, ins_permuted);
+ new_node = new_bd_ia32_Setcc(dbgi, new_block, flags, pnc);
SET_IA32_ORIG_NODE(new_node, orig_node);
/* we might need to conv the result up */
/**
* Create instruction for an unsigned Difference or Zero.
*/
-static ir_node *create_Doz(ir_node *psi, ir_node *a, ir_node *b)
+static ir_node *create_doz(ir_node *psi, ir_node *a, ir_node *b)
{
- ir_mode *mode = get_irn_mode(psi);
- ir_node *new_node, *sub, *sbb, *eflags, *block;
+ ir_mode *mode = get_irn_mode(psi);
+ ir_node *new_node;
+ ir_node *sub;
+ ir_node *sbb;
+ ir_node *not;
+ ir_node *eflags;
+ ir_node *block;
dbg_info *dbgi;
dbgi = get_irn_dbg_info(psi);
sbb = new_bd_ia32_Sbb0(dbgi, block, eflags);
+ not = new_bd_ia32_Not(dbgi, block, sbb);
- new_node = new_bd_ia32_And(dbgi, block, noreg_GP, noreg_GP, nomem, new_node, sbb);
+ new_node = new_bd_ia32_And(dbgi, block, noreg_GP, noreg_GP, nomem, new_node, not);
set_ia32_commutative(new_node);
return new_node;
}
ent = new_entity(get_glob_type(), ia32_unique_id(".LC%u"), tp);
set_entity_ld_ident(ent, get_entity_ident(ent));
- set_entity_visibility(ent, visibility_local);
- set_entity_variability(ent, variability_constant);
- set_entity_allocation(ent, allocation_static);
+ set_entity_visibility(ent, ir_visibility_local);
+ add_entity_linkage(ent, IR_LINKAGE_CONSTANT);
initializer = create_initializer_compound(2);
return ent;
}
+/**
+ * Possible transformations for creating a Setcc.
+ */
+enum setcc_transform_insn {
+ SETCC_TR_ADD,
+ SETCC_TR_ADDxx,
+ SETCC_TR_LEA,
+ SETCC_TR_LEAxx,
+ SETCC_TR_SHL,
+ SETCC_TR_NEG,
+ SETCC_TR_NOT,
+ SETCC_TR_AND,
+ SETCC_TR_SET,
+ SETCC_TR_SBB,
+};
+
+typedef struct setcc_transform {
+ unsigned num_steps;
+ unsigned permutate_cmp_ins;
+ pn_Cmp pnc;
+ struct {
+ enum setcc_transform_insn transform;
+ long val;
+ int scale;
+ } steps[4];
+} setcc_transform_t;
+
+/**
+ * Setcc can only handle 0 and 1 result.
+ * Find a transformation that creates 0 and 1 from
+ * tv_t and tv_f.
+ */
+static void find_const_transform(pn_Cmp pnc, tarval *t, tarval *f, setcc_transform_t *res, int can_permutate)
+{
+ unsigned step = 0;
+
+ res->num_steps = 0;
+ res->permutate_cmp_ins = 0;
+
+ if (tarval_is_null(t)) {
+ tarval *tmp = t;
+ t = f;
+ f = tmp;
+ pnc = ia32_get_negated_pnc(pnc);
+ } else if (tarval_cmp(t, f) == pn_Cmp_Lt) {
+ // now, t is the bigger one
+ tarval *tmp = t;
+ t = f;
+ f = tmp;
+ pnc = ia32_get_negated_pnc(pnc);
+ }
+ res->pnc = pnc;
+
+ if (tarval_is_one(t)) {
+ res->steps[step].transform = SETCC_TR_SET;
+ res->num_steps = ++step;
+ return;
+ }
+
+ if (! tarval_is_null(f)) {
+ tarval *t_sub = tarval_sub(t, f, NULL);
+
+ t = t_sub;
+ res->steps[step].transform = SETCC_TR_ADD;
+
+ if (t == tarval_bad)
+ panic("constant subtract failed");
+ if (! tarval_is_long(f))
+ panic("tarval is not long");
+
+ res->steps[step].val = get_tarval_long(f);
+ ++step;
+ f = tarval_sub(f, f, NULL);
+ assert(tarval_is_null(f));
+ }
+
+ if (tarval_is_minus_one(t)) {
+ if (pnc == (pn_Cmp_Lt | ia32_pn_Cmp_unsigned)) {
+ res->steps[step].transform = SETCC_TR_SBB;
+ res->num_steps = ++step;
+ } else {
+ res->steps[step].transform = SETCC_TR_NEG;
+ ++step;
+ res->steps[step].transform = SETCC_TR_SET;
+ res->num_steps = ++step;
+ }
+ return;
+ }
+ if (tarval_is_long(t)) {
+ ir_mode *mode = get_tarval_mode(t);
+ long v = get_tarval_long(t);
+
+ if (pnc & ia32_pn_Cmp_unsigned) {
+ if (pnc == (pn_Cmp_Lt | ia32_pn_Cmp_unsigned)) {
+ res->steps[step].transform = SETCC_TR_AND;
+ res->steps[step].val = v;
+ ++step;
+
+ res->steps[step].transform = SETCC_TR_SBB;
+ res->num_steps = ++step;
+ return;
+ } else if (pnc == (pn_Cmp_Ge | ia32_pn_Cmp_unsigned)) {
+ res->steps[step].transform = SETCC_TR_AND;
+ res->steps[step].val = v;
+ ++step;
+
+ res->steps[step].transform = SETCC_TR_NOT;
+ ++step;
+
+ res->steps[step].transform = SETCC_TR_SBB;
+ res->num_steps = ++step;
+ return;
+ } else if (can_permutate && pnc == (pn_Cmp_Gt | ia32_pn_Cmp_unsigned)) {
+ res->permutate_cmp_ins ^= 1;
+
+ res->steps[step].transform = SETCC_TR_NOT;
+ ++step;
+
+ res->steps[step].transform = SETCC_TR_AND;
+ res->steps[step].val = v;
+ ++step;
+
+ res->steps[step].transform = SETCC_TR_SBB;
+ res->num_steps = ++step;
+ return;
+ } else if (can_permutate && pnc == (pn_Cmp_Le | ia32_pn_Cmp_unsigned)) {
+ res->permutate_cmp_ins ^= 1;
+
+ res->steps[step].transform = SETCC_TR_AND;
+ res->steps[step].val = v;
+ ++step;
+
+ res->steps[step].transform = SETCC_TR_SBB;
+ res->num_steps = ++step;
+ return;
+ }
+ }
+
+ res->steps[step].val = 0;
+ switch (v) {
+ case 9:
+ if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+ --step;
+ res->steps[step].transform = SETCC_TR_LEAxx;
+ res->steps[step].scale = 3; /* (a << 3) + a */
+ break;
+ case 8:
+ if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+ --step;
+ res->steps[step].transform = res->steps[step].val == 0 ? SETCC_TR_SHL : SETCC_TR_LEA;
+ res->steps[step].scale = 3; /* (a << 3) */
+ break;
+ case 5:
+ if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+ --step;
+ res->steps[step].transform = SETCC_TR_LEAxx;
+ res->steps[step].scale = 2; /* (a << 2) + a */
+ break;
+ case 4:
+ if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+ --step;
+ res->steps[step].transform = res->steps[step].val == 0 ? SETCC_TR_SHL : SETCC_TR_LEA;
+ res->steps[step].scale = 2; /* (a << 2) */
+ break;
+ case 3:
+ if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+ --step;
+ res->steps[step].transform = SETCC_TR_LEAxx;
+ res->steps[step].scale = 1; /* (a << 1) + a */
+ break;
+ case 2:
+ if (step > 0 && res->steps[step - 1].transform == SETCC_TR_ADD)
+ --step;
+ res->steps[step].transform = res->steps[step].val == 0 ? SETCC_TR_SHL : SETCC_TR_LEA;
+ res->steps[step].scale = 1; /* (a << 1) */
+ break;
+ case 1:
+ res->num_steps = step;
+ return;
+ default:
+ if (! tarval_is_single_bit(t)) {
+ res->steps[step].transform = SETCC_TR_AND;
+ res->steps[step].val = v;
+ ++step;
+ res->steps[step].transform = SETCC_TR_NEG;
+ } else {
+ int v = get_tarval_lowest_bit(t);
+ assert(v >= 0);
+
+ res->steps[step].transform = SETCC_TR_SHL;
+ res->steps[step].scale = v;
+ }
+ }
+ ++step;
+ res->steps[step].transform = SETCC_TR_SET;
+ res->num_steps = ++step;
+ return;
+ }
+ panic("tarval is not long");
+}
+
/**
* Transforms a Mux node into some code sequence.
*
}
}
}
+
if (is_Const(mux_true) && is_Const(mux_false)) {
ia32_address_mode_t am;
ir_node *load;
unsigned scale;
flags = get_flags_node(cond, &pnc);
- new_node = create_set_32bit(dbgi, new_block, flags, pnc, node, /*is_permuted=*/0);
+ new_node = create_set_32bit(dbgi, new_block, flags, pnc, node);
if (ia32_cg_config.use_sse2) {
/* cannot load from different mode on SSE */
is_Const_0(mux_false) && is_Sub(mux_true) &&
get_Sub_left(mux_true) == cmp_left && get_Sub_right(mux_true) == cmp_right) {
/* Mux(a >=u b, a - b, 0) unsigned Doz */
- return create_Doz(node, cmp_left, cmp_right);
+ return create_doz(node, cmp_left, cmp_right);
} else if ((pnc & pn_Cmp_Lt) && !mode_is_signed(mode) &&
is_Const_0(mux_true) && is_Sub(mux_false) &&
get_Sub_left(mux_false) == cmp_left && get_Sub_right(mux_false) == cmp_right) {
/* Mux(a <=u b, 0, a - b) unsigned Doz */
- return create_Doz(node, cmp_left, cmp_right);
+ return create_doz(node, cmp_left, cmp_right);
}
}
}
if (is_Const(mux_true) && is_Const(mux_false)) {
/* both are const, good */
- if (is_Const_1(mux_true) && is_Const_0(mux_false)) {
- new_node = create_set_32bit(dbgi, new_block, flags, pnc, node, /*is_premuted=*/0);
- } else if (is_Const_0(mux_true) && is_Const_1(mux_false)) {
- new_node = create_set_32bit(dbgi, new_block, flags, pnc, node, /*is_premuted=*/1);
- } else {
- /* Not that simple. */
- goto need_cmov;
+ tarval *tv_true = get_Const_tarval(mux_true);
+ tarval *tv_false = get_Const_tarval(mux_false);
+ setcc_transform_t res;
+ int step;
+
+ /* check if flags is a cmp node and we are the only user,
+ i.e no other user yet */
+ int permutate_allowed = 0;
+ if (is_ia32_Cmp(flags) && get_irn_n_edges(flags) == 0) {
+ /* yes, we can permutate its inputs */
+ permutate_allowed = 1;
+ }
+ find_const_transform(pnc, tv_true, tv_false, &res, 0);
+ new_node = node;
+ if (res.permutate_cmp_ins) {
+ ia32_attr_t *attr = get_ia32_attr(flags);
+ attr->data.ins_permuted ^= 1;
+ }
+ for (step = (int)res.num_steps - 1; step >= 0; --step) {
+ ir_node *imm;
+
+ switch (res.steps[step].transform) {
+ case SETCC_TR_ADD:
+ imm = ia32_immediate_from_long(res.steps[step].val);
+ new_node = new_bd_ia32_Add(dbgi, new_block, noreg_GP, noreg_GP, nomem, new_node, imm);
+ break;
+ case SETCC_TR_ADDxx:
+ new_node = new_bd_ia32_Lea(dbgi, new_block, new_node, new_node);
+ break;
+ case SETCC_TR_LEA:
+ new_node = new_bd_ia32_Lea(dbgi, new_block, noreg_GP, new_node);
+ set_ia32_am_scale(new_node, res.steps[step].scale);
+ set_ia32_am_offs_int(new_node, res.steps[step].val);
+ break;
+ case SETCC_TR_LEAxx:
+ new_node = new_bd_ia32_Lea(dbgi, new_block, new_node, new_node);
+ set_ia32_am_scale(new_node, res.steps[step].scale);
+ set_ia32_am_offs_int(new_node, res.steps[step].val);
+ break;
+ case SETCC_TR_SHL:
+ imm = ia32_immediate_from_long(res.steps[step].scale);
+ new_node = new_bd_ia32_Shl(dbgi, new_block, new_node, imm);
+ break;
+ case SETCC_TR_NEG:
+ new_node = new_bd_ia32_Neg(dbgi, new_block, new_node);
+ break;
+ case SETCC_TR_NOT:
+ new_node = new_bd_ia32_Not(dbgi, new_block, new_node);
+ break;
+ case SETCC_TR_AND:
+ imm = ia32_immediate_from_long(res.steps[step].val);
+ new_node = new_bd_ia32_And(dbgi, new_block, noreg_GP, noreg_GP, nomem, new_node, imm);
+ break;
+ case SETCC_TR_SET:
+ new_node = create_set_32bit(dbgi, new_block, flags, res.pnc, new_node);
+ break;
+ case SETCC_TR_SBB:
+ new_node = new_bd_ia32_Sbb0(dbgi, new_block, flags);
+ break;
+ default:
+ panic("unknown setcc transform");
+ }
}
} else {
-need_cmov:
new_node = create_CMov(node, cond, flags, pnc);
}
return new_node;
assert(!mode_is_int(src_mode) || src_bits <= 32);
assert(!mode_is_int(tgt_mode) || tgt_bits <= 32);
+ /* modeB -> X should already be lowered by the lower_mode_b pass */
if (src_mode == mode_b) {
- assert(mode_is_int(tgt_mode) || mode_is_reference(tgt_mode));
- /* nothing to do, we already model bools as 0/1 ints */
- return be_transform_node(op);
+ panic("ConvB not lowered %+F", node);
}
if (src_mode == tgt_mode) {
new_op = be_transform_node(op);
/* we convert from float ... */
if (mode_is_float(tgt_mode)) {
-#if 0
- /* Matze: I'm a bit unsure what the following is for? seems wrong
- * to me... */
- if (src_mode == mode_E && tgt_mode == mode_D
- && !get_Conv_strict(node)) {
- DB((dbg, LEVEL_1, "killed Conv(mode, mode) ..."));
- return new_op;
- }
-#endif
-
/* ... to float */
if (ia32_cg_config.use_sse2) {
DB((dbg, LEVEL_1, "create Conv(float, float) ..."));
flag = new_r_Proj(block, real, mode_b, pn_ia32_flags);
/* sete */
- set = new_bd_ia32_Set(dbgi, block, flag, pn_Cmp_Eq, 0);
+ set = new_bd_ia32_Setcc(dbgi, block, flag, pn_Cmp_Eq);
SET_IA32_ORIG_NODE(set, node);
/* conv to 32bit */
cmp = fix_mem_proj(cmp, &am);
/* setp */
- new_node = new_bd_ia32_Set(dbgi, new_block, cmp, ia32_pn_Cmp_parity, 0);
+ new_node = new_bd_ia32_Setcc(dbgi, new_block, cmp, ia32_pn_Cmp_parity);
SET_IA32_ORIG_NODE(new_node, node);
/* conv to 32bit */
initial_fpcw = NULL;
no_pic_adjust = 0;
- BE_TIMER_PUSH(t_heights);
+ be_timer_push(T_HEIGHTS);
heights = heights_new(cg->irg);
- BE_TIMER_POP(t_heights);
+ be_timer_pop(T_HEIGHTS);
ia32_calculate_non_address_mode_nodes(cg->birg);
/* the transform phase is not safe for CSE (yet) because several nodes get
projects / libfirm / blobdiff