op_flags => "c",
irn_flags => "I",
reg_req => { out => [ "gp_NOREG" ] },
- attr => "ir_entity *symconst, int symconst_sign, tarval *offset",
+ attr => "ir_entity *symconst, int symconst_sign, long offset",
attr_type => "ia32_immediate_attr_t",
mode => $mode_gp,
},
FldCW => {
op_flags => "L|F",
- state => "exc_pinned",
+ state => "pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
latency => 5,
emit => ". fldcw %AM",
FnstCW => {
op_flags => "L|F",
- state => "exc_pinned",
+ state => "pinned",
reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
latency => 5,
emit => ". fnstcw %AM",
Cltd => {
# we should not rematrialize this node. It produces 2 results and has
# very strict constrains
- reg_req => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
+ reg_req => { in => [ "eax" ], out => [ "edx" ] },
+ ins => [ "val" ],
emit => '. cltd',
- outs => [ "EAX", "EDX" ],
+ mode => $mode_gp,
units => [ "GP" ],
},
# Load / Store
+#
+# Note that we add additional latency values depending on address mode, so a
+# lateny of 0 for load is correct
Load => {
op_flags => "L|F",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
- latency => 3,
+ latency => 0,
emit => ". mov%SE%ME%.l %AM, %D0",
outs => [ "res", "M" ],
units => [ "GP" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
emit => '. mov%M %binop',
- latency => 3,
+ latency => 2,
units => [ "GP" ],
mode => "mode_M",
},
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
emit => '. mov%M %binop',
- latency => 3,
+ latency => 2,
units => [ "GP" ],
mode => "mode_M",
},
emit => '. push%M %unop2',
ins => [ "base", "index", "val", "stack", "mem" ],
outs => [ "stack:I|S", "M" ],
- latency => 3,
+ latency => 2,
units => [ "GP" ],
modified_flags => [],
},
emit => '. pop%M %DAM1',
outs => [ "stack:I|S", "res", "M" ],
ins => [ "base", "index", "stack", "mem" ],
- latency => 4,
+ latency => 3, # Pop is more expensive than Push on Athlon
units => [ "GP" ],
modified_flags => [],
},
GetST0 => {
op_flags => "L|F",
irn_flags => "I",
- state => "exc_pinned",
+ state => "pinned",
reg_req => { in => [ "gp", "gp", "none" ] },
emit => '. fstp%XM %AM',
latency => 4,
SetST0 => {
op_flags => "L|F",
irn_flags => "I",
- state => "exc_pinned",
+ state => "pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
ins => [ "base", "index", "mem" ],
emit => '. fld%XM %AM',
vfadd => {
irn_flags => "R",
- reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
+ ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
latency => 4,
units => [ "VFP" ],
mode => "mode_E",
vfmul => {
irn_flags => "R",
- reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
+ ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
latency => 4,
units => [ "VFP" ],
mode => "mode_E",
vfsub => {
irn_flags => "R",
- reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
+ ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
latency => 4,
units => [ "VFP" ],
mode => "mode_E",
},
vfdiv => {
- reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
+ reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
+ ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
outs => [ "res", "M" ],
latency => 20,
units => [ "VFP" ],
},
vfprem => {
- reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
+ ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
latency => 20,
units => [ "VFP" ],
mode => "mode_E",
vfabs => {
irn_flags => "R",
reg_req => { in => [ "vfp"], out => [ "vfp" ] },
+ ins => [ "value" ],
latency => 2,
units => [ "VFP" ],
mode => "mode_E",
vfchs => {
irn_flags => "R",
reg_req => { in => [ "vfp"], out => [ "vfp" ] },
+ ins => [ "value" ],
latency => 2,
units => [ "VFP" ],
mode => "mode_E",
attr_type => "ia32_x87_attr_t",
},
-vfsin => {
- irn_flags => "R",
- reg_req => { in => [ "vfp"], out => [ "vfp" ] },
- latency => 150,
- units => [ "VFP" ],
- mode => "mode_E",
- attr_type => "ia32_x87_attr_t",
-},
-
-vfcos => {
- irn_flags => "R",
- reg_req => { in => [ "vfp"], out => [ "vfp" ] },
- latency => 150,
- units => [ "VFP" ],
- mode => "mode_E",
- attr_type => "ia32_x87_attr_t",
-},
-
-vfsqrt => {
- irn_flags => "R",
- reg_req => { in => [ "vfp"], out => [ "vfp" ] },
- latency => 30,
- units => [ "VFP" ],
- mode => "mode_E",
- attr_type => "ia32_x87_attr_t",
-},
-
# virtual Load and Store
vfld => {
op_flags => "L|F",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
+ ins => [ "base", "index", "mem" ],
outs => [ "res", "M" ],
+ attr => "ir_mode *store_mode",
+ init_attr => "attr->attr.ls_mode = store_mode;",
latency => 2,
units => [ "VFP" ],
attr_type => "ia32_x87_attr_t",
op_flags => "L|F",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
+ ins => [ "base", "index", "val", "mem" ],
+ attr => "ir_mode *store_mode",
+ init_attr => "attr->attr.ls_mode = store_mode;",
latency => 2,
units => [ "VFP" ],
mode => "mode_M",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
outs => [ "res", "M" ],
+ ins => [ "base", "index", "mem" ],
latency => 4,
units => [ "VFP" ],
attr_type => "ia32_x87_attr_t",
vfist => {
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
+ ins => [ "base", "index", "val", "fpcw", "mem" ],
latency => 4,
units => [ "VFP" ],
mode => "mode_M",
attr_type => "ia32_x87_attr_t",
},
-fsin => {
- op_flags => "R",
- rd_constructor => "NONE",
- reg_req => { },
- emit => '. fsin',
- attr_type => "ia32_x87_attr_t",
-},
-
-fcos => {
- op_flags => "R",
- rd_constructor => "NONE",
- reg_req => { },
- emit => '. fcos',
- attr_type => "ia32_x87_attr_t",
-},
-
-fsqrt => {
- op_flags => "R",
- rd_constructor => "NONE",
- reg_req => { },
- emit => '. fsqrt $',
- attr_type => "ia32_x87_attr_t",
-},
-
# x87 Load and Store
fld => {