-# Creation: 2005/10/19
-# $Id$
# This is the specification for the ia32 assembler Firm-operations
-use File::Basename;
-
-$new_emit_syntax = 1;
-my $myname = $0;
-
-# the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
$arch = "ia32";
-# The node description is done as a perl hash initializer with the
-# following structure:
-#
-# %nodes = (
-#
-# <op-name> => {
-# op_flags => "N|L|C|X|I|F|Y|H|c|K",
-# irn_flags => "R|N"
-# arity => "0|1|2|3 ... |variable|dynamic|any",
-# state => "floats|pinned|mem_pinned|exc_pinned",
-# args => [
-# { type => "type 1", name => "name 1" },
-# { type => "type 2", name => "name 2" },
-# ...
-# ],
-# comment => "any comment for constructor",
-# reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
-# cmp_attr => "c source code for comparing node attributes",
-# outs => { "out1", "out2" } # optional, creates pn_op_out1, ... consts
-# ins => { "in1", "in2" } # optional, creates n_op_in1, ... consts
-# mode => "mode_Iu" # optional, predefines the mode
-# emit => "emit code with templates",
-# attr => "additional attribute arguments for constructor",
-# init_attr => "emit attribute initialization template",
-# rd_constructor => "c source code which constructs an ir_node",
-# hash_func => "name of the hash function for this operation",
-# latency => "latency of this operation (can be float)"
-# attr_type => "name of the attribute struct",
-# modified_flags => [ "CF", ... ] # optional, list of modified flags
-# },
-#
-# ... # (all nodes you need to describe)
-#
-# ); # close the %nodes initializer
-
-# op_flags: flags for the operation, OPTIONAL (default is "N")
-# the op_flags correspond to the firm irop_flags:
-# N irop_flag_none
-# L irop_flag_labeled
-# C irop_flag_commutative
-# X irop_flag_cfopcode
-# I irop_flag_ip_cfopcode
-# F irop_flag_fragile
-# Y irop_flag_forking
-# H irop_flag_highlevel
-# c irop_flag_constlike
-# K irop_flag_keep
-# NB irop_flag_dump_noblock
-# NI irop_flag_dump_noinput
-#
-# irn_flags: special node flags, OPTIONAL (default is 0)
-# following irn_flags are supported:
-# R rematerializeable
-# N not spillable
-#
-# state: state of the operation, OPTIONAL (default is "floats")
-#
-# arity: arity of the operation, MUST NOT BE OMITTED
-#
-# args: the OPTIONAL arguments of the node constructor (debug, irg and block
-# are always the first 3 arguments and are always autmatically
-# created)
-# If this key is missing the following arguments will be created:
-# for i = 1 .. arity: ir_node *op_i
-# ir_mode *mode
-#
-# outs: if a node defines more than one output, the names of the projections
-# nodes having outs having automatically the mode mode_T
-# example: [ "frame", "stack", "M" ]
-#
-# comment: OPTIONAL comment for the node constructor
-#
-# rd_constructor: for every operation there will be a
-# new_rd_<arch>_<op-name> function with the arguments from above
-# which creates the ir_node corresponding to the defined operation
-# you can either put the complete source code of this function here
-#
-# This key is OPTIONAL. If omitted, the following constructor will
-# be created:
-# if (!op_<arch>_<op-name>) assert(0);
-# for i = 1 to arity
-# set in[i] = op_i
-# done
-# res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
-# return res
-#
-# NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
-#
+$mode_xmm = "mode_D";
+$mode_mmx = "mode_D";
+$mode_fp87 = "ia32_mode_E";
+$mode_gp = "mode_Iu";
+$mode_flags = "mode_Iu";
+$mode_fpcw = "ia32_mode_fpcw";
# register types:
-# 0 - no special type
-# 1 - caller save (register must be saved by the caller of a function)
-# 2 - callee save (register must be saved by the called function)
-# 4 - ignore (do not assign this register)
-# 8 - emitter can choose an arbitrary register of this class
-# 16 - the register is a virtual one
-# 32 - register represents a state
+$normal = 0; # no special type
+$ignore = 1; # ignore (do not assign this register)
+$arbitrary = 2; # emitter can choose an arbitrary register of this class
+$virtual = 4; # the register is a virtual one
+$state = 8; # register represents a state
# NOTE: Last entry of each class is the largest Firm-Mode a register can hold
%reg_classes = (
gp => [
- { name => "edx", type => 1 },
- { name => "ecx", type => 1 },
- { name => "eax", type => 1 },
- { name => "ebx", type => 2 },
- { name => "esi", type => 2 },
- { name => "edi", type => 2 },
- { name => "ebp", type => 2 },
- { name => "esp", type => 4 },
- { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
- { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
- { mode => "mode_Iu" }
+ { name => "edx" },
+ { name => "ecx" },
+ { name => "eax" },
+ { name => "ebx" },
+ { name => "esi" },
+ { name => "edi" },
+ { name => "ebp" },
+ { name => "esp", type => $ignore },
+ { name => "gp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes
+ { mode => $mode_gp }
],
mmx => [
- { name => "mm0", type => 4 },
- { name => "mm1", type => 4 },
- { name => "mm2", type => 4 },
- { name => "mm3", type => 4 },
- { name => "mm4", type => 4 },
- { name => "mm5", type => 4 },
- { name => "mm6", type => 4 },
- { name => "mm7", type => 4 },
- { mode => "mode_E", flags => "manual_ra" }
+ { name => "mm0", type => $ignore },
+ { name => "mm1", type => $ignore },
+ { name => "mm2", type => $ignore },
+ { name => "mm3", type => $ignore },
+ { name => "mm4", type => $ignore },
+ { name => "mm5", type => $ignore },
+ { name => "mm6", type => $ignore },
+ { name => "mm7", type => $ignore },
+ { mode => $mode_mmx, flags => "manual_ra" }
],
xmm => [
- { name => "xmm0", type => 1 },
- { name => "xmm1", type => 1 },
- { name => "xmm2", type => 1 },
- { name => "xmm3", type => 1 },
- { name => "xmm4", type => 1 },
- { name => "xmm5", type => 1 },
- { name => "xmm6", type => 1 },
- { name => "xmm7", type => 1 },
- { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
- { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
- { mode => "mode_E" }
+ { name => "xmm0" },
+ { name => "xmm1" },
+ { name => "xmm2" },
+ { name => "xmm3" },
+ { name => "xmm4" },
+ { name => "xmm5" },
+ { name => "xmm6" },
+ { name => "xmm7" },
+ { name => "xmm_NOREG", type => $ignore | $virtual }, # we need a dummy register for NoReg nodes
+ { mode => $mode_xmm }
],
vfp => [
- { name => "vf0", type => 1 },
- { name => "vf1", type => 1 },
- { name => "vf2", type => 1 },
- { name => "vf3", type => 1 },
- { name => "vf4", type => 1 },
- { name => "vf5", type => 1 },
- { name => "vf6", type => 1 },
- { name => "vf7", type => 1 },
- { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
- { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
- { mode => "mode_E" }
+ { name => "vf0" },
+ { name => "vf1" },
+ { name => "vf2" },
+ { name => "vf3" },
+ { name => "vf4" },
+ { name => "vf5" },
+ { name => "vf6" },
+ { name => "vf7" },
+ { name => "vfp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes
+ { mode => $mode_fp87 }
],
st => [
- { name => "st0", realname => "st", type => 4 },
- { name => "st1", realname => "st(1)", type => 4 },
- { name => "st2", realname => "st(2)", type => 4 },
- { name => "st3", realname => "st(3)", type => 4 },
- { name => "st4", realname => "st(4)", type => 4 },
- { name => "st5", realname => "st(5)", type => 4 },
- { name => "st6", realname => "st(6)", type => 4 },
- { name => "st7", realname => "st(7)", type => 4 },
- { mode => "mode_E", flags => "manual_ra" }
+ { name => "st0", realname => "st", type => $ignore },
+ { name => "st1", realname => "st(1)", type => $ignore },
+ { name => "st2", realname => "st(2)", type => $ignore },
+ { name => "st3", realname => "st(3)", type => $ignore },
+ { name => "st4", realname => "st(4)", type => $ignore },
+ { name => "st5", realname => "st(5)", type => $ignore },
+ { name => "st6", realname => "st(6)", type => $ignore },
+ { name => "st7", realname => "st(7)", type => $ignore },
+ { mode => $mode_fp87, flags => "manual_ra" }
],
fp_cw => [ # the floating point control word
- { name => "fpcw", type => 4|32 },
- { mode => "mode_fpcw", flags => "manual_ra|state" }
+ { name => "fpcw", type => $ignore | $state },
+ { mode => $mode_fpcw, flags => "manual_ra|state" }
],
flags => [
{ name => "eflags", type => 0 },
S1 => "${arch}_emit_source_register(node, 1);",
S2 => "${arch}_emit_source_register(node, 2);",
S3 => "${arch}_emit_source_register(node, 3);",
+ SB0 => "${arch}_emit_8bit_source_register_or_immediate(node, 0);",
SB1 => "${arch}_emit_8bit_source_register_or_immediate(node, 1);",
SB2 => "${arch}_emit_8bit_source_register_or_immediate(node, 2);",
SB3 => "${arch}_emit_8bit_source_register_or_immediate(node, 3);",
+ SH0 => "${arch}_emit_8bit_high_source_register(node, 0);",
+ SS0 => "${arch}_emit_16bit_source_register_or_immediate(node, 0);",
+ SI0 => "${arch}_emit_source_register_or_immediate(node, 0);",
SI1 => "${arch}_emit_source_register_or_immediate(node, 1);",
SI3 => "${arch}_emit_source_register_or_immediate(node, 3);",
D0 => "${arch}_emit_dest_register(node, 0);",
D1 => "${arch}_emit_dest_register(node, 1);",
+ DS0 => "${arch}_emit_dest_register_size(node, 0);",
DB0 => "${arch}_emit_8bit_dest_register(node, 0);",
X0 => "${arch}_emit_x87_register(node, 0);",
X1 => "${arch}_emit_x87_register(node, 1);",
unop4 => "${arch}_emit_unop(node, n_ia32_binary_right);",
binop => "${arch}_emit_binop(node);",
x87_binop => "${arch}_emit_x87_binop(node);",
- CMP0 => "${arch}_emit_cmp_suffix_node(node, 0);",
CMP3 => "${arch}_emit_cmp_suffix_node(node, 3);",
);
-#--------------------------------------------------#
-# _ #
-# (_) #
-# _ __ _____ __ _ _ __ ___ _ __ ___ #
-# | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
-# | | | | __/\ V V / | | | | (_) | |_) \__ \ #
-# |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
-# | | #
-# |_| #
-#--------------------------------------------------#
+
+
$default_op_attr_type = "ia32_op_attr_t";
$default_attr_type = "ia32_attr_t";
$default_copy_attr = "ia32_copy_attr";
sub ia32_custom_init_attr {
- my $node = shift;
- my $name = shift;
- my $res = "";
+ my $constr = shift;
+ my $node = shift;
+ my $name = shift;
+ my $res = "";
if(defined($node->{modified_flags})) {
- $res .= "\tarch_irn_add_flags(res, arch_irn_flags_modify_flags);\n";
+ $res .= "\tarch_add_irn_flags(res, arch_irn_flags_modify_flags);\n";
}
if(defined($node->{am})) {
my $am = $node->{am};
%init_attr = (
ia32_asm_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_ia32_x87_attributes(res);".
"\tinit_ia32_asm_attributes(res);",
ia32_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);",
ia32_call_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_ia32_call_attributes(res, pop, call_tp);",
ia32_condcode_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
- "\tinit_ia32_condcode_attributes(res, pnc);",
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
+ "\tinit_ia32_condcode_attributes(res, condition_code);",
+ ia32_switch_attr_t =>
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
+ "\tinit_ia32_switch_attributes(res, switch_table);",
ia32_copyb_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_ia32_copyb_attributes(res, size);",
ia32_immediate_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
- "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);",
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
+ "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, no_pic_adjust, offset);",
ia32_x87_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_ia32_x87_attributes(res);",
ia32_climbframe_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
+ "\tinit_ia32_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_ia32_climbframe_attributes(res, count);",
);
%compare_attr = (
- ia32_asm_attr_t => "ia32_compare_asm_attr",
+ ia32_asm_attr_t => "ia32_compare_asm_attr",
ia32_attr_t => "ia32_compare_nodes_attr",
ia32_call_attr_t => "ia32_compare_call_attr",
ia32_condcode_attr_t => "ia32_compare_condcode_attr",
ia32_copyb_attr_t => "ia32_compare_copyb_attr",
+ ia32_switch_attr_t => "ia32_compare_nodes_attr",
ia32_immediate_attr_t => "ia32_compare_immediate_attr",
ia32_x87_attr_t => "ia32_compare_x87_attr",
ia32_climbframe_attr_t => "ia32_compare_climbframe_attr",
%operands = (
);
-$mode_xmm = "mode_E";
-$mode_gp = "mode_Iu";
-$mode_flags = "mode_Iu";
-$mode_fpcw = "mode_fpcw";
$status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
$status_flags_wo_cf = [ "PF", "AF", "ZF", "SF", "OF" ];
$fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
Immediate => {
state => "pinned",
- op_flags => "c",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "not_scheduled" ],
reg_req => { out => [ "gp_NOREG:I" ] },
- attr => "ir_entity *symconst, int symconst_sign, long offset",
+ attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset",
attr_type => "ia32_immediate_attr_t",
hash_func => "ia32_hash_Immediate",
latency => 0,
# "allocates" a free register
ProduceVal => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike", "cse_neutral" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
emit => "",
units => [ ],
cmp_attr => "return 1;",
},
-#-----------------------------------------------------------------#
-# _ _ _ #
-# (_) | | | | #
-# _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
-# | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
-# | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
-# |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
-# __/ | #
-# |___/ #
-#-----------------------------------------------------------------#
-
-# commutative operations
-
Add => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
AddMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
AddMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
l_Add => {
- op_flags => "C",
- reg_req => { in => [ "none", "none" ], out => [ "none" ] },
ins => [ "left", "right" ],
+ attr_type => "",
+ dump_func => "NULL",
},
l_Adc => {
- reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
ins => [ "left", "right", "eflags" ],
+ attr_type => "",
+ dump_func => "NULL",
},
Mul => {
# very strict constraints
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ],
- out => [ "eax", "flags", "edx", "none" ] },
+ out => [ "eax", "flags", "none", "edx" ] },
ins => [ "base", "index", "mem", "left", "right" ],
emit => '. mul%M %unop4',
- outs => [ "res_low", "flags", "res_high", "M" ],
+ outs => [ "res_low", "flags", "M", "res_high" ],
am => "source,binary",
latency => 10,
units => [ "GP" ],
},
l_Mul => {
- # we should not rematrialize this node. It produces 2 results and has
- # very strict constraints
- op_flags => "C",
- cmp_attr => "return 1;",
- outs => [ "EAX", "flags", "EDX", "M" ],
- arity => 2
+ ins => [ "left", "right" ],
+ outs => [ "res_low", "flags", "M", "res_high" ],
+ attr_type => "",
+ dump_func => "NULL",
},
IMul => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
# TODO: adjust out requirements for the 3 operand form
# (no need for should_be_same then)
},
IMul1OP => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ],
- out => [ "eax", "flags", "edx", "none" ] },
+ out => [ "eax", "flags", "none", "edx" ] },
ins => [ "base", "index", "mem", "left", "right" ],
emit => '. imul%M %unop4',
- outs => [ "res_low", "flags", "res_high", "M" ],
+ outs => [ "res_low", "flags", "M", "res_high" ],
am => "source,binary",
latency => 5,
units => [ "GP" ],
},
l_IMul => {
- op_flags => "C",
- cmp_attr => "return 1;",
- outs => [ "res_low", "res_high", "M" ],
- arity => 2
+ ins => [ "left", "right" ],
+ outs => [ "res_low", "flags", "M", "res_high" ],
+ attr_type => "",
+ dump_func => "NULL",
},
And => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
outs => [ "res", "flags", "M" ],
- op_modes => "commutative | am | immediate | mode_neutral",
am => "source,binary",
emit => '. and%M %binop',
units => [ "GP" ],
},
AndMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
AndMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
Or => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
OrMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
OrMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
Xor => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
Xor0 => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp", "flags" ] },
outs => [ "res", "flags" ],
emit => ". xor%M %D0, %D0",
},
XorMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
XorMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
modified_flags => $status_flags
},
-# not commutative operations
-
Sub => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4", "flags", "none" ] },
},
SubMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "subtrahend" ],
},
SubMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "subtrahend" ],
Sbb => {
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ],
- out => [ "in_r4 !in_r5", "flags", "none" ] },
+ out => [ "in_r4", "flags", "none" ] },
ins => [ "base", "index", "mem", "minuend", "subtrahend", "eflags" ],
outs => [ "res", "flags", "M" ],
am => "source,binary",
},
Sbb0 => {
- irn_flags => "R",
+ # Spiller currently fails when rematerializing flag consumers
+ # irn_flags => [ "rematerializable" ],
reg_req => { in => [ "flags" ], out => [ "gp", "flags" ] },
outs => [ "res", "flags" ],
emit => ". sbb%M %D0, %D0",
},
l_Sub => {
- reg_req => { in => [ "none", "none" ], out => [ "none" ] },
ins => [ "minuend", "subtrahend" ],
+ attr_type => "",
+ dump_func => "NULL",
},
l_Sbb => {
- reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
ins => [ "minuend", "subtrahend", "eflags" ],
+ attr_type => "",
+ dump_func => "NULL",
},
IDiv => {
- op_flags => "F|L",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ],
- out => [ "eax", "flags", "none", "edx", "none" ] },
+ out => [ "eax", "flags", "none", "edx", "none", "none" ] },
ins => [ "base", "index", "mem", "divisor", "dividend_low", "dividend_high" ],
- outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ],
+ outs => [ "div_res", "flags", "M", "mod_res", "X_regular", "X_except" ],
am => "source,unary",
emit => ". idiv%M %unop3",
latency => 25,
},
Div => {
- op_flags => "F|L",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ],
- out => [ "eax", "flags", "none", "edx", "none" ] },
+ out => [ "eax", "flags", "none", "edx", "none", "none" ] },
ins => [ "base", "index", "mem", "divisor", "dividend_low", "dividend_high" ],
- outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ],
+ outs => [ "div_res", "flags", "M", "mod_res", "X_regular", "X_except" ],
am => "source,unary",
emit => ". div%M %unop3",
latency => 25,
},
Shl => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
ShlMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
modified_flags => $status_flags
},
-l_ShlDep => {
- cmp_attr => "return 1;",
- ins => [ "val", "count", "dep" ],
- arity => 3
-},
-
ShlD => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "ecx" ],
out => [ "in_r1 !in_r2 !in_r3", "flags" ] },
ins => [ "val_high", "val_low", "count" ],
modified_flags => $status_flags
},
-l_ShlD => {
- cmp_attr => "return 1;",
- ins => [ "val_high", "val_low", "count" ],
- arity => 3,
-},
-
Shr => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
ShrMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
modified_flags => $status_flags
},
-l_ShrDep => {
- cmp_attr => "return 1;",
- ins => [ "val", "count", "dep" ],
- arity => 3
-},
-
ShrD => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "ecx" ],
out => [ "in_r1 !in_r2 !in_r3", "flags" ] },
ins => [ "val_high", "val_low", "count" ],
modified_flags => $status_flags
},
-l_ShrD => {
- cmp_attr => "return 1;",
- arity => 3,
- ins => [ "val_high", "val_low", "count" ],
-},
-
Sar => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
SarMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
modified_flags => $status_flags
},
-l_SarDep => {
- cmp_attr => "return 1;",
- ins => [ "val", "count", "dep" ],
- arity => 3
-},
-
Ror => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
RorMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
},
Rol => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
RolMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
modified_flags => $status_flags
},
-# unary operations
-
Neg => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
out => [ "in_r1", "flags" ] },
emit => '. neg%M %S0',
},
NegMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Minus64Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "in_r2" ] },
outs => [ "low_res", "high_res" ],
units => [ "GP" ],
Inc => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
out => [ "in_r1", "flags" ] },
ins => [ "val" ],
},
IncMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Dec => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
out => [ "in_r1", "flags" ] },
ins => [ "val" ],
},
DecMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Not => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
- out => [ "in_r1", "flags" ] },
+ out => [ "in_r1" ] },
ins => [ "val" ],
- outs => [ "res", "flags" ],
+ outs => [ "res" ],
emit => '. not%M %S0',
units => [ "GP" ],
latency => 1,
},
NotMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Cmc => {
- reg_req => { in => [ "flags" ], out => [ "flags" ] },
- emit => '.cmc',
+ reg_req => { in => [ "flags" ], out => [ "flags" ] },
+ emit => '.cmc',
units => [ "GP" ],
latency => 1,
mode => $mode_flags,
},
Stc => {
- reg_req => { out => [ "flags" ] },
- emit => '.stc',
+ reg_req => { out => [ "flags" ] },
+ emit => '.stc',
units => [ "GP" ],
latency => 1,
mode => $mode_flags,
modified_flags => $status_flags
},
-# other operations
-
Cmp => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "flags", "none", "none" ] },
outs => [ "eflags", "unused", "M" ],
am => "source,binary",
emit => '. cmp%M %binop',
- attr => "int ins_permuted, int cmp_unsigned",
- init_attr => "attr->data.ins_permuted = ins_permuted;\n".
- "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
+ attr => "bool ins_permuted",
+ init_attr => "attr->data.ins_permuted = ins_permuted;",
latency => 1,
units => [ "GP" ],
mode => $mode_flags,
},
Cmp8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags" ] },
+ reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] ,
+ out => [ "flags", "none", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
- outs => [ "eflags" ],
+ outs => [ "eflags", "unused", "M" ],
am => "source,binary",
emit => '. cmpb %binop',
- attr => "int ins_permuted, int cmp_unsigned",
- init_attr => "attr->data.ins_permuted = ins_permuted;\n".
- "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
+ attr => "bool ins_permuted",
+ init_attr => "attr->data.ins_permuted = ins_permuted;",
latency => 1,
units => [ "GP" ],
mode => $mode_flags,
modified_flags => $status_flags
},
+XorHighLow => {
+ irn_flags => [ "rematerializable" ],
+ state => "exc_pinned",
+ reg_req => { in => [ "eax ebx ecx edx" ],
+ out => [ "in_r1", "flags" ] },
+ emit => '. xorb %SH0, %SB0',
+ ins => [ "value" ],
+ outs => [ "res", "flags" ],
+ units => [ "GP" ],
+ latency => 1,
+ mode => $mode_gp,
+ modified_flags => $status_flags,
+},
+
Test => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] , out => [ "flags" ] },
+ reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] ,
+ out => [ "flags", "none", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
- outs => [ "eflags" ],
+ outs => [ "eflags", "unused", "M" ],
am => "source,binary",
emit => '. test%M %binop',
- attr => "int ins_permuted, int cmp_unsigned",
- init_attr => "attr->data.ins_permuted = ins_permuted;\n".
- "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
+ attr => "bool ins_permuted",
+ init_attr => "attr->data.ins_permuted = ins_permuted;",
latency => 1,
units => [ "GP" ],
mode => $mode_flags,
},
Test8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags" ] },
+ reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] ,
+ out => [ "flags", "none", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
- outs => [ "eflags" ],
+ outs => [ "eflags", "unused", "M" ],
am => "source,binary",
emit => '. testb %binop',
- attr => "int ins_permuted, int cmp_unsigned",
- init_attr => "attr->data.ins_permuted = ins_permuted;\n".
- "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
+ attr => "bool ins_permuted",
+ init_attr => "attr->data.ins_permuted = ins_permuted;",
latency => 1,
units => [ "GP" ],
mode => $mode_flags,
modified_flags => $status_flags
},
-Set => {
- #irn_flags => "R",
+Setcc => {
+ #irn_flags => [ "rematerializable" ],
reg_req => { in => [ "eflags" ], out => [ "eax ebx ecx edx" ] },
ins => [ "eflags" ],
+ outs => [ "res" ],
attr_type => "ia32_condcode_attr_t",
- attr => "pn_Cmp pnc, int ins_permuted",
- init_attr => "attr->attr.data.ins_permuted = ins_permuted;\n".
- "\tset_ia32_ls_mode(res, mode_Bu);\n",
- emit => '. set%CMP0 %DB0',
+ attr => "ia32_condition_code_t condition_code",
+ # The way we handle Setcc with float nodes (potentially) destroys the flags
+ # (when we emit the setX; setp; orb and the setX;setnp;andb sequences)
+ init_attr => "set_ia32_ls_mode(res, mode_Bu);\n"
+ . "\tif (condition_code & ia32_cc_additional_float_cases) {\n"
+ . "\t\tarch_add_irn_flags(res, arch_irn_flags_modify_flags);\n"
+ . "\t\t/* attr->latency = 3; */\n"
+ . "\t}\n",
latency => 1,
units => [ "GP" ],
mode => $mode_gp,
},
-SetMem => {
- #irn_flags => "R",
+SetccMem => {
+ #irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eflags" ], out => [ "none" ] },
ins => [ "base", "index", "mem","eflags" ],
attr_type => "ia32_condcode_attr_t",
- attr => "pn_Cmp pnc, int ins_permuted",
- init_attr => "attr->attr.data.ins_permuted = ins_permuted;\n".
- "\tset_ia32_ls_mode(res, mode_Bu);\n",
+ attr => "ia32_condition_code_t condition_code",
+ init_attr => "set_ia32_ls_mode(res, mode_Bu);\n",
emit => '. set%CMP3 %AM',
latency => 1,
units => [ "GP" ],
mode => 'mode_M',
},
-CMov => {
- #irn_flags => "R",
+CMovcc => {
+ #irn_flags => [ "rematerializable" ],
+ state => "exc_pinned",
# (note: leave the false,true order intact to make it compatible with other
# ia32_binary ops)
- state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "eflags" ], out => [ "in_r4 in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "eflags" ],
+ out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "val_false", "val_true", "eflags" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
attr_type => "ia32_condcode_attr_t",
- attr => "int ins_permuted, pn_Cmp pnc",
- init_attr => "attr->attr.data.ins_permuted = ins_permuted;",
+ attr => "ia32_condition_code_t condition_code",
latency => 1,
units => [ "GP" ],
mode => $mode_gp,
Jcc => {
state => "pinned",
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
reg_req => { in => [ "eflags" ], out => [ "none", "none" ] },
ins => [ "eflags" ],
outs => [ "false", "true" ],
attr_type => "ia32_condcode_attr_t",
- attr => "pn_Cmp pnc",
+ attr => "ia32_condition_code_t condition_code",
latency => 2,
units => [ "BRANCH" ],
},
SwitchJmp => {
state => "pinned",
- op_flags => "L|X|Y",
- reg_req => { in => [ "gp" ], out => [ "none" ] },
- mode => "mode_T",
- attr_type => "ia32_condcode_attr_t",
- attr => "long pnc",
- latency => 3,
+ op_flags => [ "labeled", "cfopcode", "forking" ],
+ reg_req => { in => [ "gp", "gp" ] },
+ ins => [ "base", "index" ],
+ out_arity => "variable",
+ attr_type => "ia32_switch_attr_t",
+ attr => "const ir_switch_table *switch_table",
+ latency => 2,
units => [ "BRANCH" ],
- modified_flags => $status_flags,
+},
+
+Jmp => {
+ state => "pinned",
+ irn_flags => [ "simple_jump" ],
+ op_flags => [ "cfopcode" ],
+ reg_req => { out => [ "none" ] },
+ latency => 1,
+ units => [ "BRANCH" ],
+ mode => "mode_X",
},
IJmp => {
state => "pinned",
- op_flags => "X",
+ op_flags => [ "cfopcode", "unknown_jump" ],
reg_req => { in => [ "gp", "gp", "none", "gp" ] },
ins => [ "base", "index", "mem", "target" ],
am => "source,unary",
latency => 1,
units => [ "BRANCH" ],
mode => "mode_X",
+ init_attr => "info->out_infos = NULL;", # XXX ugly hack for out requirements
},
Const => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
units => [ "GP" ],
- attr => "ir_entity *symconst, int symconst_sign, long offset",
+ attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset",
attr_type => "ia32_immediate_attr_t",
latency => 1,
mode => $mode_gp,
},
+Unknown => {
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
+ reg_req => { out => [ "gp" ] },
+ latency => 0,
+ emit => '',
+ mode => $mode_gp,
+},
+
GetEIP => {
- op_flags => "c",
+ op_flags => [ "constlike" ],
reg_req => { out => [ "gp" ] },
units => [ "GP" ],
latency => 5,
modified_flags => $status_flags,
},
-Unknown_GP => {
- state => "pinned",
- op_flags => "c|NB",
- reg_req => { out => [ "gp_UKNWN:I" ] },
- units => [],
- emit => "",
- latency => 0,
- mode => $mode_gp
-},
-
-Unknown_VFP => {
- state => "pinned",
- op_flags => "c|NB",
- reg_req => { out => [ "vfp_UKNWN:I" ] },
- units => [],
- emit => "",
- mode => "mode_E",
- latency => 0,
- attr_type => "ia32_x87_attr_t",
-},
-
-Unknown_XMM => {
- state => "pinned",
- op_flags => "c|NB",
- reg_req => { out => [ "xmm_UKNWN:I" ] },
- units => [],
- emit => "",
- latency => 0,
- mode => $mode_xmm
-},
-
NoReg_GP => {
state => "pinned",
- op_flags => "c|NB|NI",
+ op_flags => [ "constlike", "dump_noblock", "dump_noinput" ],
+ irn_flags => [ "not_scheduled" ],
reg_req => { out => [ "gp_NOREG:I" ] },
units => [],
emit => "",
NoReg_VFP => {
state => "pinned",
- op_flags => "c|NB|NI",
+ op_flags => [ "constlike", "dump_noblock", "dump_noinput" ],
+ irn_flags => [ "not_scheduled" ],
reg_req => { out => [ "vfp_NOREG:I" ] },
units => [],
emit => "",
- mode => "mode_E",
+ mode => $mode_fp87,
latency => 0,
attr_type => "ia32_x87_attr_t",
},
NoReg_XMM => {
state => "pinned",
- op_flags => "c|NB|NI",
+ op_flags => [ "constlike", "dump_noblock", "dump_noinput" ],
+ irn_flags => [ "not_scheduled" ],
reg_req => { out => [ "xmm_NOREG:I" ] },
units => [],
emit => "",
latency => 0,
- mode => "mode_E"
+ mode => $mode_xmm,
},
ChangeCW => {
state => "pinned",
- op_flags => "c",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "not_scheduled" ],
reg_req => { out => [ "fpcw:I" ] },
mode => $mode_fpcw,
latency => 3,
},
FldCW => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "fpcw:I" ] },
ins => [ "base", "index", "mem" ],
},
FnstCW => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "pinned",
reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "fpcw" ],
},
FnstCWNOP => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "pinned",
reg_req => { in => [ "fp_cw" ], out => [ "none" ] },
ins => [ "fpcw" ],
# lateny of 0 for load is correct
Load => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none" ],
+ out => [ "gp", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem" ],
- outs => [ "res", "M", "X_exc" ],
+ outs => [ "res", "unused", "M", "X_regular", "X_except" ],
latency => 0,
emit => ". mov%EX%.l %AM, %D0",
units => [ "GP" ],
},
Store => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "gp" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M", "X_exc" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. mov%M %SI3, %AM',
latency => 2,
units => [ "GP" ],
- mode => "mode_M",
},
Store8Bit => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ],
+ out => ["none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M", "X_exc" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. mov%M %SB3, %AM',
latency => 2,
units => [ "GP" ],
- mode => "mode_M",
},
Lea => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
ins => [ "base", "index" ],
emit => '. leal %AM, %D0',
units => [ "GP" ],
},
+PushEax => {
+ state => "exc_pinned",
+ reg_req => { in => [ "esp" ], out => [ "esp:I|S" ] },
+ ins => [ "stack" ],
+ outs => [ "stack" ],
+ emit => '. pushl %%eax',
+ latency => 2,
+ units => [ "GP" ],
+ mode => $mode_gp,
+},
+
Pop => {
state => "exc_pinned",
reg_req => { in => [ "none", "esp" ], out => [ "gp", "none", "none", "esp:I|S" ] },
units => [ "GP" ],
},
+CopyEbpEsp => {
+ state => "exc_pinned",
+ reg_req => { in => [ "ebp" ], out => [ "esp:I|S" ] },
+ ins => [ "ebp" ],
+ outs => [ "esp" ],
+ emit => '. movl %S0, %D0',
+ latency => 1,
+ units => [ "GP" ],
+ mode => $mode_gp,
+},
+
PopMem => {
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "none", "none", "none", "esp:I|S" ] },
outs => [ "frame", "stack" ],
latency => 3,
units => [ "GP" ],
+ state => "exc_pinned",
},
AddSP => {
},
RepPrefix => {
- op_flags => "K",
+ op_flags => [ "keep" ],
state => "pinned",
mode => "mode_M",
emit => ". rep",
},
LdTls => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
units => [ "GP" ],
+ emit => ". movl %%gs:0, %D0",
+ mode => $mode_gp,
latency => 1,
},
# BT supports source address mode, but this is unused yet
#
Bt => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp" ], out => [ "flags" ] },
ins => [ "left", "right" ],
},
Bsf => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ],
out => [ "gp", "flags", "none" ] },
},
Bsr => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ],
out => [ "gp", "flags", "none" ] },
# SSE4.2 or SSE4a popcnt instruction
#
Popcnt => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ],
out => [ "gp", "flags", "none" ] },
},
Call => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
reg_req => {
in => [ "gp", "gp", "none", "gp", "esp", "fpcw", "eax", "ecx", "edx" ],
- out => [ "esp:I|S", "fpcw:I", "none", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7" ]
+ out => [ "esp:I|S", "fpcw:I", "none", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "none", "none" ]
},
ins => [ "base", "index", "mem", "addr", "stack", "fpcw", "eax", "ecx", "edx" ],
- outs => [ "stack", "fpcw", "M", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7" ],
+ outs => [ "stack", "fpcw", "M", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "X_regular", "X_except" ],
attr_type => "ia32_call_attr_t",
attr => "unsigned pop, ir_type *call_tp",
am => "source,unary",
mode => $mode_gp
},
+#
+# bswap
+#
+Bswap => {
+ irn_flags => [ "rematerializable" ],
+ reg_req => { in => [ "gp" ],
+ out => [ "in_r1" ] },
+ emit => '. bswap%M %S0',
+ ins => [ "val" ],
+ units => [ "GP" ],
+ latency => 1,
+ mode => $mode_gp,
+},
+
+#
+# bswap16, use xchg here
+#
+Bswap16 => {
+ irn_flags => [ "rematerializable" ],
+ reg_req => { in => [ "eax ebx ecx edx" ],
+ out => [ "in_r1" ] },
+ emit => '. xchg %SB0, %SH0',
+ ins => [ "val" ],
+ units => [ "GP" ],
+ latency => 1,
+ mode => $mode_gp,
+},
+
+#
+# BreakPoint
+#
+Breakpoint => {
+ state => "pinned",
+ reg_req => { in => [ "none" ], out => [ "none" ] },
+ ins => [ "mem" ],
+ latency => 0,
+ emit => ". int3",
+ units => [ "GP" ],
+ mode => mode_M,
+},
+
+#
+# Undefined Instruction on ALL x86 CPU's
+#
+UD2 => {
+ state => "pinned",
+ reg_req => { in => [ "none" ], out => [ "none" ] },
+ ins => [ "mem" ],
+ latency => 0,
+ emit => ". .value 0x0b0f",
+ units => [ "GP" ],
+ mode => mode_M,
+},
+
+#
+# outport
+#
+Outport => {
+ irn_flags => [ "rematerializable" ],
+ state => "pinned",
+ reg_req => { in => [ "edx", "eax", "none" ], out => [ "none" ] },
+ ins => [ "port", "value", "mem" ],
+ emit => '. out%M %SS0, %SI1',
+ units => [ "GP" ],
+ latency => 1,
+ mode => mode_M,
+ modified_flags => $status_flags
+},
+
+#
+# inport
+#
+Inport => {
+ irn_flags => [ "rematerializable" ],
+ state => "pinned",
+ reg_req => { in => [ "edx", "none" ], out => [ "eax", "none" ] },
+ ins => [ "port", "mem" ],
+ outs => [ "res", "M" ],
+ emit => '. in%M %DS0, %SS0',
+ units => [ "GP" ],
+ latency => 1,
+ mode => mode_T,
+ modified_flags => $status_flags
+},
+
#
# Intel style prefetching
#
Prefetch0 => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Prefetch1 => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Prefetch2 => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
PrefetchNTA => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
# 3DNow! prefetch instructions
#
Prefetch => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
PrefetchW => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
units => [ "GP" ],
},
-#-----------------------------------------------------------------------------#
-# _____ _____ ______ __ _ _ _ #
-# / ____/ ____| ____| / _| | | | | | #
-# | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
-# \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
-# ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
-# |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
-#-----------------------------------------------------------------------------#
-
# produces a 0/+0.0
xZero => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "xmm" ] },
emit => '. xorp%XSD %D0, %D0',
latency => 3,
mode => $mode_xmm
},
+xUnknown => {
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
+ reg_req => { out => [ "xmm" ] },
+ emit => '',
+ latency => 0,
+ mode => $mode_xmm
+},
+
xPzero => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "xmm" ] },
emit => '. pxor %D0, %D0',
latency => 3,
# produces all 1 bits
xAllOnes => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "xmm" ] },
emit => '. pcmpeqb %D0, %D0',
latency => 3,
# integer shift left, dword
xPslld => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] },
emit => '. pslld %SI1, %D0',
latency => 3,
# integer shift left, qword
xPsllq => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] },
emit => '. psllq %SI1, %D0',
latency => 3,
# integer shift right, dword
xPsrld => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] },
emit => '. psrld %SI1, %D0',
latency => 1,
# mov from integer to SSE register
xMovd => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ], out => [ "xmm" ] },
emit => '. movd %S0, %D0',
latency => 1,
mode => $mode_xmm
},
-# commutative operations
-
xAdd => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. add%XXM %binop',
latency => 4,
},
xMul => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. mul%XXM %binop',
latency => 4,
},
xMax => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. max%XXM %binop',
latency => 2,
},
xMin => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. min%XXM %binop',
latency => 2,
},
xAnd => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. andp%XSD %binop',
latency => 3,
},
xOr => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. orp%XSD %binop',
latency => 3,
},
xXor => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. xorp%XSD %binop',
latency => 3,
mode => $mode_xmm
},
-# not commutative operations
-
xAndNot => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 !in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. andnp%XSD %binop',
latency => 3,
},
xSub => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4", "flags", "none" ] },
ins => [ "base", "index", "mem", "minuend", "subtrahend" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
emit => '. sub%XXM %binop',
latency => 4,
},
xDiv => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "in_r4 !in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "dividend", "divisor" ],
+ outs => [ "res", "flags", "M" ],
am => "source,binary",
- outs => [ "res", "M" ],
emit => '. div%XXM %binop',
latency => 16,
units => [ "SSE" ],
},
-# other operations
-
Ucomi => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "eflags" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
+ out => [ "eflags" ] },
ins => [ "base", "index", "mem", "left", "right" ],
outs => [ "flags" ],
am => "source,binary",
- attr => "int ins_permuted",
+ attr => "bool ins_permuted",
init_attr => "attr->data.ins_permuted = ins_permuted;",
emit => ' .ucomi%XXM %binop',
latency => 3,
modified_flags => 1,
},
-# Load / Store
-
xLoad => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none" ],
+ out => [ "xmm", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem" ],
- outs => [ "res", "M", "X_exc" ],
+ outs => [ "res", "unused", "M", "X_regular", "X_except" ],
emit => '. mov%XXM %AM, %D0',
attr => "ir_mode *load_mode",
init_attr => "attr->ls_mode = load_mode;",
},
xStore => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M", "X_exc" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. mov%XXM %S3, %AM',
latency => 0,
units => [ "SSE" ],
- mode => "mode_M",
},
xStoreSimple => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. mov%XXM %S3, %AM',
latency => 0,
units => [ "SSE" ],
- mode => "mode_M",
},
CvtSI2SS => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
ins => [ "base", "index", "mem", "val" ],
},
CvtSI2SD => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
ins => [ "base", "index", "mem", "val" ],
l_LLtoFloat => {
- op_flags => "L|F",
- cmp_attr => "return 1;",
ins => [ "val_high", "val_low" ],
+ attr_type => "",
+ dump_func => "NULL",
},
l_FloattoLL => {
- op_flags => "L|F",
- cmp_attr => "return 1;",
ins => [ "val" ],
outs => [ "res_high", "res_low" ],
+ attr_type => "",
+ dump_func => "NULL",
},
-# CopyB
-
CopyB => {
- op_flags => "F|H",
+ op_flags => [ "fragile" ],
state => "pinned",
- reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
- outs => [ "DST", "SRC", "CNT", "M" ],
+ reg_req => { in => [ "edi", "esi", "ecx", "none" ],
+ out => [ "edi", "esi", "ecx", "none", "none", "none" ] },
+ ins => [ "dest", "source", "count", "mem" ],
+ outs => [ "dest", "source", "count", "M", "X_regular", "X_except" ],
attr_type => "ia32_copyb_attr_t",
attr => "unsigned size",
units => [ "GP" ],
- latency => 3,
+ latency => 3,
# we don't care about this flag, so no need to mark this node
# modified_flags => [ "DF" ]
},
CopyB_i => {
- op_flags => "F|H",
+ op_flags => [ "fragile" ],
state => "pinned",
- reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
- outs => [ "DST", "SRC", "M" ],
+ reg_req => { in => [ "edi", "esi", "none" ],
+ out => [ "edi", "esi", "none", "none", "none" ] },
+ ins => [ "dest", "source", "mem" ],
+ outs => [ "dest", "source", "M", "X_regular", "X_except" ],
attr_type => "ia32_copyb_attr_t",
attr => "unsigned size",
units => [ "GP" ],
- latency => 3,
+ latency => 3,
# we don't care about this flag, so no need to mark this node
# modified_flags => [ "DF" ]
},
-# Conversions
-
Cwtl => {
state => "exc_pinned",
reg_req => { in => [ "eax" ], out => [ "eax" ] },
},
Conv_I2I => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "gp", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "gp" ],
+ out => [ "gp", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "res", "M" ],
+ outs => [ "res", "flags", "M", "X_regular", "X_except" ],
am => "source,unary",
units => [ "GP" ],
latency => 1,
},
Conv_I2I8Bit => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "gp", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ],
+ out => [ "gp", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
+ outs => [ "res", "flags", "M", "X_regular", "X_except" ],
am => "source,unary",
units => [ "GP" ],
latency => 1,
mode => $mode_xmm,
},
-#----------------------------------------------------------#
-# _ _ _ __ _ _ #
-# (_) | | | | / _| | | | #
-# __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
-# \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
-# \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
-# \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
-# | | #
-# _ __ ___ __| | ___ ___ #
-# | '_ \ / _ \ / _` |/ _ \/ __| #
-# | | | | (_) | (_| | __/\__ \ #
-# |_| |_|\___/ \__,_|\___||___/ #
-#----------------------------------------------------------#
-
# rematerialisation disabled for all float nodes for now, because the fpcw
# handler runs before spilling and we might end up with wrong fpcw then
vfadd => {
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
+ out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
+ outs => [ "res", "dummy", "M" ],
am => "source,binary",
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfmul => {
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
+ out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
+ outs => [ "res", "dummy", "M" ],
am => "source,binary",
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfsub => {
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
+ out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem", "minuend", "subtrahend", "fpcw" ],
+ outs => [ "res", "dummy", "M" ],
am => "source,binary",
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfdiv => {
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
+ out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem", "dividend", "divisor", "fpcw" ],
+ outs => [ "res", "dummy", "M" ],
am => "source,binary",
- outs => [ "res", "M" ],
latency => 20,
units => [ "VFP" ],
attr_type => "ia32_x87_attr_t",
ins => [ "left", "right", "fpcw" ],
latency => 20,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfabs => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp"], out => [ "vfp" ] },
ins => [ "value" ],
latency => 2,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfchs => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp"], out => [ "vfp" ] },
ins => [ "value" ],
latency => 2,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
-# virtual Load and Store
-
vfld => {
- irn_flags => "R",
- op_flags => "L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none" ],
+ out => [ "vfp", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem" ],
- outs => [ "res", "M", "X_exc" ],
+ outs => [ "res", "unused", "M", "X_regular", "X_except" ],
attr => "ir_mode *load_mode",
init_attr => "attr->attr.ls_mode = load_mode;",
latency => 2,
},
vfst => {
- irn_flags => "R",
- op_flags => "L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp" ], out => [ "none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M", "X_exc" ],
+ outs => [ "M", "X_regular", "X_except" ],
attr => "ir_mode *store_mode",
init_attr => "attr->attr.ls_mode = store_mode;",
latency => 2,
units => [ "VFP" ],
- mode => "mode_M",
attr_type => "ia32_x87_attr_t",
},
-# Conversions
-
vfild => {
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
- outs => [ "res", "M" ],
+ reg_req => { in => [ "gp", "gp", "none" ],
+ out => [ "vfp", "none", "none" ] },
+ outs => [ "res", "unused", "M" ],
ins => [ "base", "index", "mem" ],
latency => 4,
units => [ "VFP" ],
},
vfist => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ],
+ out => [ "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val", "fpcw" ],
+ outs => [ "dummy", "M", "X_regular", "X_except" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_M",
attr_type => "ia32_x87_attr_t",
},
# SSE3 fisttp instruction
vfisttp => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp" ], out => [ "in_r4", "none" ]},
+ reg_req => { in => [ "gp", "gp", "none", "vfp" ],
+ out => [ "in_r4", "none", "none", "none" ]},
ins => [ "base", "index", "mem", "val" ],
- outs => [ "res", "M" ],
+ outs => [ "res", "M", "X_regular", "X_except" ],
latency => 4,
units => [ "VFP" ],
attr_type => "ia32_x87_attr_t",
},
-
-# constants
-
vfldz => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfld1 => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfldpi => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfldln2 => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfldlg2 => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfldl2t => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
vfldl2e => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_E",
+ mode => $mode_fp87,
attr_type => "ia32_x87_attr_t",
},
-# other
-
vFucomFnstsw => {
-# we can't allow to rematerialize this node so we don't have
+# we can't allow to rematerialize this node so we don't
# accidently produce Phi(Fucom, Fucom(ins_permuted))
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp", "vfp" ], out => [ "eax" ] },
ins => [ "left", "right" ],
outs => [ "flags" ],
- attr => "int ins_permuted",
+ attr => "bool ins_permuted",
init_attr => "attr->attr.data.ins_permuted = ins_permuted;",
latency => 3,
units => [ "VFP" ],
},
vFucomi => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp", "vfp" ], out => [ "eflags" ] },
ins => [ "left", "right" ],
outs => [ "flags" ],
- attr => "int ins_permuted",
+ attr => "bool ins_permuted",
init_attr => "attr->attr.data.ins_permuted = ins_permuted;",
latency => 3,
units => [ "VFP" ],
},
vFtstFnstsw => {
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp" ], out => [ "eax" ] },
ins => [ "left" ],
outs => [ "flags" ],
- attr => "int ins_permuted",
+ attr => "bool ins_permuted",
init_attr => "attr->attr.data.ins_permuted = ins_permuted;",
latency => 3,
units => [ "VFP" ],
},
Sahf => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "eax" ], out => [ "eflags" ] },
ins => [ "val" ],
outs => [ "flags" ],
mode => $mode_flags,
},
-#------------------------------------------------------------------------#
-# ___ _____ __ _ _ _ #
-# __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
-# \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
-# > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
-# /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
-#------------------------------------------------------------------------#
-
-# Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
-# are swapped, we work this around in the emitter...
-
fadd => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fadd%XM %x87_binop',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
faddp => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. faddp%XM %x87_binop',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fmul => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fmul%XM %x87_binop',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fmulp => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fmulp%XM %x87_binop',,
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fsub => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fsub%XM %x87_binop',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
+# Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
+# are swapped, we work this around in the emitter...
+
fsubp => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
# see note about gas bugs
emit => '. fsubrp%XM %x87_binop',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fsubr => {
state => "exc_pinned",
- rd_constructor => "NONE",
- irn_flags => "R",
- reg_req => { },
+ irn_flags => [ "rematerializable" ],
emit => '. fsubr%XM %x87_binop',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fsubrp => {
state => "exc_pinned",
- rd_constructor => "NONE",
- irn_flags => "R",
- reg_req => { },
-# see note about gas bugs
+ irn_flags => [ "rematerializable" ],
+# see note about gas bugs before fsubp
emit => '. fsubp%XM %x87_binop',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fprem => {
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fprem1',
latency => 20,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
# this node is just here, to keep the simulator running
# we can omit this when a fprem simulation function exists
fpremp => {
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fprem1\n'.
'. fstp %X0',
latency => 20,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fdiv => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fdiv%XM %x87_binop',
latency => 20,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fdivp => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
-# see note about gas bugs
+# see note about gas bugs before fsubp
emit => '. fdivrp%XM %x87_binop',
latency => 20,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fdivr => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fdivr%XM %x87_binop',
latency => 20,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fdivrp => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
-# see note about gas bugs
+# see note about gas bugs before fsubp
emit => '. fdivp%XM %x87_binop',
latency => 20,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fabs => {
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fabs',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
fchs => {
- op_flags => "R|K",
- rd_constructor => "NONE",
- reg_req => { },
+ op_flags => [ "keep" ],
+ irn_flags => [ "rematerializable" ],
emit => '. fchs',
latency => 4,
attr_type => "ia32_x87_attr_t",
+ constructors => {},
},
-# x87 Load and Store
-
fld => {
- rd_constructor => "NONE",
- op_flags => "R|L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
- reg_req => { },
emit => '. fld%XM %AM',
attr_type => "ia32_x87_attr_t",
latency => 2,
+ constructors => {},
},
fst => {
- rd_constructor => "NONE",
- op_flags => "R|L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
- reg_req => { },
emit => '. fst%XM %AM',
mode => "mode_M",
attr_type => "ia32_x87_attr_t",
latency => 2,
+ constructors => {},
},
fstp => {
- rd_constructor => "NONE",
- op_flags => "R|L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
- reg_req => { },
emit => '. fstp%XM %AM',
mode => "mode_M",
attr_type => "ia32_x87_attr_t",
latency => 2,
+ constructors => {},
},
-# Conversions
-
fild => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fild%XM %AM',
attr_type => "ia32_x87_attr_t",
latency => 2,
+ constructors => {},
},
fist => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fist%XM %AM',
mode => "mode_M",
attr_type => "ia32_x87_attr_t",
latency => 2,
+ constructors => {},
},
fistp => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fistp%XM %AM',
mode => "mode_M",
attr_type => "ia32_x87_attr_t",
latency => 2,
+ constructors => {},
},
-# SSE3 firsttp instruction
+# SSE3 fisttp instruction
fisttp => {
state => "exc_pinned",
- rd_constructor => "NONE",
- reg_req => { },
emit => '. fisttp%XM %AM',
mode => "mode_M",
attr_type => "ia32_x87_attr_t",
latency => 2,
+ constructors => {},
},
-# constants
-
fldz => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldz',
attr_type => "ia32_x87_attr_t",
},
fld1 => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fld1',
attr_type => "ia32_x87_attr_t",
},
fldpi => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldpi',
attr_type => "ia32_x87_attr_t",
},
fldln2 => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldln2',
attr_type => "ia32_x87_attr_t",
},
fldlg2 => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldlg2',
attr_type => "ia32_x87_attr_t",
},
fldl2t => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldll2t',
attr_type => "ia32_x87_attr_t",
},
fldl2e => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldl2e',
attr_type => "ia32_x87_attr_t",
# Moreover, note the virtual register requierements!
fxch => {
- op_flags => "R|K",
- reg_req => { },
+ op_flags => [ "keep" ],
+ reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. fxch %X0',
attr_type => "ia32_x87_attr_t",
},
fpush => {
- op_flags => "R|K",
- reg_req => {},
+ op_flags => [ "keep" ],
+ reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. fld %X0',
attr_type => "ia32_x87_attr_t",
},
fpop => {
- op_flags => "K",
- reg_req => { },
+ op_flags => [ "keep" ],
+ reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. fstp %X0',
attr_type => "ia32_x87_attr_t",
},
ffreep => {
- op_flags => "K",
- reg_req => { },
+ op_flags => [ "keep" ],
+ reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. ffreep %X0',
attr_type => "ia32_x87_attr_t",
},
emms => {
- op_flags => "K",
- reg_req => { },
+ op_flags => [ "keep" ],
+ reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. emms',
attr_type => "ia32_x87_attr_t",
},
femms => {
- op_flags => "K",
- reg_req => { },
+ op_flags => [ "keep" ],
+ reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. femms',
attr_type => "ia32_x87_attr_t",
latency => 3,
},
-# compare
-
FucomFnstsw => {
reg_req => { },
emit => ". fucom %X1\n".
latency => 2,
},
-
-# -------------------------------------------------------------------------------- #
-# ____ ____ _____ _ _ #
-# / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
-# \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
-# ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
-# |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
-# #
-# -------------------------------------------------------------------------------- #
-
-
# Spilling and reloading of SSE registers, hardcoded, not generated #
xxLoad => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none" ],
+ out => [ "xmm", "none", "none", "none" ] },
emit => '. movdqu %D0, %AM',
- outs => [ "res", "M" ],
+ ins => [ "base", "index", "mem" ],
+ outs => [ "res", "M", "X_regular", "X_except" ],
units => [ "SSE" ],
latency => 1,
},
xxStore => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. movdqu %binop',
units => [ "SSE" ],
- latency => 1,
- mode => "mode_M",
+ latency => 1,
},
); # end of %nodes
-# Include the generated SIMD node specification written by the SIMD optimization
-$my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
-unless ($return = do $my_script_name) {
- warn "couldn't parse $my_script_name: $@" if $@;
- warn "couldn't do $my_script_name: $!" unless defined $return;
- warn "couldn't run $my_script_name" unless $return;
-}
-
# Transform some attributes
foreach my $op (keys(%nodes)) {
my $node = $nodes{$op};
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