{ mode => "mode_E" }
],
vfp => [
- { name => "vf0", type => 1 | 16 },
- { name => "vf1", type => 1 | 16 },
- { name => "vf2", type => 1 | 16 },
- { name => "vf3", type => 1 | 16 },
- { name => "vf4", type => 1 | 16 },
- { name => "vf5", type => 1 | 16 },
- { name => "vf6", type => 1 | 16 },
- { name => "vf7", type => 1 | 16 },
+ { name => "vf0", type => 1 },
+ { name => "vf1", type => 1 },
+ { name => "vf2", type => 1 },
+ { name => "vf3", type => 1 },
+ { name => "vf4", type => 1 },
+ { name => "vf5", type => 1 },
+ { name => "vf6", type => 1 },
+ { name => "vf7", type => 1 },
{ name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
{ name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
{ mode => "mode_E" }
XXM => "${arch}_emit_xmm_mode_suffix(node);",
XSD => "${arch}_emit_xmm_mode_suffix_s(node);",
AM => "${arch}_emit_am(node);",
- unop3 => "${arch}_emit_unop(node, 3);",
- unop4 => "${arch}_emit_unop(node, 4);",
+ unop3 => "${arch}_emit_unop(node, n_ia32_unary_op);",
+ unop4 => "${arch}_emit_unop(node, n_ia32_binary_right);",
binop => "${arch}_emit_binop(node);",
x87_binop => "${arch}_emit_x87_binop(node);",
CMP0 => "${arch}_emit_cmp_suffix_node(node, 0);",
if(defined($node->{am})) {
my $am = $node->{am};
if($am eq "source,unary") {
- $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_unary);";
+ $res .= "\tset_ia32_am_support(res, ia32_am_unary);";
} elsif($am eq "source,binary") {
- $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
- } elsif($am eq "source,ternary") {
- $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
+ $res .= "\tset_ia32_am_support(res, ia32_am_binary);";
} elsif($am eq "none") {
# nothing to do
} else {
$custom_init_attr_func = \&ia32_custom_init_attr;
%init_attr = (
- ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
- ia32_x87_attr_t =>
- "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
- "\tinit_ia32_x87_attributes(res);",
ia32_asm_attr_t =>
"\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
"\tinit_ia32_x87_attributes(res);".
"\tinit_ia32_asm_attributes(res);",
- ia32_immediate_attr_t =>
+ ia32_attr_t =>
+ "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
+ ia32_condcode_attr_t =>
"\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
- "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);",
+ "\tinit_ia32_condcode_attributes(res, pnc);",
ia32_copyb_attr_t =>
"\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
"\tinit_ia32_copyb_attributes(res, size);",
- ia32_condcode_attr_t =>
+ ia32_immediate_attr_t =>
"\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
- "\tinit_ia32_condcode_attributes(res, pnc);",
+ "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);",
+ ia32_x87_attr_t =>
+ "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);\n".
+ "\tinit_ia32_x87_attributes(res);",
);
%compare_attr = (
- ia32_attr_t => "ia32_compare_nodes_attr",
- ia32_x87_attr_t => "ia32_compare_x87_attr",
ia32_asm_attr_t => "ia32_compare_asm_attr",
- ia32_immediate_attr_t => "ia32_compare_immediate_attr",
- ia32_copyb_attr_t => "ia32_compare_copyb_attr",
+ ia32_attr_t => "ia32_compare_nodes_attr",
ia32_condcode_attr_t => "ia32_compare_condcode_attr",
+ ia32_copyb_attr_t => "ia32_compare_copyb_attr",
+ ia32_immediate_attr_t => "ia32_compare_immediate_attr",
+ ia32_x87_attr_t => "ia32_compare_x87_attr",
);
%operands = (
);
-$mode_xmm = "mode_E";
-$mode_gp = "mode_Iu";
-$mode_flags = "mode_Iu";
-$mode_fpcw = "mode_fpcw";
-$status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
-$fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
- "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
+$mode_xmm = "mode_E";
+$mode_gp = "mode_Iu";
+$mode_flags = "mode_Iu";
+$mode_fpcw = "mode_fpcw";
+$status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
+$status_flags_wo_cf = [ "PF", "AF", "ZF", "SF", "OF" ];
+$fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
+ "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
%nodes = (
Mul => {
# we should not rematrialize this node. It produces 2 results and has
- # very strict constrains
+ # very strict constraints
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ],
- out => [ "eax", "edx", "none" ] },
- ins => [ "base", "index", "mem", "val_high", "val_low" ],
+ out => [ "eax", "flags", "edx", "none" ] },
+ ins => [ "base", "index", "mem", "left", "right" ],
emit => '. mul%M %unop4',
- outs => [ "res_low", "res_high", "M" ],
+ outs => [ "res_low", "flags", "res_high", "M" ],
am => "source,binary",
latency => 10,
units => [ "GP" ],
l_Mul => {
# we should not rematrialize this node. It produces 2 results and has
- # very strict constrains
+ # very strict constraints
op_flags => "C",
cmp_attr => "return 1;",
- outs => [ "EAX", "EDX", "M" ],
+ outs => [ "EAX", "flags", "EDX", "M" ],
arity => 2
},
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ],
out => [ "eax", "edx", "none" ] },
- ins => [ "base", "index", "mem", "val_high", "val_low" ],
+ ins => [ "base", "index", "mem", "left", "right" ],
emit => '. imul%M %unop4',
outs => [ "res_low", "res_high", "M" ],
am => "source,binary",
out => [ "eax", "flags", "none", "edx", "none" ] },
ins => [ "base", "index", "mem", "divisor", "dividend_low", "dividend_high" ],
outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ],
- am => "source,ternary",
+ am => "source,unary",
emit => ". idiv%M %unop3",
latency => 25,
units => [ "GP" ],
out => [ "eax", "flags", "none", "edx", "none" ] },
ins => [ "base", "index", "mem", "divisor", "dividend_low", "dividend_high" ],
outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ],
- am => "source,ternary",
+ am => "source,unary",
emit => ". div%M %unop3",
latency => 25,
units => [ "GP" ],
Minus64Bit => {
irn_flags => "R",
- reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
+ reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "in_r2" ] },
outs => [ "low_res", "high_res" ],
units => [ "GP" ],
latency => 3,
units => [ "GP" ],
mode => $mode_gp,
latency => 1,
- modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
+ modified_flags => $status_flags_wo_cf
},
IncMem => {
units => [ "GP" ],
mode => "mode_M",
latency => 1,
- modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
+ modified_flags => $status_flags_wo_cf
},
Dec => {
units => [ "GP" ],
mode => $mode_gp,
latency => 1,
- modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
+ modified_flags => $status_flags_wo_cf
},
DecMem => {
units => [ "GP" ],
mode => "mode_M",
latency => 1,
- modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
+ modified_flags => $status_flags_wo_cf
},
Not => {
units => [ "GP" ],
},
-l_Load => {
- op_flags => "L|F",
- cmp_attr => "return 1;",
- outs => [ "res", "M" ],
- arity => 2,
-},
-
-l_Store => {
- op_flags => "L|F",
- cmp_attr => "return 1;",
- state => "exc_pinned",
- arity => 3,
- mode => "mode_M",
-},
-
Store => {
op_flags => "L|F",
state => "exc_pinned",
ins => [ "base", "index", "mem", "val", "stack" ],
emit => '. push%M %unop3',
outs => [ "stack:I|S", "M" ],
- am => "source,binary",
+ am => "source,unary",
latency => 2,
units => [ "GP" ],
},
},
Leave => {
- reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
+ reg_req => { in => [ "ebp" ], out => [ "ebp", "esp" ] },
emit => '. leave',
outs => [ "frame:I", "stack:I|S" ],
latency => 3,
attr_type => "ia32_x87_attr_t",
},
-l_vfild => {
- cmp_attr => "return 1;",
- outs => [ "res", "M" ],
- arity => 2,
-},
-
vfist => {
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ] },
attr_type => "ia32_x87_attr_t",
},
-l_vfist => {
- cmp_attr => "return 1;",
- state => "exc_pinned",
- arity => 3,
- mode => "mode_M",
-},
-
# constants
projects / libfirm / blobdiff