# register types:
$normal = 0; # no special type
-$caller_save = 1; # caller save (register must be saved by the caller of a function)
-$callee_save = 2; # callee save (register must be saved by the called function)
-$ignore = 4; # ignore (do not assign this register)
-$arbitrary = 8; # emitter can choose an arbitrary register of this class
-$virtual = 16; # the register is a virtual one
-$state = 32; # register represents a state
+$ignore = 1; # ignore (do not assign this register)
+$arbitrary = 2; # emitter can choose an arbitrary register of this class
+$virtual = 4; # the register is a virtual one
+$state = 8; # register represents a state
# NOTE: Last entry of each class is the largest Firm-Mode a register can hold
%reg_classes = (
gp => [
- { name => "edx", type => $caller_save },
- { name => "ecx", type => $caller_save },
- { name => "eax", type => $caller_save },
- { name => "ebx", type => $callee_save },
- { name => "esi", type => $callee_save },
- { name => "edi", type => $callee_save },
- { name => "ebp", type => $callee_save },
+ { name => "edx" },
+ { name => "ecx" },
+ { name => "eax" },
+ { name => "ebx" },
+ { name => "esi" },
+ { name => "edi" },
+ { name => "ebp" },
{ name => "esp", type => $ignore },
{ name => "gp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes
{ mode => "mode_Iu" }
{ mode => "mode_E", flags => "manual_ra" }
],
xmm => [
- { name => "xmm0", type => $caller_save },
- { name => "xmm1", type => $caller_save },
- { name => "xmm2", type => $caller_save },
- { name => "xmm3", type => $caller_save },
- { name => "xmm4", type => $caller_save },
- { name => "xmm5", type => $caller_save },
- { name => "xmm6", type => $caller_save },
- { name => "xmm7", type => $caller_save },
+ { name => "xmm0" },
+ { name => "xmm1" },
+ { name => "xmm2" },
+ { name => "xmm3" },
+ { name => "xmm4" },
+ { name => "xmm5" },
+ { name => "xmm6" },
+ { name => "xmm7" },
{ name => "xmm_NOREG", type => $ignore | $virtual }, # we need a dummy register for NoReg nodes
{ mode => "mode_E" }
],
vfp => [
- { name => "vf0", type => $caller_save },
- { name => "vf1", type => $caller_save },
- { name => "vf2", type => $caller_save },
- { name => "vf3", type => $caller_save },
- { name => "vf4", type => $caller_save },
- { name => "vf5", type => $caller_save },
- { name => "vf6", type => $caller_save },
- { name => "vf7", type => $caller_save },
+ { name => "vf0" },
+ { name => "vf1" },
+ { name => "vf2" },
+ { name => "vf3" },
+ { name => "vf4" },
+ { name => "vf5" },
+ { name => "vf6" },
+ { name => "vf7" },
{ name => "vfp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes
{ mode => "mode_E" }
],
Sbb => {
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ],
- out => [ "in_r4 !in_r5", "flags", "none" ] },
+ out => [ "in_r4", "flags", "none" ] },
ins => [ "base", "index", "mem", "minuend", "subtrahend", "eflags" ],
outs => [ "res", "flags", "M" ],
am => "source,binary",
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ],
- out => [ "eax", "flags", "none", "edx", "none" ] },
+ out => [ "eax", "flags", "none", "edx", "none", "none" ] },
ins => [ "base", "index", "mem", "divisor", "dividend_low", "dividend_high" ],
- outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ],
+ outs => [ "div_res", "flags", "M", "mod_res", "X_regular", "X_except" ],
am => "source,unary",
emit => ". idiv%M %unop3",
latency => 25,
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ],
- out => [ "eax", "flags", "none", "edx", "none" ] },
+ out => [ "eax", "flags", "none", "edx", "none", "none" ] },
ins => [ "base", "index", "mem", "divisor", "dividend_low", "dividend_high" ],
- outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ],
+ outs => [ "div_res", "flags", "M", "mod_res", "X_regular", "X_except" ],
am => "source,unary",
emit => ". div%M %unop3",
latency => 25,
modified_flags => $status_flags
},
-l_ShlDep => {
- cmp_attr => "return 1;",
- reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
- ins => [ "val", "count", "dep" ],
-},
-
ShlD => {
irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "ecx" ],
modified_flags => $status_flags
},
-l_ShlD => {
- cmp_attr => "return 1;",
- reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
- ins => [ "val_high", "val_low", "count" ],
-},
-
Shr => {
irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
modified_flags => $status_flags
},
-l_ShrDep => {
- cmp_attr => "return 1;",
- reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
- ins => [ "val", "count", "dep" ],
-},
-
ShrD => {
irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "ecx" ],
modified_flags => $status_flags
},
-l_ShrD => {
- cmp_attr => "return 1;",
- reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
- ins => [ "val_high", "val_low", "count" ],
-},
-
Sar => {
irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
modified_flags => $status_flags
},
-l_SarDep => {
- cmp_attr => "return 1;",
- ins => [ "val", "count", "dep" ],
- reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
-},
-
Ror => {
irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
SwitchJmp => {
state => "pinned",
op_flags => [ "labeled", "cfopcode", "forking" ],
- reg_req => { in => [ "gp" ] },
+ reg_req => { in => [ "gp", "gp" ] },
+ ins => [ "base", "index" ],
mode => "mode_T",
attr_type => "ia32_switch_attr_t",
attr => "long default_pn",
- latency => 3,
+ latency => 2,
units => [ "BRANCH" ],
- modified_flags => $status_flags,
init_attr => "info->out_infos = NULL;", # XXX ugly hack for out requirements
},
IJmp => {
state => "pinned",
- op_flags => [ "cfopcode" ],
+ op_flags => [ "cfopcode", "unknown_jump" ],
reg_req => { in => [ "gp", "gp", "none", "gp" ] },
ins => [ "base", "index", "mem", "target" ],
am => "source,unary",
},
FldCW => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "fpcw:I" ] },
ins => [ "base", "index", "mem" ],
},
FnstCW => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "pinned",
reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "fpcw" ],
},
FnstCWNOP => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "pinned",
reg_req => { in => [ "fp_cw" ], out => [ "none" ] },
ins => [ "fpcw" ],
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ],
- out => [ "gp", "none", "none", "none" ] },
+ out => [ "gp", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem" ],
- outs => [ "res", "unused", "M", "X_exc" ],
+ outs => [ "res", "unused", "M", "X_regular", "X_except" ],
latency => 0,
emit => ". mov%EX%.l %AM, %D0",
units => [ "GP" ],
Store => {
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "gp" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M", "X_exc" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. mov%M %SI3, %AM',
latency => 2,
units => [ "GP" ],
- mode => "mode_M",
},
Store8Bit => {
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ],
+ out => ["none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M", "X_exc" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. mov%M %SB3, %AM',
latency => 2,
units => [ "GP" ],
- mode => "mode_M",
},
Lea => {
units => [ "GP" ],
},
+CopyEbpEsp => {
+ state => "exc_pinned",
+ reg_req => { in => [ "ebp" ], out => [ "esp:I|S" ] },
+ ins => [ "ebp" ],
+ outs => [ "esp" ],
+ emit => '. movl %S0, %D0',
+ latency => 1,
+ units => [ "GP" ],
+ mode => $mode_gp,
+},
+
PopMem => {
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "none", "none", "none", "esp:I|S" ] },
},
Call => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
reg_req => {
in => [ "gp", "gp", "none", "gp", "esp", "fpcw", "eax", "ecx", "edx" ],
- out => [ "esp:I|S", "fpcw:I", "none", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7" ]
+ out => [ "esp:I|S", "fpcw:I", "none", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "none", "none" ]
},
ins => [ "base", "index", "mem", "addr", "stack", "fpcw", "eax", "ecx", "edx" ],
- outs => [ "stack", "fpcw", "M", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7" ],
+ outs => [ "stack", "fpcw", "M", "eax", "ecx", "edx", "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "X_regular", "X_except" ],
attr_type => "ia32_call_attr_t",
attr => "unsigned pop, ir_type *call_tp",
am => "source,unary",
# Intel style prefetching
#
Prefetch0 => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Prefetch1 => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Prefetch2 => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
PrefetchNTA => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
# 3DNow! prefetch instructions
#
Prefetch => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
PrefetchW => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ],
- out => [ "xmm", "none", "none", "none" ] },
+ out => [ "xmm", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem" ],
- outs => [ "res", "unused", "M", "X_exc" ],
+ outs => [ "res", "unused", "M", "X_regular", "X_except" ],
emit => '. mov%XXM %AM, %D0',
attr => "ir_mode *load_mode",
init_attr => "attr->ls_mode = load_mode;",
xStore => {
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M", "X_exc" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. mov%XXM %S3, %AM',
latency => 0,
units => [ "SSE" ],
- mode => "mode_M",
},
xStoreSimple => {
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. mov%XXM %S3, %AM',
latency => 0,
units => [ "SSE" ],
- mode => "mode_M",
},
CvtSI2SS => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
ins => [ "base", "index", "mem", "val" ],
},
CvtSI2SD => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
ins => [ "base", "index", "mem", "val" ],
l_LLtoFloat => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
cmp_attr => "return 1;",
ins => [ "val_high", "val_low" ],
reg_req => { in => [ "none", "none" ], out => [ "none" ] }
},
l_FloattoLL => {
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
cmp_attr => "return 1;",
ins => [ "val" ],
outs => [ "res_high", "res_low" ],
CopyB => {
op_flags => [ "fragile" ],
state => "pinned",
- reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
- outs => [ "DST", "SRC", "CNT", "M" ],
+ reg_req => { in => [ "edi", "esi", "ecx", "none" ],
+ out => [ "edi", "esi", "ecx", "none", "none", "none" ] },
+ ins => [ "dest", "source", "count", "mem" ],
+ outs => [ "dest", "source", "count", "M", "X_regular", "X_except" ],
attr_type => "ia32_copyb_attr_t",
attr => "unsigned size",
units => [ "GP" ],
- latency => 3,
+ latency => 3,
# we don't care about this flag, so no need to mark this node
# modified_flags => [ "DF" ]
},
CopyB_i => {
op_flags => [ "fragile" ],
state => "pinned",
- reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
- outs => [ "DST", "SRC", "M" ],
+ reg_req => { in => [ "edi", "esi", "none" ],
+ out => [ "edi", "esi", "none", "none", "none" ] },
+ ins => [ "dest", "source", "mem" ],
+ outs => [ "dest", "source", "M", "X_regular", "X_except" ],
attr_type => "ia32_copyb_attr_t",
attr => "unsigned size",
units => [ "GP" ],
- latency => 3,
+ latency => 3,
# we don't care about this flag, so no need to mark this node
# modified_flags => [ "DF" ]
},
},
Conv_I2I => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ],
- out => [ "gp", "none", "none" ] },
+ out => [ "gp", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "res", "flags", "M" ],
+ outs => [ "res", "flags", "M", "X_regular", "X_except" ],
am => "source,unary",
units => [ "GP" ],
latency => 1,
},
Conv_I2I8Bit => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ],
- out => [ "gp", "none", "none" ] },
+ out => [ "gp", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "res", "flags", "M" ],
+ outs => [ "res", "flags", "M", "X_regular", "X_except" ],
am => "source,unary",
units => [ "GP" ],
latency => 1,
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ],
- out => [ "vfp", "none", "none", "none" ] },
+ out => [ "vfp", "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem" ],
- outs => [ "res", "unused", "M", "X_exc" ],
+ outs => [ "res", "unused", "M", "X_regular", "X_except" ],
attr => "ir_mode *load_mode",
init_attr => "attr->attr.ls_mode = load_mode;",
latency => 2,
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "vfp" ],
- out => [ "none", "none" ] },
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
- outs => [ "M", "X_exc" ],
+ outs => [ "M", "X_regular", "X_except" ],
attr => "ir_mode *store_mode",
init_attr => "attr->attr.ls_mode = store_mode;",
latency => 2,
units => [ "VFP" ],
- mode => "mode_M",
attr_type => "ia32_x87_attr_t",
},
},
vfist => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ], out => [ "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ],
+ out => [ "none", "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val", "fpcw" ],
- outs => [ "M" ],
+ outs => [ "dummy", "M", "X_regular", "X_except" ],
latency => 4,
units => [ "VFP" ],
- mode => "mode_M",
attr_type => "ia32_x87_attr_t",
},
# SSE3 fisttp instruction
vfisttp => {
+ op_flags => [ "fragile" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp" ], out => [ "in_r4", "none" ]},
+ reg_req => { in => [ "gp", "gp", "none", "vfp" ],
+ out => [ "in_r4", "none", "none", "none" ]},
ins => [ "base", "index", "mem", "val" ],
- outs => [ "res", "M" ],
+ outs => [ "res", "M", "X_regular", "X_except" ],
latency => 4,
units => [ "VFP" ],
attr_type => "ia32_x87_attr_t",
fld => {
irn_flags => [ "rematerializable" ],
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
emit => '. fld%XM %AM',
attr_type => "ia32_x87_attr_t",
fst => {
irn_flags => [ "rematerializable" ],
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
emit => '. fst%XM %AM',
mode => "mode_M",
fstp => {
irn_flags => [ "rematerializable" ],
- op_flags => [ "fragile", "labeled" ],
+ op_flags => [ "labeled" ],
state => "exc_pinned",
emit => '. fstp%XM %AM',
mode => "mode_M",
xxLoad => {
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none" ],
+ out => [ "xmm", "none", "none", "none" ] },
emit => '. movdqu %D0, %AM',
- outs => [ "res", "M" ],
+ ins => [ "base", "index", "mem" ],
+ outs => [ "res", "M", "X_regular", "X_except" ],
units => [ "SSE" ],
latency => 1,
},
xxStore => {
op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm" ],
+ out => [ "none", "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
+ outs => [ "M", "X_regular", "X_except" ],
emit => '. movdqu %binop',
units => [ "SSE" ],
- latency => 1,
- mode => "mode_M",
+ latency => 1,
},
); # end of %nodes
projects / libfirm / blobdiff