make transformations before checking 2 addresscode constraints

[libfirm] / ir / be / ia32 / ia32_spec.pl

diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl
index 0cd2fe0..ab0ef59 100644 (file)
--- a/ir/be/ia32/ia32_spec.pl
+++ b/ir/be/ia32/ia32_spec.pl
@@ -243,7 +243,7 @@ $comment_string = "/*";
 "MulS" => {
   "comment"   => "construct MulS: MulS(a, b) = MulS(b, a) = a * b",
   "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
-  "reg_req"   => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "eax in_r3", "edx" ] },
+  "reg_req"   => { "in" => [ "gp", "gp", "eax", "gp", "none" ], "out" => [ "eax", "edx" ] },
   "emit"      => '. mul %ia32_emit_unop /* Mul(%A1, %A2) -> %D1 */',
   "outs"      => [ "EAX", "EDX", "M" ],
 },
@@ -276,7 +276,7 @@ $comment_string = "/*";
 "Mulh" => {
   "comment"   => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
   "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
-  "reg_req"   => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "eax in_r3", "edx" ] },
+  "reg_req"   => { "in" => [ "gp", "gp", "eax", "gp", "none" ], "out" => [ "eax", "edx" ] },
   "emit"      => '. imul %ia32_emit_unop /* Mulh(%A1, %A2) -> %D1 */',
   "outs"      => [ "EAX", "EDX", "M" ],
 },
@@ -380,7 +380,7 @@ $comment_string = "/*";
 "DivMod" => {
   "op_flags"  => "F|L",
   "state"     => "exc_pinned",
-  "reg_req"   => { "in" => [ "gp", "gp", "gp", "none" ], "out" => [ "eax in_r1", "edx in_r3" ] },
+  "reg_req"   => { "in" => [ "eax", "gp", "edx", "none" ], "out" => [ "eax", "edx" ] },
   "attr"      => "ia32_op_flavour_t dm_flav",
   "init_attr" => "  attr->data.op_flav = dm_flav;",
   "cmp_attr"  => "  return attr_a->data.op_flav != attr_b->data.op_flav;\n",
@@ -880,6 +880,16 @@ else {
   "outs"      => [ "M" ],
 },
 
+"xStoreSimple" => {
+  "op_flags" => "L|F",
+  "state"    => "exc_pinned",
+  "comment"  => "construct Store without index: Store(ptr, val, mem) = ST ptr,val",
+  "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
+  "reg_req"  => { "in" => [ "gp", "xmm", "none" ] },
+  "emit"     => '. movs%M %ia32_emit_am, %S2 /* store XMM0 onto stack */',
+  "outs"      => [ "M" ],
+},
+
 "l_X87toSSE" => {
   "op_flags" => "L|F",
   "comment"  => "construct: transfer a value from x87 FPU into a SSE register",
@@ -894,13 +904,36 @@ else {
   "arity"    => 3,
 },
 
+"GetST0" => {
+  "op_flags" => "L|F",
+  "irn_flags" => "I",
+  "state"    => "exc_pinned",
+  "comment"  => "store ST0 onto stack",
+  "cmp_attr" => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
+  "reg_req"  => { "in" => [ "gp", "none" ] },
+  "emit"     => '. fstp %ia32_emit_am /* store ST0 onto stack */',
+  "outs"     => [ "M" ],
+},
+
+"SetST0" => {
+  "op_flags" => "L|F",
+  "irn_flags" => "I",
+  "state"    => "exc_pinned",
+  "comment"  => "load ST0 from stack",
+  "cmp_attr" => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
+  "reg_req"  => { "in" => [ "gp", "none" ], "out" => [ "st0", "none" ] },
+  "emit"     => '. fld %ia32_emit_am /* load ST0 from stack */',
+  "outs"     => [ "res", "M" ],
+},
+
 # CopyB
 
 "CopyB" => {
   "op_flags" => "F|H",
   "state"    => "pinned",
   "comment"  => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
-  "reg_req"  => { "in" => [ "edi", "esi", "ecx", "none" ], "out" => [ "none" ] },
+  "reg_req"  => { "in" => [ "edi", "esi", "ecx", "none" ], "out" => [ "edi", "esi", "ecx", "none" ] },
+  "outs"     => [ "DST", "SRC", "CNT", "M" ],
 },
 
 "CopyB_i" => {
@@ -908,7 +941,8 @@ else {
   "state"    => "pinned",
   "comment"  => "implements a memcopy: CopyB(dst, src, mem) == memcpy(dst, src, attr(size))",
   "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
-  "reg_req"  => { "in" => [ "edi", "esi", "none" ], "out" => [ "none" ] },
+  "reg_req"  => { "in" => [ "edi", "esi", "none" ], "out" => [  "edi", "esi", "none" ] },
+  "outs"     => [ "DST", "SRC", "M" ],
 },
 
 # Conversions