# set in[i] = op_i
# done
# res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
-# res = optimize_node(res)
-# IRN_VRFY_IRG(res, irg)
# return res
#
# NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
+%reg_classes = (
+ "general_purpose" => [
+ { "name" => "eax", "type" => 0 },
+ { "name" => "ebx", "type" => 0 },
+ { "name" => "ecx", "type" => 0 },
+ { "name" => "edx", "type" => 0 },
+ { "name" => "edi", "type" => 0 },
+ { "name" => "esi", "type" => 0 },
+ { "name" => "ebp", "type" => 0 }
+ ],
+ "floating_point" => [
+ { "name" => "xmm0", "type" => 0 },
+ { "name" => "xmm1", "type" => 0 },
+ { "name" => "xmm2", "type" => 0 },
+ { "name" => "xmm3", "type" => 0 },
+ { "name" => "xmm4", "type" => 0 },
+ { "name" => "xmm5", "type" => 0 },
+ { "name" => "xmm6", "type" => 0 },
+ { "name" => "xmm7", "type" => 0 },
+ ]
+); # %reg_classes
+
#--------------------------------------------------#
# _ #
# (_) #
%nodes = (
-# arithmetic operations
+#-----------------------------------------------------------------#
+# _ _ _ #
+# (_) | | | | #
+# _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
+# | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
+# | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
+# |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
+# __/ | #
+# |___/ #
+#-----------------------------------------------------------------#
# commutative operations
"Add" => {
- "op_flags" => "C",
- "arity" => 2,
- "comment" => "construct Add: Add(a, b) = Add(b, a) = a + b"
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Add: Add(a, b) = Add(b, a) = a + b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. addl %S2, %D1\t\t\t/* Add(%S1, %S2) -> %D1, (%A1, %A2) */'
},
"Add_i" => {
- "arity" => 1,
- "comment" => "construct Add: Add(a, const) = Add(const, a) = a + const",
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Add: Add(a, const) = Add(const, a) = a + const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. addl %C, %D1\t\t\t/* Add(%C, %S1) -> %D1, (%A1, const) */'
},
"Mul" => {
- "op_flags" => "C",
- "arity" => 2,
- "comment" => "construct Mul: Mul(a, b) = Mul(b, a) = a * b"
+ "op_flags" => "C",
+ "arity" => 2,
+ "comment" => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
+ "reg_req" => { "in" => [ "out_d1", "general_purpose" ], "out" => [ "eax" ] },
+ "emit" =>
+' if (mode_is_signed(get_irn_mode(n))) {
+4. imull %S2\t\t\t/* signed Mul(%S1, %S2) -> %D1, (%A1, %A2) */
+ }
+ else {
+4. mull %S2\t\t\t/* unsigned Mul(%S1, %S2) -> %D1, (%A1, %A2) */
+ }
+'
},
"Mul_i" => {
- "state" => "pinned",
- "arity" => 1,
- "comment" => "construct Mul: Mul(a, const) = Mul(const, a) = a * const"
+ "state" => "pinned",
+ "arity" => 1,
+ "comment" => "construct Mul: Mul(a, const) = Mul(const, a) = a * const",
+ "reg_req" => { "in" => [ "out_d1" ], "out" => [ "eax" ] },
+ "emit" =>
+' if (mode_is_signed(get_irn_mode(n))) {
+4. imull %C\t\t\t/* signed Mul(%C, %S1) -> %D1, (%A1, const) */
+ }
+ else {
+4. mull %C\t\t\t/* unsigned Mul(%C, %S1) -> %D1, (%A1, const) */
+ }
+'
},
"Mulh" => {
- "op_flags" => "C",
- "arity" => 2,
- "comment" => "construct Mulh: Mulh(a, b) = Mulh(b, a) = get_32_highest_bits(a * b)"
+ "op_flags" => "C",
+ "arity" => 2,
+ "comment" => "construct Mulh: Mulh(a, b) = Mulh(b, a) = get_32_highest_bits(a * b)",
+ "reg_req" => { "in" => [ "out_d1", "general_purpose" ], "out" => [ "edx" ] },
+ "emit" =>
+' if (mode_is_signed(get_irn_mode(n))) {
+4. imull %S2\t\t\t/* signed Mulh(%S1, %S2) -> %D1, (%A1, %A2) */
+ }
+ else {
+4. mull %S2\t\t\t/* unsigned Mulh(%S1, %S2) -> %D1, (%A1, %A2) */
+ }
+'
},
"Mulh_i" => {
- "state" => "pinned",
- "arity" => 1,
- "comment" => "construct Mulh: Mulh(a, const) = Mulh(const, a) = get_32_highest_bits(a * const)"
+ "state" => "pinned",
+ "arity" => 1,
+ "comment" => "construct Mulh: Mulh(a, const) = Mulh(const, a) = get_32_highest_bits(a * const)",
+ "reg_req" => { "in" => [ "out_d1" ], "out" => [ "edx" ] },
+ "emit" =>
+' if (mode_is_signed(get_irn_mode(n))) {
+4. imull %C\t\t\t/* signed Mulh(%C, %S1) -> %D1, (%A1, const) */
+ }
+ else {
+4. mull %C\t\t\t/* unsigned Mulh(%C, %S1) -> %D1, (%A1, const) */
+ }
+'
},
"And" => {
- "op_flags" => "C",
- "arity" => 2,
- "comment" => "construct And: And(a, b) = And(b, a) = a AND b"
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct And: And(a, b) = And(b, a) = a AND b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. andl %S2, %D1\t\t\t/* And(%S1, %S2) -> %D1, (%A1, %A2) */'
},
"And_i" => {
- "arity" => 1,
- "comment" => "construct And: And(a, const) = And(const, a) = a AND const"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct And: And(a, const) = And(const, a) = a AND const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. andl %C, %D1\t\t\t/* And(%C, %S1) -> %D1, (%A1, const) */'
},
"Or" => {
- "op_flags" => "C",
- "arity" => 2,
- "comment" => "construct Or: Or(a, b) = Or(b, a) = a OR b"
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Or: Or(a, b) = Or(b, a) = a OR b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. orl %S2, %D1\t\t\t/* Or(%S1, %S2) -> %D1, (%A1, %A2) */'
},
"Or_i" => {
- "arity" => 1,
- "comment" => "construct Or: Or(a, const) = Or(const, a) = a OR const"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Or: Or(a, const) = Or(const, a) = a OR const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. orl %C, %D1\t\t\t/* Or(%C, %S1) -> %D1, (%A1, const) */'
},
"Eor" => {
- "op_flags" => "C",
- "arity" => 2,
- "comment" => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b"
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. xorl %S2, %D1\t\t\t/* Xor(%S1, %S2) -> %D1, (%A1, %A2) */'
},
"Eor_i" => {
- "arity" => 1,
- "comment" => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. xorl %C, %D1\t\t\t/* Xor(%C, %S1) -> %D1, (%A1, const) */'
},
"Max" => {
- "op_flags" => "C",
- "arity" => 2,
- "comment" => "construct Max: Max(a, b) = Max(b, a) = a > b ? a : b"
-},
-
-"Max_i" => {
- "arity" => 1,
- "comment" => "construct Max: Max(a, const) = Max(const, a) = a > const ? a : const"
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Max: Max(a, b) = Max(b, a) = a > b ? a : b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" =>
+'2. cmpl %S2, %S1\t\t\t/* prepare Max (%S1 should be %D1), (%A1, %A2) */
+ if (mode_is_signed(get_irn_mode(n))) {
+4. cmovl %S2, %D1\t\t\t/* %S1 is less %S2 */
+ }
+ else {
+4. cmovb %S2, %D1\t\t\t/* %S1 is below %S2 */
+ }
+'
},
"Min" => {
- "op_flags" => "C",
- "arity" => 2,
- "comment" => "construct Min: Min(a, b) = Min(b, a) = a < b ? a : b"
-},
-
-"Min_i" => {
- "arity" => 1,
- "comment" => "construct Min: Min(a, const) = Min(const, a) = a < const ? a : const"
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Min: Min(a, b) = Min(b, a) = a < b ? a : b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" =>
+'2. cmpl %S2, %S1\t\t\t/* prepare Min (%S1 should be %D1), (%A1, %A2) */
+ if (mode_is_signed(get_irn_mode(n))) {
+2. cmovg %S2, %D1\t\t\t/* %S1 is greater %S2 */
+ }
+ else {
+2. cmova %S2, %D1\t\t\t/* %S1 is above %S2 */
+ }
+'
},
# not commutative operations
"Sub" => {
- "arity" => 2,
- "comment" => "construct Sub: Sub(a, b) = a - b"
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Sub: Sub(a, b) = a - b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. subl %S2, %D1\t\t\t/* Sub(%S1, %S2) -> %D1, (%A1, %A2) */'
},
"Sub_i" => {
- "arity" => 1,
- "comment" => "construct Sub: Sub(a, const) = a - const"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Sub: Sub(a, const) = a - const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. subl %C, %D1\t\t\t/* Sub(%S1, %C) -> %D1, (%A1, const) */'
},
-"Mod" => {
- "arity" => 2,
- "comment" => "construct Mod: Mod(a, b) = a % b"
-},
+"DivMod" => {
+ "op_flags" => "F|L",
+ "state" => "exc_pinned",
+ "arity" => 4,
+ "comment" => "construct DivMod: DivMod(a,b) = (a / b, a % b)",
+ "emit" =>
+' if (mode_is_signed(get_irn_mode(n))) {
+4. idivl %S2\t\t\t/* signed Mod(%S1, %S2) -> %D1, (%A2, %A3, %4) */
+ }
+ else {
+4. divl %S2\t\t\t/* unsigned Mod(%S1, %S2) -> %D1, (%A2, %A3, %A4) */
+ }
+',
+ "args" => [
+ { "type" => "ir_node *", "name" => "dividend" },
+ { "type" => "ir_node *", "name" => "divisor" },
+ { "type" => "ir_node *", "name" => "mem" },
+ { "type" => "divmod_flavour_t", "name" => "dm_flav" }, # flavours (flavour_Div, flavour_Mod, flavour_DivMod)
+ { "type" => "ir_mode *", "name" => "mode" },
+ ],
+ "rd_constructor" =>
+" ir_node *res;
+ ir_node *in[4];
+ asmop_attr *attr;
-"Mod_i" => {
- "arity" => 1,
- "comment" => "construct Mod: Mod(a, const) = a % const"
-},
+ if (!op_ia32_DivMod) assert(0);
-"DivMod" => {
- "arity" => 2,
- "comment" => "construct DivMod: DivMod(a,b) = (a / b, a % b)"
-},
+ in[1] = divisor;
+ in[3] = mem;
-"DivMod_i" => {
- "arity" => 1,
- "comment" => "construct DivMod: DivMod(a, const) = (a / const, a % const)"
-},
+ if (mode_is_signed(mode)) {
+ ir_node *cltd;
+ /* in signed mode , we need to sign extend the dividend */
+ cltd = new_rd_ia32_Cltd(db, current_ir_graph, block, divisor, mode_T);
+ in[0] = new_rd_Proj(db, current_ir_graph, block, cltd, mode_Is, pn_EAX);
+ in[2] = new_rd_Proj(db, current_ir_graph, block, cltd, mode_Is, pn_EDX);
+ }
+ else {
+ in[0] = dividend;
+ in[2] = new_rd_ia32_Const(db, current_ir_graph, block, mode_Iu);
+ set_ia32_Const_type(in[2], asmop_Const);
+ set_ia32_Immop_tarval(in[2], get_tarval_null(mode_Iu));
+ }
-"Div" => {
- "arity" => 2,
- "comment" => "construct Div: Div(a, b) = a / b"
-},
+ res = new_ir_node(db, irg, block, op_ia32_DivMod, mode, 4, in);
-"Div_i" => {
- "arity" => 1,
- "comment" => "construct Div: Div(a, const) = a / const"
+ set_ia32_DivMod_flavour(res, dm_flav);
+ set_ia32_n_res(res, 2);
+
+ attr = get_ia32_attr(res);
+
+ attr->in_req = calloc(4, sizeof(arch_register_req_t *));
+ attr->in_req[0] = &ia32_default_req_ia32_general_purpose_eax;
+ attr->in_req[1] = &ia32_default_req_ia32_general_purpose;
+ attr->in_req[2] = &ia32_default_req_ia32_general_purpose_edx;
+ attr->in_req[3] = &ia32_default_req_none;
+
+ attr->out_req = calloc(2, sizeof(arch_register_req_t *));
+ attr->out_req[0] = &ia32_default_req_ia32_general_purpose_eax;
+ attr->out_req[1] = &ia32_default_req_ia32_general_purpose_edx;
+
+ attr->slots = calloc(2, sizeof(arch_register_t *));
+
+ return res;
+"
},
"Shl" => {
- "arity" => 2,
- "comment" => "construct Shl: Shl(a, b) = a << b"
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Shl: Shl(a, b) = a << b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. shll %S2, %D1\t\t\t/* Shl(%S1, %S2) -> %D1, (%A1, %A2) */'
},
"Shl_i" => {
- "arity" => 1,
- "comment" => "construct Shl: Shl(a, const) = a << const"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Shl: Shl(a, const) = a << const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. shll %C, %D1\t\t\t/* Shl(%S1, %C) -> %D1, (%A1, const) */'
},
"Shr" => {
- "arity" => 2,
- "comment" => "construct Shr: Shr(a, b) = a >> b"
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Shr: Shr(a, b) = a >> b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. shrl %S2, %D1\t\t\t/* Shr(%S1, %S2) -> %D1, (%A1, %A2) */'
},
"Shr_i" => {
- "arity" => 1,
- "comment" => "construct Shr: Shr(a, const) = a >> const"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Shr: Shr(a, const) = a >> const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. shrl %C, %D1\t\t\t/* Shr(%S1, %C) -> %D1, (%A1, const) */'
},
"Shrs" => {
- "arity" => 2,
- "comment" => "construct Shrs: Shrs(a, b) = a >> b"
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct Shrs: Shrs(a, b) = a >> b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. sarl %S2, %D1\t\t\t/* Shrs(%S1, %S2) -> %D1, (%A1, %A2) */'
},
"Shrs_i" => {
- "arity" => 1,
- "comment" => "construct Shrs: Shrs(a, const) = a >> const"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Shrs: Shrs(a, const) = a >> const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. sarl %C, %D1\t\t\t/* Shrs(%S1, %C) -> %D1, (%A1, const) */'
},
-"Rot" => {
- "arity" => 2,
- "comment" => "construct Rot: Rot(a, b) = a ROT b"
+"RotR" => {
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct RotR: RotR(a, b) = a ROTR b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. rorl %S2, %D1\t\t\t/* RotR(%S1, %S2) -> %D1, (%A1, %A2) */'
},
-"Rot_i" => {
- "arity" => 1,
- "comment" => "construct Rot: Rot(a, const) = a ROT const"
+"RotL" => {
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct RotL: RotL(a, b) = a ROTL b",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. roll %S2, %D1\t\t\t/* RotL(%S1, %S2) -> %D1, (%A1, %A2) */'
+},
+
+"RotL_i" => {
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct RotL: RotL(a, const) = a ROTL const",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. roll %C, %D1\t\t\t/* RotL(%S1, %C) -> %D1, (%A1, const) */'
},
"Minus" => {
- "arity" => 1,
- "comment" => "construct Minus: Minus(a) = -a"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Minus: Minus(a) = -a",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. negl %D1\t\t\t/* Neg(%S1) -> %D1, (%A1) */'
},
"Inc" => {
- "arity" => 1,
- "comment" => "construct Increment: Inc(a) = a++"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Increment: Inc(a) = a++",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. incl %D1\t\t\t/* Inc(%S1) -> %D1, (%A1) */'
},
"Dec" => {
- "arity" => 1,
- "comment" => "construct Decrement: Dec(a) = a--"
-},
-
-"Abs" => {
- "arity" => 1,
- "comment" => "construct Abs: Abs(a) = |a|"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Decrement: Dec(a) = a--",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. decl %D1\t\t\t/* Dec(%S1) -> %D1, (%A1) */'
},
"Not" => {
- "arity" => 1,
- "comment" => "construct Not: Not(a) = !a"
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Not: Not(a) = !a",
+ "check_inout" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "emit" => '. notl %D1\t\t\t/* Not(%S1) -> %D1, (%A1) */'
},
# other operations
"Conv" => {
"arity" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
"comment" => "construct Conv: Conv(a) = (conv)a"
},
-"Cmp" => {
- "op_flags" => "C",
+"CondJmp" => {
+ "op_flags" => "C|L|X|Y",
"arity" => 2,
- "comment" => "construct Cmp: Cmp(a, b) = a CMP b"
+ "comment" => "construct conditional jump: CMP A, B && JMPxx LABEL",
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "none", "none" ] },
},
-"Cmp_i" => {
+"CondJmp_i" => {
+ "op_flags" => "L|X|Y",
"arity" => 1,
- "comment" => "construct Cmp: Cmp(a, const) = Cmp(const, a) = a CMP const"
+ "comment" => "construct conditional jump: CMP A, const && JMPxx LABEL",
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "none", "none" ] },
+},
+
+"SwitchJmp" => {
+ "op_flags" => "L|X|Y",
+ "arity" => 1,
+ "comment" => "construct switch",
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "none" ] },
+},
+
+"Const" => {
+ "op_flags" => "c",
+ "arity" => "0",
+ "remat" => 1,
+ "comment" => "represents an integer constant",
+ "reg_req" => { "out" => [ "general_purpose" ] },
+ "emit" => '. movl %C, %D1\t\t\t/* Mov Const into register */',
+ "cmp_attr" =>
+'
+ if (attr_a->tp == attr_b->tp) {
+ if (attr_a->tp == asmop_SymConst) {
+ if (attr_a->old_ir == NULL || attr_b->old_ir == NULL)
+ return 1;
+ else
+ return strcmp(get_sc_name(attr_a->old_ir), get_sc_name(attr_b->old_ir));
+ }
+ else {
+ if (attr_a->old_ir == NULL || attr_b->old_ir == NULL)
+ return 1;
+
+ if (tarval_cmp(attr_a->tv, attr_b->tv) == pn_Cmp_Eq)
+ return 0;
+ else
+ return 1;
+ }
+ }
+ else
+ return 1;
+'
+},
+
+"Cltd" => {
+ "arity" => 1,
+ "remat" => 1,
+ "comment" => "construct Cltd: sign extend EAX -> EDX:EAX",
+ "reg_req" => { "in" => [ "out_d1" ], "out" => [ "eax", "edx" ] },
+ "emit" => '. cltd\t\t\t/* sign extend EAX -> EDX:EAX, (%A1) */'
},
# Load / Store
"Load" => {
+ "op_flags" => "L|F",
+ "state" => "exc_pinned",
"arity" => 2,
- "comment" => "construct Load: Load(mem-edge, ptr) = LD ptr"
+ "remat" => 1,
+ "comment" => "construct Load: Load(ptr, mem) = LD ptr -> reg",
+ "reg_req" => { "in" => [ "general_purpose", "none" ], "out" => [ "general_purpose" ] },
+ "emit" => '. movl (%S1), %D1\t\t\t/* Load((%S1)) -> %D1, (%A1) */'
},
"Store" => {
+ "op_flags" => "L|F",
+ "state" => "exc_pinned",
"arity" => 3,
- "comment" => "construct Store: Store(mem-edge, ptr, val) = ST ptr,val"
+ "remat" => 1,
+ "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose", "none" ] },
+ "emit" => '. movl %S2, (%S1)\t\t\t/* Store(%S2) -> (%S1), (%A1, %A2) */'
},
"Lea" => {
"arity" => 2,
- "comment" => "construct Lea: Lea(a,b) = lea offs(a,b,const) | res = a + b * const + offs with const = 0,1,2,4,8"
+ "comment" => "construct Lea: Lea(a,b) = lea offs(a,b,const) | res = a + b * const + offs with const = 0,1,2,4,8",
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "general_purpose" ] },
+ "emit" => '. leal %O(%S1, %S2, %C), %D1\t\t/* %D1 = %S1 + %S2 << %C + %O, (%A1, %A2) */'
},
"Lea_i" => {
"arity" => 1,
- "comment" => "construct Lea: Lea(a) = lea offs(a) | res = a + offs"
+ "comment" => "construct Lea: Lea(a) = lea offs(a) | res = a + offs",
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "general_purpose" ] },
+ "emit" => '. leal %C(%S1), %D1\t\t\t/* %D1 = %S1 + %C, (%A1)*/'
},
-# Call
+"RegParam" => {
+ "arity" => 1,
+ "comment" => "constructs a Register Parameter to cover parameters passed in register",
+ "reg_req" => { "in" => [ "none" ], "out" => [ "none" ] },
+ "cmp_attr" =>
+'
+ return (attr_a->pn_code != attr_b->pn_code);
+'
+},
-"Call" => {
+"StackParam" => {
"arity" => 1,
- "comment" => "construct Call: Call(...)",
- "args" => [ { "type" => "ir_node *", "name" => "old_call" } ],
- "rd_constructor" =>
-" ir_node *res;
- ir_node *in[1];
- asmop_attr *attr;
+ "comment" => "constructs a Stack Parameter to retrieve a parameter from Stack",
+ "reg_req" => { "in" => [ "none" ], "out" => [ "general_purpose" ] },
+ "cmp_attr" =>
+'
+ return (attr_a->pn_code != attr_b->pn_code);
+'
+},
+
+"StackArg" => {
+ "arity" => 2,
+ "comment" => "constructs a Stack Argument to pass an argument on Stack",
+ "reg_req" => { "in" => [ "none", "general_purpose" ], "out" => [ "none" ] },
+ "cmp_attr" =>
+'
+ return (attr_a->pn_code != attr_b->pn_code);
+'
+},
+
+#--------------------------------------------------------#
+# __ _ _ _ #
+# / _| | | | | | #
+# | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
+# | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
+# | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
+# |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
+#--------------------------------------------------------#
+
+# commutative operations
- if (!op_ia32_Call) assert(0);
+"fAdd" => {
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "check_inout" => 1,
+ "comment" => "construct SSE Add: Add(a, b) = Add(b, a) = a + b",
+ "reg_req" => { "in" => [ "floating_point", "floating_point" ], "out" => [ "in_s1" ] },
+ "emit" => '. add%M %S2, %D1\t\t\t/* SSE Add(%S1, %S2) -> %D1 */'
+},
+
+"fMul" => {
+ "op_flags" => "C",
+ "arity" => 2,
+ "check_inout" => 1,
+ "comment" => "construct SSE Mul: Mul(a, b) = Mul(b, a) = a * b",
+ "reg_req" => { "in" => [ "floating_point", "floating_point" ], "out" => [ "in_s1" ] },
+ "emit" =>'. muls%M %S2, %D1\t\t\t/* SSE Mul(%S1, %S2) -> %D1 */'
+},
+
+"fMax" => {
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "check_inout" => 1,
+ "comment" => "construct SSE Max: Max(a, b) = Max(b, a) = a > b ? a : b",
+ "reg_req" => { "in" => [ "floating_point", "floating_point" ], "out" => [ "in_s1" ] },
+ "emit" =>'. maxs%M %S2, %D1\t\t\t/* SSE Max(%S1, %S2) -> %D1 */'
+},
+
+"fMin" => {
+ "op_flags" => "C",
+ "arity" => 2,
+ "remat" => 1,
+ "check_inout" => 1,
+ "comment" => "construct SSE Min: Min(a, b) = Min(b, a) = a < b ? a : b",
+ "reg_req" => { "in" => [ "floating_point", "floating_point" ], "out" => [ "in_s1" ] },
+ "emit" =>'. mins%M %S2, %D1\t\t\t/* SSE Min(%S1, %S2) -> %D1 */'
+},
- in[0] = get_Call_mem(old_call);
+# not commutative operations
- res = new_ir_node(db, irg, block, op_ia32_Call, mode_T, 1, in);
- res = optimize_node(res);
- irn_vrfy_irg(res, irg);
+"fSub" => {
+ "arity" => 2,
+ "remat" => 1,
+ "check_inout" => 1,
+ "comment" => "construct SSE Sub: Sub(a, b) = a - b",
+ "reg_req" => { "in" => [ "floating_point", "floating_point" ], "out" => [ "in_s1" ] },
+ "emit" => '. subs%M %S2, %D1\t\t\t/* SSE Sub(%S1, %S2) -> %D1 */'
+},
- attr = (asmop_attr *)get_irn_generic_attr(res);
- attr->data.old_ir = old_call;
+"fDiv" => {
+ "arity" => 2,
+ "remat" => 1,
+ "check_inout" => 1,
+ "comment" => "construct SSE Div: Div(a, b) = a / b",
+ "reg_req" => { "in" => [ "floating_point", "floating_point" ], "out" => [ "in_s1" ] },
+ "emit" => '. divs%M %S2, %D1\t\t\t/* SSE Div(%S1, %S2) -> %D1 */'
+},
- return res;
+"fMinus" => {
+ "arity" => 1,
+ "remat" => 1,
+ "check_inout" => 1,
+ "comment" => "construct SSE Minus: Minus(a) = -a",
+ "reg_req" => { "in" => [ "floating_point" ], "out" => [ "in_s1" ] },
+ "emit" => '. xorp%M c %D1\t\t\t/* SSE Minus(%S1) -> %D1 */'
+},
+
+# other operations
+
+"fConv" => {
+ "arity" => 1,
+ "reg_req" => { "in" => [ "general_purpose" ], "out" => [ "in_s1" ] },
+ "comment" => "construct Conv: Conv(a) = (conv)a"
+},
+
+"fCondJmp" => {
+ "op_flags" => "C|L|X|Y",
+ "arity" => 2,
+ "comment" => "construct conditional jump: CMP A, B && JMPxx LABEL",
+ "reg_req" => { "in" => [ "general_purpose", "general_purpose" ], "out" => [ "none", "none" ] },
+},
+
+"fConst" => {
+ "op_flags" => "c",
+ "arity" => "0",
+ "remat" => 1,
+ "comment" => "represents a SSE constant",
+ "reg_req" => { "out" => [ "floating_point" ] },
+ "emit" => '. mov%M %C, %D1\t\t\t/* Mov fConst into register */',
+ "cmp_attr" =>
+'
+ if (attr_a->tp == attr_b->tp) {
+ if (attr_a->tp == asmop_SymConst) {
+ if (attr_a->old_ir == NULL || attr_b->old_ir == NULL)
+ return 1;
+ else
+ return strcmp(get_sc_name(attr_a->old_ir), get_sc_name(attr_b->old_ir));
+ }
+ else {
+ if (attr_a->old_ir == NULL || attr_b->old_ir == NULL)
+ return 1;
+
+ if (tarval_cmp(attr_a->tv, attr_b->tv) == pn_Cmp_Eq)
+ return 0;
+ else
+ return 1;
+ }
+ }
+ else
+ return 1;
+'
+},
+
+# Load / Store
+
+"fLoad" => {
+ "op_flags" => "L|F",
+ "state" => "exc_pinned",
+ "arity" => 2,
+ "remat" => 1,
+ "comment" => "construct SSE Load: Load(ptr, mem) = LD ptr",
+ "reg_req" => { "in" => [ "general_purpose", "none" ], "out" => [ "floating_point" ] },
+ "emit" => '. movl (%S1), %D1\t\t\t/* Load((%S1)) -> %D1 */'
+},
+
+"fStore" => {
+ "op_flags" => "L|F",
+ "state" => "exc_pinned",
+ "arity" => 3,
+ "remat" => 1,
+ "comment" => "construct Store: Store(ptr, val, mem) = ST ptr,val",
+ "reg_req" => { "in" => [ "general_purpose", "floating_point", "none" ] },
+ "emit" => '. movl %S2, (%S1)\t\t\t/* Store(%S2) -> (%S1), (%A1, %A2) */'
+},
+
+"fStackParam" => {
+ "arity" => 1,
+ "comment" => "constructs a Stack Parameter to retrieve a SSE parameter from Stack",
+ "reg_req" => { "in" => [ "none" ], "out" => [ "floating_point" ] },
+ "cmp_attr" =>
+'
+ return (attr_a->pn_code != attr_b->pn_code);
+'
+},
+
+"fStackArg" => {
+ "arity" => 2,
+ "comment" => "constructs a Stack Argument to pass an argument on Stack",
+ "reg_req" => { "in" => [ "none", "floating_point" ], "out" => [ "none" ] },
+ "cmp_attr" =>
+'
+ return (attr_a->pn_code != attr_b->pn_code);
+'
+},
+
+# Call
+
+"Call" => {
+ "op_flags" => "L|F",
+ "state" => "mem_pinned",
+ "arity" => "variable",
+ "spill" => 0,
+ "comment" => "construct Call: Call(...)",
+ "args" => [
+ { "type" => "int", "name" => "n" },
+ { "type" => "ir_node **", "name" => "in" }
+ ],
+ "rd_constructor" =>
+" if (!op_ia32_Call) assert(0);
+ return new_ir_node(db, irg, block, op_ia32_Call, mode_T, n, in);
"
}