reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right" ],
+ outs => [ "res", "flags", "M" ],
emit => '. add%M %binop',
am => "full,binary",
units => [ "GP" ],
reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
ins => [ "base", "index", "mem", "left", "right", "eflags" ],
+ outs => [ "res", "flags", "M" ],
emit => '. adc%M %binop',
am => "full,binary",
units => [ "GP" ],
op_flags => "F|L",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ],
- out => [ "eax", "flags", "none", "edx" ] },
+ out => [ "eax", "flags", "none", "edx", "none" ] },
ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
- outs => [ "div_res", "flags", "M", "mod_res" ],
+ outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ],
am => "source,ternary",
emit => ". idiv%M %unop5",
latency => 25,
op_flags => "F|L",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ],
- out => [ "eax", "flags", "none", "edx" ] },
+ out => [ "eax", "flags", "none", "edx", "none" ] },
ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
- outs => [ "div_res", "flags", "M", "mod_res" ],
+ outs => [ "div_res", "flags", "M", "mod_res", "X_exc" ],
am => "source,ternary",
emit => ". div%M %unop5",
latency => 25,
# no flags modified
},
+Cmc => {
+ reg_req => { in => [ "flags" ], out => [ "flags" ] },
+ emit => '.cmc',
+ units => [ "GP" ],
+ latency => 1,
+ mode => $mode_flags,
+ modified_flags => $status_flags
+},
+
+Stc => {
+ reg_req => { out => [ "flags" ] },
+ emit => '.stc',
+ units => [ "GP" ],
+ latency => 1,
+ mode => $mode_flags,
+ modified_flags => $status_flags
+},
+
# other operations
Cmp => {
Load => {
op_flags => "L|F",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none", "none" ] },
ins => [ "base", "index", "mem" ],
- outs => [ "res", "M" ],
+ outs => [ "res", "M", "X_exc" ],
latency => 0,
emit => ". mov%SE%ME%.l %AM, %D0",
units => [ "GP" ],
Store => {
op_flags => "L|F",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
+ outs => [ "M", "X_exc" ],
emit => '. mov%M %SI3, %AM',
latency => 2,
units => [ "GP" ],
Store8Bit => {
op_flags => "L|F",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
+ outs => [ "M", "X_exc" ],
emit => '. mov%M %SB3, %AM',
latency => 2,
units => [ "GP" ],
xLoad => {
op_flags => "L|F",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none", "none" ] },
ins => [ "base", "index", "mem" ],
+ outs => [ "res", "M", "X_exc" ],
emit => '. mov%XXM %AM, %D0',
attr => "ir_mode *load_mode",
init_attr => "attr->ls_mode = load_mode;",
- outs => [ "res", "M" ],
latency => 0,
units => [ "SSE" ],
},
xStore => {
op_flags => "L|F",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
+ reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
+ outs => [ "M", "X_exc" ],
emit => '. mov%XXM %S3, %AM',
latency => 0,
units => [ "SSE" ],
},
-l_X87toSSE => {
+l_LLtoFloat => {
op_flags => "L|F",
cmp_attr => "return 1;",
- arity => 3,
+ ins => [ "val_high", "val_low" ],
},
-l_SSEtoX87 => {
+l_FloattoLL => {
op_flags => "L|F",
cmp_attr => "return 1;",
- arity => 3,
+ ins => [ "val" ],
+ outs => [ "res_high", "res_low" ],
},
# CopyB
irn_flags => "R",
op_flags => "L|F",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem" ],
- outs => [ "res", "M" ],
+ outs => [ "res", "M", "X_exc" ],
attr => "ir_mode *load_mode",
init_attr => "attr->attr.ls_mode = load_mode;",
latency => 2,
irn_flags => "R",
op_flags => "L|F",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp" ], out => [ "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
+ outs => [ "M", "X_exc" ],
attr => "ir_mode *store_mode",
init_attr => "attr->attr.ls_mode = store_mode;",
latency => 2,
FucomFnstsw => {
reg_req => { },
emit => ". fucom %X1\n".
- ". fnstsw",
+ ". fnstsw %%ax",
attr_type => "ia32_x87_attr_t",
latency => 2,
},
FucompFnstsw => {
reg_req => { },
emit => ". fucomp %X1\n".
- ". fnstsw",
+ ". fnstsw %%ax",
attr_type => "ia32_x87_attr_t",
latency => 2,
},
FucomppFnstsw => {
reg_req => { },
emit => ". fucompp\n".
- ". fnstsw",
+ ". fnstsw %%ax",
attr_type => "ia32_x87_attr_t",
latency => 2,
},
FtstFnstsw => {
reg_req => { },
emit => ". ftst\n".
- ". fnstsw",
+ ". fnstsw %%ax",
attr_type => "ia32_x87_attr_t",
latency => 2,
},