},
"Mul" => {
- "irn_flags" => "A",
+ "irn_flags" => "R",
"comment" => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
"cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
"reg_req" => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "in_r3" ] },
"irn_flags" => "R",
"comment" => "represents an integer constant",
"cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
- "reg_req" => { "out" => [ "gp" ] },
+ "reg_req" => { "in" => [ "none" ], "out" => [ "gp" ] },
},
"Cdq" => {
"Push" => {
"comment" => "push a gp register on the stack",
"reg_req" => { "in" => [ "esp", "gp", "none" ], "out" => [ "esp" ] },
- "emit" => '. push %S2 /* Push(%A2) */',
+ "emit" => '
+if (get_ia32_id_cnst(n)) {
+ if (get_ia32_immop_type(n) == ia32_ImmConst) {
+. push %C /* Push(%A2) */
+ } else {
+. push OFFSET FLAT:%C /* Push(%A2) */
+ }
+}
+else {
+. push %S2 /* Push(%A2) */
+}
+',
"outs" => [ "stack", "M" ],
},
"irn_flags" => "R",
"comment" => "represents a SSE constant",
"cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
- "reg_req" => { "out" => [ "xmm" ] },
+ "reg_req" => { "in" => [ "none" ], "out" => [ "xmm" ] },
"emit" => '. mov%M %D1, %C /* Load fConst into register */',
},
"irn_flags" => "R",
"comment" => "represents a virtual floating point constant",
"cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
- "reg_req" => { "out" => [ "vfp" ] },
+ "reg_req" => { "in" => [ "none" ], "out" => [ "vfp" ] },
+},
+
+# other
+
+"vfCondJmp" => {
+ "op_flags" => "L|X|Y",
+ "comment" => "represents a virtual floating point compare",
+ "cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
+ "reg_req" => { "in" => [ "gp", "gp", "vfp", "vfp", "none" ], "out" => [ "none", "none", "eax" ] },
+ "outs" => [ "false", "true", "temp_reg_eax" ],
},
#------------------------------------------------------------------------#
"emit" => '. fld%M %C /* Load fConst into register -> %D1 */',
},
-# fxch, fpush
+# fxch, fpush, fpop
# Note that it is NEVER allowed to do CSE on these nodes
"fxch" => {
"emit" => '. fld %X1 /* x87 push %X1 */',
},
+"fpop" => {
+ "op_flags" => "R|K",
+ "comment" => "x87 stack pop",
+ "reg_req" => { "in" => [ "st"], "out" => [ "st" ] },
+ "cmp_attr" => " return 1;\n",
+ "emit" => '. fstp %X1 /* x87 pop %X1 */',
+},
+
+# compare
+
+"fcomJmp" => {
+ "op_flags" => "L|X|Y",
+ "comment" => "floating point compare",
+ "cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
+ "reg_req" => { },
+},
+
+"fcompJmp" => {
+ "op_flags" => "L|X|Y",
+ "comment" => "floating point compare and pop",
+ "cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
+ "reg_req" => { },
+},
+
+"fcomppJmp" => {
+ "op_flags" => "L|X|Y",
+ "comment" => "floating point compare and pop twice",
+ "cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
+ "reg_req" => { },
+},
+
+"fcomrJmp" => {
+ "op_flags" => "L|X|Y",
+ "comment" => "floating point compare reverse",
+ "cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
+ "reg_req" => { },
+},
+
+"fcomrpJmp" => {
+ "op_flags" => "L|X|Y",
+ "comment" => "floating point compare reverse and pop",
+ "cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
+ "reg_req" => { },
+},
+
+"fcomrppJmp" => {
+ "op_flags" => "L|X|Y",
+ "comment" => "floating point compare reverse and pop twice",
+ "cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
+ "reg_req" => { },
+},
+
); # end of %nodes