fix fucompp emitter when no register is needed
[libfirm] / ir / be / ia32 / ia32_optimize.c
index ba160ad..df2c308 100644 (file)
 #include "ia32_dbg_stat.h"
 #include "ia32_util.h"
 
-typedef struct _ia32_place_env_t {
-       ia32_code_gen_t *cg;
-       bitset_t        *visited;
-} ia32_place_env_t;
-
 typedef enum {
        IA32_AM_CAND_NONE  = 0,
        IA32_AM_CAND_LEFT  = 1,
@@ -271,17 +266,12 @@ static void ia32_transform_const(ir_node *irn, void *env) {
  * Transform all firm consts and assure, we visit each const only once.
  */
 static void ia32_place_consts_walker(ir_node *irn, void *env) {
-       ia32_place_env_t *penv = env;
-       opcode           opc   = get_irn_opcode(irn);
+       ia32_code_gen_t *cg = env;
 
-       /* transform only firm consts which are not already visited */
-       if ((opc != iro_Const && opc != iro_SymConst) || bitset_is_set(penv->visited, get_irn_idx(irn)))
+       if(!is_Const(irn) && !is_SymConst(irn))
                return;
 
-       /* mark const visited */
-       bitset_set(penv->visited, get_irn_idx(irn));
-
-       ia32_transform_const(irn, penv->cg);
+       ia32_transform_const(irn, cg);
 }
 
 /**
@@ -303,12 +293,7 @@ static void ia32_set_modes(ir_node *irn, void *env) {
  * @param cg  The ia32 codegenerator object
  */
 static void ia32_transform_all_firm_consts(ia32_code_gen_t *cg) {
-       ia32_place_env_t penv;
-
-       penv.cg      = cg;
-       penv.visited = bitset_irg_malloc(cg->irg);
-       irg_walk_graph(cg->irg, NULL, ia32_place_consts_walker, &penv);
-       bitset_free(penv.visited);
+       irg_walk_graph(cg->irg, NULL, ia32_place_consts_walker, cg);
 }
 
 /* Place all consts and change pointer arithmetics into unsigned integer arithmetics. */
@@ -487,8 +472,7 @@ static void ia32_create_Push(ir_node *irn, ia32_code_gen_t *cg) {
                return;
 
        /* do not create push if IncSp doesn't expand stack or expand size is different from register size */
-       if (be_get_IncSP_direction(sp) != be_stack_dir_expand ||
-               be_get_IncSP_offset(sp) != (unsigned) get_mode_size_bytes(ia32_reg_classes[CLASS_ia32_gp].mode))
+       if (be_get_IncSP_offset(sp) != get_mode_size_bytes(ia32_reg_classes[CLASS_ia32_gp].mode))
                return;
 
        /* do not create push, if there is a path (inside the block) from the push value to IncSP */
@@ -515,17 +499,7 @@ static void ia32_create_Push(ir_node *irn, ia32_code_gen_t *cg) {
                if the IncSP points to NoMem -> just use the memory input from store
                if IncSP points to somewhere else -> sync memory of IncSP and Store
        */
-       mem = be_get_IncSP_mem(sp);
-       if (mem == get_irg_no_mem(irg))
-               mem = get_irn_n(irn, 3);
-       else {
-               ir_node *in[2];
-
-               in[0] = mem;
-               in[1] = get_irn_n(irn, 3);
-               mem   = new_r_Sync(irg, bl, 2, in);
-       }
-
+       mem  = get_irn_n(irn, 3);
        push = new_rd_ia32_Push(NULL, irg, bl, be_get_IncSP_pred(sp), val, mem);
        proj_res = new_r_Proj(irg, bl, push, get_irn_mode(sp), pn_ia32_Push_stack);
        proj_M   = new_r_Proj(irg, bl, push, mode_M, pn_ia32_Push_M);
@@ -547,61 +521,7 @@ static void ia32_create_Push(ir_node *irn, ia32_code_gen_t *cg) {
  * Creates a Pop from IncSP(Load(sp))
  */
 static void ia32_create_Pop(ir_node *irn, ia32_code_gen_t *cg) {
-       ir_node *old_proj_M = be_get_IncSP_mem(irn);
-       ir_node *load = skip_Proj(old_proj_M);
-       ir_node *old_proj_res = NULL;
-       ir_node *bl, *pop, *next, *proj_res, *proj_sp, *proj_M;
-       const ir_edge_t *edge;
-       const arch_register_t *reg, *sp;
-
-       if (! is_ia32_Load(load) || get_ia32_am_offs(load))
-               return;
-
-       if (arch_get_irn_register(cg->arch_env, get_irn_n(load, 1)) !=
-               &ia32_gp_regs[REG_GP_NOREG])
-               return;
-       if (arch_get_irn_register(cg->arch_env, get_irn_n(load, 0)) != cg->isa->arch_isa.sp)
-               return;
-
-       /* ok, translate into pop */
-       foreach_out_edge(load, edge) {
-               ir_node *succ = get_edge_src_irn(edge);
-               if (succ != old_proj_M) {
-                       old_proj_res = succ;
-                       break;
-               }
-       }
-       if (! old_proj_res) {
-               assert(0);
-               return; /* should not happen */
-       }
-
-       bl = get_nodes_block(load);
-
-       /* IncSP is typically scheduled after the load, so remove it first */
-       sched_remove(irn);
-       next = sched_next(old_proj_res);
-       sched_remove(old_proj_res);
-       sched_remove(load);
-
-       reg = arch_get_irn_register(cg->arch_env, load);
-       sp  = arch_get_irn_register(cg->arch_env, irn);
-
-       pop      = new_rd_ia32_Pop(NULL, current_ir_graph, bl, get_irn_n(irn, 0), get_irn_n(load, 2));
-       proj_res = new_r_Proj(current_ir_graph, bl, pop, get_irn_mode(old_proj_res), pn_ia32_Pop_res);
-       proj_sp  = new_r_Proj(current_ir_graph, bl, pop, get_irn_mode(irn), pn_ia32_Pop_stack);
-       proj_M   = new_r_Proj(current_ir_graph, bl, pop, mode_M, pn_ia32_Pop_M);
-
-       exchange(old_proj_M, proj_M);
-       exchange(old_proj_res, proj_res);
-       exchange(irn, proj_sp);
-
-       arch_set_irn_register(cg->arch_env, proj_res, reg);
-       arch_set_irn_register(cg->arch_env, proj_sp, sp);
-
-       sched_add_before(next, proj_sp);
-       sched_add_before(proj_sp, proj_res);
-       sched_add_before(proj_res,pop);
+       /* TODO */
 }
 
 /**
@@ -613,23 +533,10 @@ static void ia32_optimize_IncSP(ir_node *irn, ia32_code_gen_t *cg) {
 
        if (be_is_IncSP(prev) && real_uses == 1) {
                /* first IncSP has only one IncSP user, kill the first one */
-               unsigned       prev_offs = be_get_IncSP_offset(prev);
-               be_stack_dir_t prev_dir  = be_get_IncSP_direction(prev);
-               unsigned       curr_offs = be_get_IncSP_offset(irn);
-               be_stack_dir_t curr_dir  = be_get_IncSP_direction(irn);
-
-               int new_ofs = prev_offs * (prev_dir == be_stack_dir_expand ? -1 : +1) +
-                                   curr_offs * (curr_dir == be_stack_dir_expand ? -1 : +1);
+               int prev_offs = be_get_IncSP_offset(prev);
+               int curr_offs = be_get_IncSP_offset(irn);
 
-               if (new_ofs < 0) {
-                       new_ofs  = -new_ofs;
-                       curr_dir = be_stack_dir_expand;
-               }
-               else
-                       curr_dir = be_stack_dir_shrink;
-               be_set_IncSP_offset(prev, 0);
-               be_set_IncSP_offset(irn, (unsigned)new_ofs);
-               be_set_IncSP_direction(irn, curr_dir);
+               be_set_IncSP_offset(prev, prev_offs + curr_offs);
 
                /* Omit the optimized IncSP */
                be_set_IncSP_pred(irn, be_get_IncSP_pred(prev));
@@ -1041,6 +948,7 @@ static ir_node *fold_addr(ia32_code_gen_t *cg, ir_node *irn, ir_node *noreg) {
        entity     *lea_ent    = NULL;
        ir_node    *left, *right, *temp;
        ir_node    *base, *index;
+       int consumed_left_shift;
        ia32_am_flavour_t am_flav;
        DEBUG_ONLY(firm_dbg_module_t *mod = cg->mod;)
 
@@ -1126,8 +1034,9 @@ static ir_node *fold_addr(ia32_code_gen_t *cg, ir_node *irn, ir_node *noreg) {
 
        if (isadd) {
                /* default for add -> make right operand to index */
-               index = right;
-               dolea = 1;
+               index               = right;
+               dolea               = 1;
+               consumed_left_shift = -1;
 
                DBG((mod, LEVEL_1, "\tgot LEA candidate with index %+F\n", index));
 
@@ -1135,6 +1044,7 @@ static ir_node *fold_addr(ia32_code_gen_t *cg, ir_node *irn, ir_node *noreg) {
                temp = left;
                if (is_ia32_Lea(left)) {
                        temp = right;
+                       consumed_left_shift = 0;
                }
 
                /* check for SHL 1,2,3 */
@@ -1146,7 +1056,8 @@ static ir_node *fold_addr(ia32_code_gen_t *cg, ir_node *irn, ir_node *noreg) {
                                scale = get_tarval_long(get_ia32_Immop_tarval(temp));
 
                                if (scale <= 3) {
-                                       index = get_irn_n(temp, 2);
+                                       index               = get_irn_n(temp, 2);
+                                       consumed_left_shift = consumed_left_shift < 0 ? 1 : 0;
 
                                        DBG((mod, LEVEL_1, "\tgot scaled index %+F\n", index));
                                }
@@ -1163,10 +1074,8 @@ static ir_node *fold_addr(ia32_code_gen_t *cg, ir_node *irn, ir_node *noreg) {
                        if (left == right) {
                                base = noreg;
                        }
-                       else if (! is_ia32_Lea(left) && (index != right)) {
-                               /* index != right -> we found a good Shl           */
-                               /* left  != LEA   -> this Shl was the left operand */
-                               /* -> base is right operand                        */
+                       else if (consumed_left_shift == 1) {
+                               /* -> base is right operand  */
                                base = (right == lea_o) ? noreg : right;
                        }
                }