DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
-static void copy_mark(const ir_node *old, ir_node *new)
+static void copy_mark(const ir_node *old, ir_node *newn)
{
if (is_ia32_is_reload(old))
- set_ia32_is_reload(new);
+ set_ia32_is_reload(newn);
if (is_ia32_is_spill(old))
- set_ia32_is_spill(new);
+ set_ia32_is_spill(newn);
if (is_ia32_is_remat(old))
- set_ia32_is_remat(new);
+ set_ia32_is_remat(newn);
}
typedef enum produces_flag_t {
case iro_ia32_ShlD:
case iro_ia32_ShrD:
- assert(n_ia32_ShlD_count == n_ia32_ShrD_count);
+ assert((int)n_ia32_ShlD_count == (int)n_ia32_ShrD_count);
count = get_irn_n(node, n_ia32_ShlD_count);
goto check_shift_amount;
case iro_ia32_Shl:
case iro_ia32_Shr:
case iro_ia32_Sar:
- assert(n_ia32_Shl_count == n_ia32_Shr_count
- && n_ia32_Shl_count == n_ia32_Sar_count);
+ assert((int)n_ia32_Shl_count == (int)n_ia32_Shr_count
+ && (int)n_ia32_Shl_count == (int)n_ia32_Sar_count);
count = get_irn_n(node, n_ia32_Shl_count);
check_shift_amount:
/* when shift count is zero the flags are not affected, so we can only
ir_node *op;
ia32_attr_t const *attr;
int ins_permuted;
- int cmp_unsigned;
ir_node *test;
arch_register_t const *reg;
ir_edge_t const *edge;
noreg = ia32_new_NoReg_gp(irg);
nomem = get_irg_no_mem(current_ir_graph);
op = get_irn_n(node, n_ia32_Cmp_left);
- attr = get_irn_generic_attr(node);
+ attr = get_ia32_attr(node);
ins_permuted = attr->data.ins_permuted;
- cmp_unsigned = attr->data.cmp_unsigned;
if (is_ia32_Cmp(node)) {
test = new_bd_ia32_Test(dbgi, block, noreg, noreg, nomem,
- op, op, ins_permuted, cmp_unsigned);
+ op, op, ins_permuted);
} else {
test = new_bd_ia32_Test8Bit(dbgi, block, noreg, noreg, nomem,
- op, op, ins_permuted, cmp_unsigned);
+ op, op, ins_permuted);
}
set_ia32_ls_mode(test, get_ia32_ls_mode(node));
ir_node *left = get_irn_n(node, n_ia32_Test_left);
ir_node *right = get_irn_n(node, n_ia32_Test_right);
- assert(n_ia32_Test_left == n_ia32_Test8Bit_left
- && n_ia32_Test_right == n_ia32_Test8Bit_right);
+ assert((int)n_ia32_Test_left == (int)n_ia32_Test8Bit_left
+ && (int)n_ia32_Test_right == (int)n_ia32_Test8Bit_right);
if (left == right) { /* we need a test for 0 */
ir_node *block = get_nodes_block(node);
/* make sure only Lg/Eq tests are used */
foreach_out_edge(node, edge) {
- ir_node *user = get_edge_src_irn(edge);
- int pnc = get_ia32_condcode(user);
+ ir_node *user = get_edge_src_irn(edge);
+ ia32_condition_code_t cc = get_ia32_condcode(user);
- if (pnc != pn_Cmp_Eq && pnc != pn_Cmp_Lg) {
+ if (cc != ia32_cc_equal && cc != ia32_cc_not_equal) {
return;
}
}
case produces_flag_carry:
foreach_out_edge(node, edge) {
- ir_node *user = get_edge_src_irn(edge);
- int pnc = get_ia32_condcode(user);
+ ir_node *user = get_edge_src_irn(edge);
+ ia32_condition_code_t cc = get_ia32_condcode(user);
- switch (pnc) {
- case pn_Cmp_Eq: pnc = ia32_pn_Cmp_not_carry; break;
- case pn_Cmp_Lg: pnc = ia32_pn_Cmp_carry; break;
- default: panic("unexpected pn");
+ switch (cc) {
+ case ia32_cc_equal: cc = ia32_cc_above_equal; break; /* CF = 0 */
+ case ia32_cc_not_equal: cc = ia32_cc_below; break; /* CF = 1 */
+ default: panic("unexpected pn");
}
- set_ia32_condcode(user, pnc);
+ set_ia32_condcode(user, cc);
}
break;
offset = imm->offset;
if (get_ia32_op_type(node) == ia32_AddrModeS) {
- ia32_attr_t *const attr = get_irn_generic_attr(node);
+ ia32_attr_t *const attr = get_ia32_attr(node);
if ((offset & 0xFFFFFF00) == 0) {
/* attr->am_offs += 0; */
continue;
case iro_Start:
case beo_Start:
- case beo_Barrier:
/* ignore no code generated */
continue;
case beo_IncSP:
/* we have to be at offset 0 */
int my_offset = get_ia32_am_offs_int(store);
if (my_offset != 0) {
- /* TODO here: find out wether there is a store with offset 0 before
- * us and wether we can move it down to our place */
+ /* TODO here: find out whether there is a store with offset 0 before
+ * us and whether we can move it down to our place */
return;
}
ir_mode *ls_mode = get_ia32_ls_mode(store);
*/
static inline int mode_needs_gp_reg(ir_mode *mode)
{
- if (mode == mode_fpcw)
+ if (mode == ia32_mode_fpcw)
return 0;
if (get_mode_size_bits(mode) > 32)
return 0;
/**
* Find a free GP register if possible, else return NULL.
*/
-static const arch_register_t *get_free_gp_reg(void)
+static const arch_register_t *get_free_gp_reg(ir_graph *irg)
{
+ be_irg_t *birg = be_birg_from_irg(irg);
int i;
for (i = 0; i < N_ia32_gp_REGS; ++i) {
const arch_register_t *reg = &ia32_reg_classes[CLASS_ia32_gp].regs[i];
- if (arch_register_type_is(reg, ignore))
+ if (!rbitset_is_set(birg->allocatable_regs, reg->global_index))
continue;
if (be_peephole_get_value(CLASS_ia32_gp, i) == NULL)
if (offset < 0) {
/* we need a free register for pop */
- reg = get_free_gp_reg();
+ reg = get_free_gp_reg(get_irn_irg(node));
if (reg == NULL)
return;
const arch_register_t *reg;
ir_node *block;
dbg_info *dbgi;
- ir_node *xor;
+ ir_node *xorn;
/* try to transform a mov 0, reg to xor reg reg */
if (attr->offset != 0 || attr->symconst != NULL)
/* create xor(produceval, produceval) */
block = get_nodes_block(node);
dbgi = get_irn_dbg_info(node);
- xor = new_bd_ia32_Xor0(dbgi, block);
- arch_set_irn_register(xor, reg);
+ xorn = new_bd_ia32_Xor0(dbgi, block);
+ arch_set_irn_register(xorn, reg);
- sched_add_before(node, xor);
+ sched_add_before(node, xorn);
- copy_mark(node, xor);
- be_peephole_exchange(node, xor);
+ copy_mark(node, xorn);
+ be_peephole_exchange(node, xorn);
}
static inline int is_noreg(const ir_node *node)
return;
}
/* we need a free register */
- reg = get_free_gp_reg();
+ reg = get_free_gp_reg(get_irn_irg(imul));
if (reg == NULL)
return;
/* fine, we can rebuild it */
- res = turn_back_am(imul);
+ res = ia32_turn_back_am(imul);
arch_set_irn_register(res, reg);
}
/**
* Replace xorps r,r and xorpd r,r by pxor r,r
*/
-static void peephole_ia32_xZero(ir_node *xor)
+static void peephole_ia32_xZero(ir_node *xorn)
{
- set_irn_op(xor, op_ia32_xPzero);
+ set_irn_op(xorn, op_ia32_xPzero);
}
/**
/**
* Removes node from schedule if it is not used anymore. If irn is a mode_T node
- * all it's Projs are removed as well.
+ * all its Projs are removed as well.
* @param irn The irn to be removed from schedule
*/
static inline void try_kill(ir_node *node)
if (!is_ia32_Store(node) && !is_ia32_Store8Bit(node))
return;
- assert(n_ia32_Store_val == n_ia32_Store8Bit_val);
+ assert((int)n_ia32_Store_val == (int)n_ia32_Store8Bit_val);
pred_proj = get_irn_n(node, n_ia32_Store_val);
if (is_Proj(pred_proj)) {
pred = get_Proj_pred(pred_proj);
if (!is_ia32_Conv_I2I(node) && !is_ia32_Conv_I2I8Bit(node))
return;
- assert(n_ia32_Conv_I2I_val == n_ia32_Conv_I2I8Bit_val);
+ assert((int)n_ia32_Conv_I2I_val == (int)n_ia32_Conv_I2I8Bit_val);
pred = get_irn_n(node, n_ia32_Conv_I2I_val);
if (!is_Proj(pred))
return;
if (!is_ia32_Conv_I2I(node) && !is_ia32_Conv_I2I8Bit(node))
return;
- assert(n_ia32_Conv_I2I_val == n_ia32_Conv_I2I8Bit_val);
+ assert((int)n_ia32_Conv_I2I_val == (int)n_ia32_Conv_I2I8Bit_val);
pred_proj = get_irn_n(node, n_ia32_Conv_I2I_val);
if (is_Proj(pred_proj))
pred = get_Proj_pred(pred_proj);
projects / libfirm / blobdiff