#include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
#include "ia32_transform.h"
#include "ia32_dbg_stat.h"
+#include "ia32_util.h"
typedef enum {
IA32_AM_CAND_NONE = 0,
return cnt;
}
-/**
- * Returns the first mode_M Proj connected to irn.
- */
-static ir_node *get_mem_proj(const ir_node *irn) {
- const ir_edge_t *edge;
- ir_node *src;
-
- assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
-
- foreach_out_edge(irn, edge) {
- src = get_edge_src_irn(edge);
-
- assert(is_Proj(src) && "Proj expected");
-
- if (get_irn_mode(src) == mode_M)
- return src;
- }
-
- return NULL;
-}
-
-/**
- * Returns the first Proj with mode != mode_M connected to irn.
- */
-static ir_node *get_res_proj(const ir_node *irn) {
- const ir_edge_t *edge;
- ir_node *src;
-
- assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
-
- foreach_out_edge(irn, edge) {
- src = get_edge_src_irn(edge);
-
- assert(is_Proj(src) && "Proj expected");
-
- if (get_irn_mode(src) != mode_M)
- return src;
- }
-
- return NULL;
-}
-
/**
* Determines if pred is a Proj and if is_op_func returns true for it's predecessor.
*
if (temp == base)
base = noreg;
+ else if (temp == right)
+ right = noreg;
}
if (isadd) {
DBG_OPT_LEA1(irn, res);
/* get the result Proj of the Add/Sub */
- irn = get_res_proj(irn);
+ irn = ia32_get_res_proj(irn);
assert(irn && "Couldn't find result proj");
foreach_out_edge_safe(left, edge, ne) {
src = get_edge_src_irn(edge);
- if (src && (is_ia32_Ld(src) || is_ia32_St(src) || is_ia32_Store8Bit(src))) {
+ if (src && (get_edge_src_pos(edge) == 0) && (is_ia32_Ld(src) || is_ia32_St(src) || is_ia32_Store8Bit(src))) {
DBG((cg->mod, LEVEL_1, "\nmerging %+F into %+F\n", left, irn));
if (! is_ia32_got_lea(src))
merge_loadstore_lea(src, left);
int need_exchange_on_fail = 0;
DEBUG_ONLY(firm_dbg_module_t *mod = cg->mod;)
- if (! is_ia32_irn(irn))
+ if (! is_ia32_irn(irn) || is_ia32_Ld(irn) || is_ia32_St(irn) || is_ia32_Store8Bit(irn))
return;
block = get_nodes_block(irn);
/* check further, otherwise we check for Store and remember the address, */
/* the Store points to. */
- succ = get_res_proj(irn);
+ succ = ia32_get_res_proj(irn);
assert(succ && "Couldn't find result proj");
addr_b = NULL;
}
/* connect the memory Proj of the Store to the op */
- mem_proj = get_mem_proj(store);
+ mem_proj = ia32_get_proj_for_mode(store, mode_M);
set_Proj_pred(mem_proj, irn);
set_Proj_proj(mem_proj, 1);
DBG_OPT_AM_S(right, irn);
/* If Load has a memory Proj, connect it to the op */
- mem_proj = get_mem_proj(right);
+ mem_proj = ia32_get_proj_for_mode(right, mode_M);
if (mem_proj) {
set_Proj_pred(mem_proj, irn);
set_Proj_proj(mem_proj, 1);
irg_walk_blkwise_graph(cg->irg, NULL, optimize_lea, cg);
}
+ if (cg->dump)
+ be_dump(cg->irg, "-lea", dump_ir_block_graph_sched);
+
if (cg->opt & IA32_OPT_DOAM) {
/* we need height information for am optimization */
heights_t *h = heights_new(cg->irg);