added new attributes for abstract machine

[libfirm] / ir / be / ia32 / ia32_nodes_attr.h

diff --git a/ir/be/ia32/ia32_nodes_attr.h b/ir/be/ia32/ia32_nodes_attr.h
index f214486..cdc75d3 100644 (file)
--- a/ir/be/ia32/ia32_nodes_attr.h
+++ b/ir/be/ia32/ia32_nodes_attr.h
@@ -1,3 +1,9 @@
+/**
+ * Type definitions for ia32 node attributes.
+ * @author Christian Wuerdig
+ * $Id$
+ */
+
 #ifndef _IA32_NODES_ATTR_H_
 #define _IA32_NODES_ATTR_H_
 
@@ -7,10 +13,25 @@
 
 #include "firm_types.h"
 #include "../bearch.h"
+#include "../bemachine.h"
 
 typedef enum { flavour_Div = 1, flavour_Mod, flavour_DivMod } ia32_op_flavour_t;
 typedef enum { pn_EAX, pn_EDX } pn_ia32_Register;
-typedef enum { ia32_Normal, ia32_Const, ia32_SymConst, ia32_AddrModeD, ia32_AddrModeS } ia32_op_type_t;
+
+typedef enum {
+       ia32_Normal,
+       ia32_Const,
+       ia32_SymConst,
+       ia32_AddrModeD,
+       ia32_AddrModeS
+} ia32_op_type_t;
+
+typedef enum {
+       ia32_ImmNone,
+       ia32_ImmConst,
+       ia32_ImmSymConst
+} ia32_immop_type_t;
+
 typedef        enum {
        ia32_am_None   = 0,   /**<< no addrmode support */
        ia32_am_Dest   = 1,   /**<< addrmode for destination only */
@@ -39,6 +60,7 @@ typedef enum {
        ia32_am_B    = ia32_B,
        ia32_am_I    = ia32_I,
        ia32_am_IS   = ia32_I | ia32_S,
+       ia32_am_BI   = ia32_B | ia32_I,
        ia32_am_OB   = ia32_O | ia32_B,
        ia32_am_OI   = ia32_O | ia32_I,
        ia32_am_OIS  = ia32_O | ia32_I | ia32_S,
@@ -54,44 +76,68 @@ typedef struct _ia32_register_req_t {
 typedef struct _ia32_attr_t {
        struct {
                unsigned tp:3;              /**< ia32 node type */
+               unsigned imm_tp:2;          /**< ia32 immop type */
 
                unsigned am_support:2;      /**< indicates addrmode type supported by this node */
                unsigned am_flavour:4;      /**< the concrete addrmode characteristics */
                unsigned am_scale:2;        /**< addrmode scale for index register */
 
                unsigned offs_sign:1;       /**< sign bit of the first offset */
+               unsigned am_sc_sign:1;      /**< sign bit of the address mode symconst */
 
                unsigned use_frame:1;       /**< indicates whether the operation uses the frame pointer or not */
 
                unsigned op_flav:2;         /**< flavour of an op (flavour_Div/Mod/DivMod) */
 
-               unsigned flags:4;           /**< indicating if spillable and/or rematerializeable */
+               unsigned flags:4;           /**< indicating if spillable, rematerializeable, stack modifying and/or ignore */
 
                unsigned is_commutative:1;  /**< indicates whether op is commutative or not */
 
-               unsigned n_res:10;          /**< number of results produced by this node */
+               unsigned emit_cl:1;         /**< indicates whether we must emit cl instead of ecx (needed for shifts) */
+
+               unsigned got_lea:1;         /**< indicates whether or not this node already consumed a LEA */
+
+               unsigned got_reload:1;      /**< set to 1 if node cosumed a reload */
+
+               unsigned n_res:6;           /**< number of results produced by this node */
        } data;
 
-       struct obstack *am_offs;    /**< offsets for AddrMode */
+       int *out_flags;     /**< flags for each produced value */
+
+       int am_offs;        /**< offsets for AddrMode */
+       ident *am_sc;       /**< SymConst for AddrMode */
 
-       tarval *tv;   /**< tarval for immediate operations */
-       char   *sc;   /**< symconst name */
-       char   *cnst; /**< points to the string representation of the constant value (either tv or sc) */
+       union {
+               tarval *tv;     /**< tarval for immediate operations */
+               ident  *sc;     /**< the symconst ident */
+       } cnst_val;
 
-       ir_mode *ls_mode;  /**< the mode of the stored/loaded value */
+       ident *cnst;        /**< points to the string representation of the constant value (either tv or sc) */
 
-       entity *frame_ent; /**< the frame entity attached to this node */
+       ir_mode *ls_mode;   /**< the mode of the stored/loaded value */
+       ir_mode *res_mode;  /**< the mode of the result */
+       ir_mode *src_mode;  /**< source mode for conversion */
+       ir_mode *tgt_mode;  /**< target mode for conversion */
 
-       long pn_code;      /**< projnum "types" (e.g. indicate compare operators and argument numbers) */
+       entity *frame_ent;  /**< the frame entity attached to this node */
+
+       long pn_code;       /**< projnum "types" (e.g. indicate compare operators and argument numbers) */
+
+       unsigned latency;   /**< the latency of the instruction in clock cycles */
 
 #ifndef NDEBUG
        const char *orig_node;      /**< holds the name of the original ir node for debugging purposes */
 #endif /* NDEBUG */
 
+       const be_execution_unit_t ***exec_units; /**< list of units this operation can be executed on */
+
        const ia32_register_req_t **in_req;  /**< register requirements for arguments */
        const ia32_register_req_t **out_req; /**< register requirements for results */
 
-       const arch_register_t **slots;       /**< register slots for assigned registers */
+       const arch_register_t *x87[3];       /**< register slots for x87 register */
+
+       /* must be last, dynamic */
+       const arch_register_t *slots[1];     /**< register slots for assigned registers */
 } ia32_attr_t;
 
 #endif /* _IA32_NODES_ATTR_H_ */