match_8bit_am = 1 << 3, /**< node supports 8bit source AM */
match_16bit_am = 1 << 4, /**< node supports 16bit source AM */
match_immediate = 1 << 5, /**< node supports immediates */
- match_mode_neutral = 1 << 6, /**< 16 and 8 bit modes can be emulated
- by 32 bit operations */
- match_try_am = 1 << 7, /**< only try to produce AM node, don't
+ /** for 8/16 bit modes, mode_neutral operations can be emulated by their
+ * 32bit equivalents, they just don't care about the upper bits (they can be
+ * arbitrary before the insn and are unknown after the instruction). */
+ match_mode_neutral = 1 << 6,
+ /** for 8/16 bit modes, zero_ext operations can be emulated by their
+ * 32bit equivalents, however the upper bits must be zero extended. */
+ match_zero_ext = 1 << 7,
+ /** for 8/16 bit modes, upconv operations can be emulated by their
+ * 32bit equivalents, however the upper bits have to sign/zero extended
+ * based on the operations mode. */
+ match_upconv = 1 << 8,
+ match_try_am = 1 << 9, /**< only try to produce AM node, don't
do anything if AM isn't possible */
- match_two_users = 1 << 8, /**< the instruction uses a load two times ... */
- match_upconv_32 = 1 << 9 /**< 8/16 bit insn are processed by doing
- an upconv to 32bit */
+ match_two_users = 1 << 10,/**< the instruction uses a load two times ... */
} match_flags_t;
ENUM_BITSET(match_flags_t)
typedef struct ia32_op_attr_t ia32_op_attr_t;
struct ia32_op_attr_t {
- match_flags_t flags;
+ //match_flags_t flags;
unsigned latency;
};