/**
* This file implements the creation of the achitecture specific firm opcodes
- * and the coresponding node constructors for the $arch assembler irg.
+ * and the coresponding node constructors for the ia32 assembler irg.
* @author Christian Wuerdig
* $Id$
*/
#include "ia32_nodes_attr.h"
#include "ia32_new_nodes.h"
#include "gen_ia32_regalloc_if.h"
+#include "gen_ia32_machine.h"
/**
* Returns the ident of a SymConst.
* @return The ident of the SymConst
*/
static ident *get_sc_ident(ir_node *symc) {
- assert(get_irn_opcode(symc) == iro_SymConst && "need symconst to get ident");
+ entity *ent;
+ ir_type *owner;
+ ident *id;
switch (get_SymConst_kind(symc)) {
case symconst_addr_name:
return get_SymConst_name(symc);
case symconst_addr_ent:
- return get_entity_ld_ident(get_SymConst_entity(symc));
+ ent = get_SymConst_entity(symc);
+ owner = get_entity_owner(ent);
+ id = get_entity_ld_ident(ent);
+ if (owner == get_tls_type()) {
+ if (get_entity_visibility(ent) == visibility_external_allocated)
+ id = mangle(id, new_id_from_chars("@INDNTPOFF", 10));
+ else
+ id = mangle(id, new_id_from_chars("@NTPOFF", 7));
+ }
+ return id;
default:
assert(0 && "Unsupported SymConst");
return NULL;
}
-
+/**
+ * returns true if a node has x87 registers
+ */
+int ia32_has_x87_register(const ir_node *n) {
+ assert(is_ia32_irn(n) && "Need ia32 node.");
+ return is_irn_machine_user(n, 0);
+}
/***********************************************************************************
* _ _ _ __
* @param reason indicates which kind of information should be dumped
* @return 0 on success or != 0 on failure
*/
-static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) {
+static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
ir_mode *mode = NULL;
int bad = 0;
int i, n_res, am_flav, flags;
case dump_node_nodeattr_txt:
if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n) || is_ia32_Cnst(n)) {
- char *pref = is_ia32_ImmSymConst(n) || (get_ia32_op_type(n) == ia32_SymConst) ? "SymC" : "";
+ char *pref = is_ia32_ImmSymConst(n) || (get_ia32_op_type(n) == ia32_SymConst) ? "SymC " : "";
const char *cnst = get_ia32_cnst(n);
fprintf(F, "[%s%s]", pref, cnst ? cnst : "NONE");
slots = get_ia32_slots(n);
if (slots && n_res > 0) {
for (i = 0; i < n_res; i++) {
- fprintf(F, "reg #%d = %s\n", i, slots[i] ? slots[i]->name : "n/a");
+ const arch_register_t *reg;
+
+ /* retrieve "real" x87 register */
+ if (ia32_has_x87_register(n))
+ reg = get_ia32_attr(n)->x87[i + 2];
+ else
+ reg = slots[i];
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
fprintf(F, "\n");
}
}
fprintf(F, "\n");
+ /* dump immop type */
+ fprintf(F, "immediate = ");
+ switch (get_ia32_immop_type(n)) {
+ case ia32_ImmNone:
+ fprintf(F, "None");
+ break;
+ case ia32_ImmConst:
+ fprintf(F, "Const");
+ break;
+ case ia32_ImmSymConst:
+ fprintf(F, "SymConst");
+ break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
+ break;
+ }
+ fprintf(F, "\n");
/* dump supported am */
fprintf(F, "AM support = ");
/* commutative */
fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
+ /* emit cl */
+ fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
+
+ /* got lea */
+ fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
+
+ /* got reload */
+ fprintf(F, "got reload = %d\n", is_ia32_got_reload(n));
+
+ /* dump latency */
+ fprintf(F, "latency = %d\n", get_ia32_latency(n));
+
/* dump flags */
fprintf(F, "flags =");
flags = get_ia32_flags(n);
if (flags & arch_irn_flags_ignore) {
fprintf(F, " ignore");
}
+ if (flags & arch_irn_flags_modify_sp) {
+ fprintf(F, " modify_sp");
+ }
}
fprintf(F, " (%d)\n", flags);
}
fprintf(F, "\n");
+ /* dump modes */
+ fprintf(F, "ls_mode = ");
+ if (get_ia32_ls_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ fprintf(F, "res_mode = ");
+ if (get_ia32_res_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_res_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ fprintf(F, "src_mode = ");
+ if (get_ia32_src_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_src_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ fprintf(F, "tgt_mode = ");
+ if (get_ia32_tgt_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_tgt_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
#ifndef NDEBUG
/* dump original ir node name */
fprintf(F, "orig node = ");
*/
static ident *get_ident_for_tv(tarval *tv) {
char buf[1024];
-
- assert(tarval_snprintf(buf, sizeof(buf), tv));
+ int len = tarval_snprintf(buf, sizeof(buf), tv);
+ assert(len);
return new_id_from_str(buf);
}
*/
char *get_ia32_am_offs(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- char *res = NULL;
- int size;
+ static char res[64];
- if (! attr->am_offs) {
- return NULL;
- }
-
- size = obstack_object_size(attr->am_offs);
- if (size > 0) {
- res = xmalloc(size + 2);
- res[0] = attr->data.offs_sign ? '-' : '+';
- memcpy(&res[1], obstack_base(attr->am_offs), size);
- res[size + 1] = '\0';
- }
+ snprintf(res, sizeof(res), "%+d", attr->am_offs);
return res;
}
+/**
+ * Gets the addressmode offset as long.
+ */
+int get_ia32_am_offs_int(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->am_offs;
+}
+
/**
* Add an offset for addrmode.
*/
static void extend_ia32_am_offs(ir_node *node, char *offset, char op) {
ia32_attr_t *attr = get_ia32_attr(node);
+ int res, o;
- if (! offset || strlen(offset) < 1)
+ if (offset == NULL || offset[0] == '\0')
return;
- /* offset could already have an explicit sign */
- /* -> supersede op if necessary */
- if (offset[0] == '-' || offset[0] == '+') {
- if (offset[0] == '-') {
- op = (op == '-') ? '+' : '-';
- }
+ if (offset[0] == '-')
+ res = sscanf(offset, "%d", &o);
+ else
+ res = sscanf(offset, "%u", &o);
+ assert(res == 1);
- /* skip explicit sign */
- offset++;
- }
-
- if (! attr->am_offs) {
- /* obstack is not initialized */
- attr->am_offs = xcalloc(1, sizeof(*(attr->am_offs)));
- obstack_init(attr->am_offs);
-
- attr->data.offs_sign = (op == '-') ? 1 : 0;
- }
- else {
- /* If obstack is initialized, connect the new offset with op */
- obstack_printf(attr->am_offs, "%c", op);
- }
-
- obstack_printf(attr->am_offs, "%s", offset);
+ if (op == '-')
+ attr->am_offs -= o;
+ else if (op == '+')
+ attr->am_offs += o;
+ else
+ assert(0);
}
/**
extend_ia32_am_offs(node, (char *)offset, '+');
}
+void add_ia32_am_offs_int(ir_node *node, int offset) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_offs += offset;
+}
+
/**
* Sub an offset for addrmode.
*/
attr->cnst = get_ident_for_tv(tv);
}
-/**
- * Return the sc attribute.
- */
-ident *get_ia32_sc(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->cnst_val.sc;
-}
-
-/**
- * Sets the sc attribute.
- */
-void set_ia32_sc(ir_node *node, ident *sc) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->cnst_val.sc = sc;
- attr->cnst = attr->cnst_val.sc;
-}
-
/**
* Gets the string representation of the internal const (tv or symconst)
*/
/**
* Sets the string representation of the internal const.
*/
-void set_ia32_cnst(ir_node *node, char *cnst) {
+void set_ia32_cnst(ir_node *node, const char *cnst) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->cnst = new_id_from_str(cnst);
}
}
/**
- * Checks if node is commutative.
+ * Checks if node needs %cl.
*/
int is_ia32_emit_cl(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
return attr->data.emit_cl;
}
+/**
+ * Sets node got_lea.
+ */
+void set_ia32_got_lea(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_lea = 1;
+}
+
+/**
+ * Clears node got_lea.
+ */
+void clear_ia32_got_lea(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_lea = 0;
+}
+
+/**
+ * Checks if node got lea.
+ */
+int is_ia32_got_lea(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.got_lea;
+}
+
+/**
+ * Sets node got_reload.
+ */
+void set_ia32_got_reload(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_reload = 1;
+}
+
+/**
+ * Clears node got_reload.
+ */
+void clear_ia32_got_reload(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_reload = 0;
+}
+
+/**
+ * Checks if node got reload.
+ */
+int is_ia32_got_reload(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.got_reload;
+}
+
/**
* Gets the mode of the stored/loaded value (only set for Store/Load)
*/
}
/**
- * Gets the frame entity assigned to this node;
+ * Gets the frame entity assigned to this node.
*/
entity *get_ia32_frame_ent(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
}
/**
- * Sets the frame entity for this node;
+ * Sets the frame entity for this node.
*/
void set_ia32_frame_ent(ir_node *node, entity *ent) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->frame_ent = ent;
+ set_ia32_use_frame(node);
+}
+
+
+/**
+ * Gets the instruction latency.
+ */
+unsigned get_ia32_latency(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->latency;
+}
+
+/**
+* Sets the instruction latency.
+*/
+void set_ia32_latency(ir_node *node, unsigned latency) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->latency = latency;
}
/**
*/
const ia32_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->in_req[pos];
+ return attr->in_req != NULL ? attr->in_req[pos] : NULL;
}
/**
*/
const ia32_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->out_req[pos];
+ return attr->out_req != NULL ? attr->out_req[pos] : NULL;
}
/**
attr->pn_code = code;
}
+/**
+ * Sets the flags for the n'th out.
+ */
+void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ attr->out_flags[pos] = flags;
+}
+
+/**
+ * Gets the flags for the n'th out.
+ */
+arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none;
+}
+
+/**
+ * Get the list of available execution units.
+ */
+const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->exec_units;
+}
+
#ifndef NDEBUG
/**
}
/**
- * Copy the attributes from a Firm Const to an ia32_Const
+ * Copy the attributes from a Firm Const/SymConst to an ia32_Const
*/
void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
ia32_attr_t *attr = get_ia32_attr(ia32_cnst);
+ ir_mode *mode;
assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
case iro_Const:
attr->data.tp = ia32_Const;
attr->cnst_val.tv = get_Const_tarval(cnst);
+ mode = get_tarval_mode(attr->cnst_val.tv);
+ if (mode_is_reference(mode) &&
+ get_mode_null(mode) == attr->cnst_val.tv) {
+ attr->cnst_val.tv = get_mode_null(mode_Iu);
+ }
attr->cnst = get_ident_for_tv(attr->cnst_val.tv);
break;
case iro_SymConst:
* Checks if node is a Load or xLoad/vfLoad.
*/
int is_ia32_Ld(const ir_node *node) {
- return is_ia32_Load(node) || is_ia32_xLoad(node) || is_ia32_vfld(node) || is_ia32_fld(node);
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Load || op == iro_ia32_xLoad || op == iro_ia32_vfld || op == iro_ia32_fld;
}
/**
* Checks if node is a Store or xStore/vfStore.
*/
int is_ia32_St(const ir_node *node) {
- return is_ia32_Store(node) || is_ia32_xStore(node) || is_ia32_vfst(node) || is_ia32_fst(node) || is_ia32_fstp(node);
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Store || op == iro_ia32_xStore || op == iro_ia32_vfst || op == iro_ia32_fst || op == iro_ia32_fstp;
}
/**
* Checks if node is a Const or xConst/vfConst.
*/
int is_ia32_Cnst(const ir_node *node) {
- return is_ia32_Const(node) || is_ia32_xConst(node) || is_ia32_vfConst(node);
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
}
/**
const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return arch_register_get_name(attr->slots[pos]);
int get_ia32_out_regnr(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return arch_register_get_index(attr->slots[pos]);
const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return attr->slots[pos];
}
-/**
- * Allocates num register slots for node.
- */
-void alloc_ia32_reg_slots(ir_node *node, int num) {
- ia32_attr_t *attr = get_ia32_attr(node);
-
- if (num) {
- attr->slots = (const arch_register_t **)NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(node)), num);
- memset((void *) attr->slots, 0, sizeof(attr->slots[0]) * num);
- }
- else {
- attr->slots = NULL;
- }
-
- attr->data.n_res = num;
-}
-
/**
* Initializes the nodes attributes.
*/
void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const ia32_register_req_t **in_reqs,
- const ia32_register_req_t **out_reqs, int n_res)
+ const ia32_register_req_t **out_reqs, const be_execution_unit_t ***execution_units,
+ int n_res, unsigned latency)
{
+ ia32_attr_t *attr = get_ia32_attr(node);
+
set_ia32_flags(node, flags);
set_ia32_in_req_all(node, in_reqs);
set_ia32_out_req_all(node, out_reqs);
- alloc_ia32_reg_slots(node, n_res);
+ set_ia32_latency(node, latency);
+ set_ia32_n_res(node, n_res);
+
+ attr->exec_units = execution_units;
+
+ attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res);
+ memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
+
+ memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
}
/***************************************************************************************
return !equ;
}
+/* Copy attribute function not needed any more, but might be of use later. */
+#if 0
/* copies the ia32 attributes */
static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
ia32_attr_t *attr_old = get_ia32_attr(old_node);
/* copy the attributes */
memcpy(attr_new, attr_old, sizeof(*attr_new));
-
- /* copy the register slots */
- attr_new->slots = (const arch_register_t **)NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(new_node)), n_res);
- memcpy((void *)attr_new->slots, (void *)attr_old->slots, sizeof(attr_new->slots[0]) * n_res);
}
/**
op->ops.copy_attr = ia32_copy_attr;
}
}
+#endif
/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"
projects / libfirm / blobdiff