/**
* This file implements the creation of the achitecture specific firm opcodes
- * and the coresponding node constructors for the $arch assembler irg.
+ * and the coresponding node constructors for the ia32 assembler irg.
* @author Christian Wuerdig
* $Id$
*/
-
#ifdef HAVE_CONFIG_H
-#include "config.h"
+#include <config.h>
+#endif
+
+#ifdef HAVE_MALLOC_H
+#include <malloc.h>
+#endif
+
+#ifdef HAVE_ALLOCA_H
+#include <alloca.h>
#endif
#include <stdlib.h>
#include "irop.h"
#include "firm_common_t.h"
#include "irvrfy_t.h"
+#include "irprintf.h"
+#include "iredges.h"
+#include "error.h"
+#include "raw_bitset.h"
#include "../bearch.h"
#include "ia32_nodes_attr.h"
#include "ia32_new_nodes.h"
#include "gen_ia32_regalloc_if.h"
+#include "gen_ia32_machine.h"
+/**
+ * Returns the ident of an entity
+ * @param ent The entity
+ * @return The ident of the entity
+ */
+ident *ia32_get_ent_ident(ir_entity *ent) {
+ ir_type *owner = get_entity_owner(ent);
+ ident *id = get_entity_ld_ident(ent);
+
+ if (owner == get_tls_type()) {
+ if (get_entity_visibility(ent) == visibility_external_allocated)
+ id = mangle(id, new_id_from_chars("@INDNTPOFF", 10));
+ else
+ id = mangle(id, new_id_from_chars("@NTPOFF", 7));
+ }
+ return id;
+}
+/**
+ * Returns the ident of a SymConst.
+ * @param symc The SymConst
+ * @return The ident of the SymConst
+ */
+static ident *get_sc_ident(ir_node *symc) {
+ switch (get_SymConst_kind(symc)) {
+ case symconst_addr_name:
+ return get_SymConst_name(symc);
+
+ case symconst_addr_ent:
+ return ia32_get_ent_ident(get_SymConst_entity(symc));
+
+ default:
+ assert(0 && "Unsupported SymConst");
+ }
+
+ return NULL;
+}
+
+/**
+ * returns true if a node has x87 registers
+ */
+int ia32_has_x87_register(const ir_node *n) {
+ assert(is_ia32_irn(n) && "Need ia32 node.");
+ return is_irn_machine_user(n, 0);
+}
/***********************************************************************************
* _ _ _ __
***********************************************************************************/
/**
- * Prints a tarval to file F.
- * @param F output file
- * @param tv tarval
- * @param brackets 1 == print square brackets around tarval
+ * Dumps the register requirements for either in or out.
*/
-static void fprintf_tv(FILE *F, tarval *tv, int brackets) {
- char buf[1024];
- tarval_snprintf(buf, sizeof(buf), tv);
+static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
+ int inout) {
+ char *dir = inout ? "out" : "in";
+ int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
+ char buf[1024];
+ int i;
- if (brackets)
- fprintf(F, "[%s]", buf);
- else
- fprintf(F, "%s", buf);
-}
+ memset(buf, 0, sizeof(buf));
-/**
- * Returns the name of a SymConst.
- * @param symc the SymConst
- * @return name of the SymConst
- */
-const char *get_sc_name(ir_node *symc) {
- if (get_irn_opcode(symc) != iro_SymConst)
- return "NONE";
+ if (reqs) {
+ for (i = 0; i < max; i++) {
+ fprintf(F, "%sreq #%d =", dir, i);
- switch (get_SymConst_kind(symc)) {
- case symconst_addr_name:
- return get_id_str(get_SymConst_name(symc));
+ if (reqs[i]->type == arch_register_req_type_none) {
+ fprintf(F, " n/a");
+ }
- case symconst_addr_ent:
- return get_entity_ld_name(get_SymConst_entity(symc));
+ if (reqs[i]->type & arch_register_req_type_normal) {
+ fprintf(F, " %s", reqs[i]->cls->name);
+ }
- default:
- assert(0 && "Unsupported SymConst");
- }
+ if (reqs[i]->type & arch_register_req_type_limited) {
+ fprintf(F, " %s",
+ arch_register_req_format(buf, sizeof(buf), reqs[i], n));
+ }
- return NULL;
+ if (reqs[i]->type & arch_register_req_type_should_be_same) {
+ ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
+ }
+
+ if (reqs[i]->type & arch_register_req_type_should_be_different) {
+ ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
+ }
+
+ fprintf(F, "\n");
+ }
+
+ fprintf(F, "\n");
+ }
+ else {
+ fprintf(F, "%sreq = N/A\n", dir);
+ }
}
/**
* @param reason indicates which kind of information should be dumped
* @return 0 on success or != 0 on failure
*/
-static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) {
- const char *name, *p;
- ir_mode *mode = NULL;
- int bad = 0;
- asmop_attr *attr;
- int i;
- const ia32_register_req_t **reqs;
+static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
+ ir_mode *mode = NULL;
+ int bad = 0;
+ int i, n_res, am_flav, flags;
+ const arch_register_req_t **reqs;
const arch_register_t **slots;
switch (reason) {
case dump_node_opcode_txt:
- name = get_irn_opname(n);
- fprintf(F, "%s", name);
+ fprintf(F, "%s", get_irn_opname(n));
break;
case dump_node_mode_txt:
mode = get_irn_mode(n);
- if (mode == mode_BB || mode == mode_ANY || mode == mode_BAD || mode == mode_T) {
- mode = NULL;
- }
- else if (is_ia32_Load(n)) {
- mode = get_irn_mode(get_irn_n(n, 1));
- }
- else if (is_ia32_Store(n)) {
- mode = get_irn_mode(get_irn_n(n, 2));
+ if (is_ia32_Ld(n) || is_ia32_St(n)) {
+ mode = get_ia32_ls_mode(n);
}
- if (mode) {
- fprintf(F, "[%s]", get_mode_name(mode));
- }
+ fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
break;
case dump_node_nodeattr_txt:
- name = get_irn_opname(n);
- p = name + strlen(name) - 2;
- if ((p[0] == '_' && p[1] == 'i') || is_ia32_Const(n) || is_ia32_fConst(n)) {
- tarval *tv = get_ia32_Immop_tarval(n);
- if (tv) {
- fprintf_tv(F, tv, 1);
+ if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ if(is_ia32_ImmSymConst(n)) {
+ ident *id = get_ia32_Immop_symconst(n);
+ fprintf(F, "[SymC %s]", get_id_str(id));
+ } else {
+ char buf[128];
+ tarval *tv = get_ia32_Immop_tarval(n);
+
+ tarval_snprintf(buf, sizeof(buf), tv);
+ fprintf(F, "[%s]", buf);
}
- else {
- fprintf(F, "[SymC &%s]", get_sc_name(get_ia32_old_ir(n)));
- }
- }
- else if (is_ia32_Call(n)) {
- ir_node *sc = get_ia32_old_ir(n);
-
- fprintf(F, "&%s ", get_sc_name(sc));
}
- if (is_ia32_AddrMode(n)) {
- fprintf(F, "[AddrMode] ");
+ if (! is_ia32_Lea(n)) {
+ if (is_ia32_AddrModeS(n)) {
+ fprintf(F, "[AM S] ");
+ }
+ else if (is_ia32_AddrModeD(n)) {
+ fprintf(F, "[AM D] ");
+ }
}
break;
case dump_node_info_txt:
- attr = get_ia32_attr(n);
+ n_res = get_ia32_n_res(n);
+ fprintf(F, "=== IA32 attr begin ===\n");
/* dump IN requirements */
if (get_irn_arity(n) > 0) {
reqs = get_ia32_in_req_all(n);
-
- if (reqs) {
- for (i = 0; i < get_irn_arity(n); i++) {
- if (reqs[i]->req.type != arch_register_req_type_none) {
- fprintf(F, "inreq[%d]=[%s]\n", i, reqs[i]->req.cls->name);
- }
- else {
- fprintf(F, "inreq[%d]=[none]\n", i);
- }
- }
-
- fprintf(F, "\n");
- }
- else {
- fprintf(F, "NO IN REQS\n");
- }
+ dump_reg_req(F, n, reqs, 0);
}
/* dump OUT requirements */
- if (attr->n_res > 0) {
+ if (n_res > 0) {
reqs = get_ia32_out_req_all(n);
-
- if (reqs) {
- for (i = 0; i < attr->n_res; i++) {
- if (reqs[i]->req.type != arch_register_req_type_none) {
- fprintf(F, "outreq[%d]=[%s]\n", i, reqs[i]->req.cls->name);
- }
- else {
- fprintf(F, "outreq[%d]=[none]\n", i);
- }
- }
- }
- else {
- fprintf(F, "NO OUT REQS\n");
- }
+ dump_reg_req(F, n, reqs, 1);
}
/* dump assigned registers */
slots = get_ia32_slots(n);
- if (slots && attr->n_res > 0) {
- for (i = 0; i < attr->n_res; i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
+ if (slots && n_res > 0) {
+ for (i = 0; i < n_res; i++) {
+ const arch_register_t *reg;
+
+ /* retrieve "real" x87 register */
+ if (ia32_has_x87_register(n))
+ reg = get_ia32_attr(n)->x87[i + 2];
+ else
+ reg = slots[i];
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
+ fprintf(F, "\n");
}
- /* special for LEA */
- if (is_ia32_Lea(n) || is_ia32_Lea_i(n)) {
- tarval *o = get_ia32_am_offs(n);
- tarval *tv = get_ia32_Immop_tarval(n);
+ /* dump op type */
+ fprintf(F, "op = ");
+ switch (get_ia32_op_type(n)) {
+ case ia32_Normal:
+ fprintf(F, "Normal");
+ break;
+ case ia32_AddrModeD:
+ fprintf(F, "AM Dest (Load+Store)");
+ break;
+ case ia32_AddrModeS:
+ fprintf(F, "AM Source (Load)");
+ break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_op_type(n));
+ break;
+ }
+ fprintf(F, "\n");
+
+ /* dump immop type */
+ fprintf(F, "immediate = ");
+ switch (get_ia32_immop_type(n)) {
+ case ia32_ImmNone:
+ fprintf(F, "None");
+ break;
+ case ia32_ImmConst:
+ fprintf(F, "Const");
+ break;
+ case ia32_ImmSymConst:
+ fprintf(F, "SymConst");
+ break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
+ break;
+ }
+ fprintf(F, "\n");
+
+ /* dump supported am */
+ fprintf(F, "AM support = ");
+ switch (get_ia32_am_support(n)) {
+ case ia32_am_None:
+ fprintf(F, "none");
+ break;
+ case ia32_am_Source:
+ fprintf(F, "source only (Load)");
+ break;
+ case ia32_am_Dest:
+ fprintf(F, "dest only (Load+Store)");
+ break;
+ case ia32_am_Full:
+ fprintf(F, "full");
+ break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_am_support(n));
+ break;
+ }
+ fprintf(F, "\n");
- fprintf(F, "LEA ");
- if (o) {
- fprintf_tv(F, o, 0);
+ /* dump am flavour */
+ fprintf(F, "AM flavour =");
+ am_flav = get_ia32_am_flavour(n);
+ if (am_flav == ia32_am_N) {
+ fprintf(F, " none");
+ }
+ else {
+ if (am_flav & ia32_O) {
+ fprintf(F, " O");
+ }
+ if (am_flav & ia32_B) {
+ fprintf(F, " B");
+ }
+ if (am_flav & ia32_I) {
+ fprintf(F, " I");
}
+ if (am_flav & ia32_S) {
+ fprintf(F, " S");
+ }
+ }
+ fprintf(F, " (%d)\n", am_flav);
- fprintf(F, "(%s", get_irn_opname(get_irn_n(n, 0)));
+ /* dump AM offset */
+ if(get_ia32_am_offs_int(n) != 0) {
+ fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
+ }
- if (is_ia32_Lea(n)) {
- fprintf(F, ", %s", get_irn_opname(get_irn_n(n, 1)));
- }
+ /* dump AM symconst */
+ if(get_ia32_am_sc(n) != NULL) {
+ fprintf(F, "AM symconst = %s\n", get_id_str(get_ia32_am_sc(n)));
+ }
+
+ /* dump AM scale */
+ fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
+
+ /* dump pn code */
+ if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
+ fprintf(F, "pn_code = %d (%s, unsigned)\n", get_ia32_pncode(n),
+ get_pnc_string(get_ia32_pncode(n) & ~ia32_pn_Cmp_Unsigned));
+ } else {
+ fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
+ get_pnc_string(get_ia32_pncode(n)));
+ }
- if (tv) {
- fprintf(F, ", ");
- fprintf_tv(F, tv, 0);
+ /* dump n_res */
+ fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
+
+ /* dump use_frame */
+ fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
+
+ /* commutative */
+ fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
+
+ /* emit cl */
+ fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
+
+ /* got lea */
+ fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
+
+ /* need stackent */
+ fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
+
+ /* dump latency */
+ fprintf(F, "latency = %d\n", get_ia32_latency(n));
+
+ /* dump flags */
+ fprintf(F, "flags =");
+ flags = get_ia32_flags(n);
+ if (flags == arch_irn_flags_none) {
+ fprintf(F, " none");
+ }
+ else {
+ if (flags & arch_irn_flags_dont_spill) {
+ fprintf(F, " unspillable");
+ }
+ if (flags & arch_irn_flags_rematerializable) {
+ fprintf(F, " remat");
+ }
+ if (flags & arch_irn_flags_ignore) {
+ fprintf(F, " ignore");
+ }
+ if (flags & arch_irn_flags_modify_sp) {
+ fprintf(F, " modify_sp");
}
- fprintf(F, ")\n");
}
+ fprintf(F, " (%d)\n", flags);
+
+ /* dump frame entity */
+ fprintf(F, "frame entity = ");
+ if (get_ia32_frame_ent(n)) {
+ ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ /* dump modes */
+ fprintf(F, "ls_mode = ");
+ if (get_ia32_ls_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+#ifndef NDEBUG
+ /* dump original ir node name */
+ fprintf(F, "orig node = ");
+ if (get_ia32_orig_node(n)) {
+ fprintf(F, "%s", get_ia32_orig_node(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+#endif /* NDEBUG */
+
+ fprintf(F, "=== IA32 attr end ===\n");
+ /* end of: case dump_node_info_txt */
break;
}
* Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
* Firm was made by people hating const :-(
*/
-asmop_attr *get_ia32_attr(const ir_node *node) {
+ia32_attr_t *get_ia32_attr(const ir_node *node) {
assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
- return (asmop_attr *)get_irn_generic_attr((ir_node *)node);
+ return (ia32_attr_t *)get_irn_generic_attr((ir_node *)node);
}
/**
* Gets the type of an ia32 node.
*/
-asmop_type_t get_ia32_op_type(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->tp;
+ia32_op_type_t get_ia32_op_type(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.tp;
}
/**
* Sets the type of an ia32 node.
*/
-void set_ia32_op_type(const ir_node *node, asmop_type_t tp) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->tp = tp;
+void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.tp = tp;
}
/**
- * Gets the addr mode type of an ia32 node
+ * Gets the immediate op type of an ia32 node.
*/
-addrmode_type_t get_ia32_am_type(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->am_tp;
+ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.imm_tp;
}
/**
- * Sets the addr mode type of an ia32 node
+ * Gets the supported addrmode of an ia32 node
*/
-void set_ia32_am_type(const ir_node *node, addrmode_type_t am_tp) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->am_tp = am_tp;
+ia32_am_type_t get_ia32_am_support(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.am_support;
}
/**
- * Gets the addr mode offset.
+ * Sets the supported addrmode of an ia32 node
*/
-tarval *get_ia32_am_offs(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
+void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_support = am_tp;
+}
+
+/**
+ * Gets the addrmode flavour of an ia32 node
+ */
+ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.am_flavour;
+}
+
+/**
+ * Sets the addrmode flavour of an ia32 node
+ */
+void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_flavour = am_flavour;
+}
+
+/**
+ * Gets the addressmode offset as int.
+ */
+int get_ia32_am_offs_int(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
return attr->am_offs;
}
/**
- * Sets the offset for addr mode.
+ * Sets the addressmode offset from an int.
*/
-void set_ia32_am_offs(ir_node *node, tarval *am_offs) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->am_offs = am_offs;
+void set_ia32_am_offs_int(ir_node *node, int offset) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_offs = offset;
+}
+
+void add_ia32_am_offs_int(ir_node *node, int offset) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_offs += offset;
+}
+
+/**
+ * Returns the symconst ident associated to addrmode.
+ */
+ident *get_ia32_am_sc(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->am_sc;
+}
+
+/**
+ * Sets the symconst ident associated to addrmode.
+ */
+void set_ia32_am_sc(ir_node *node, ident *sc) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_sc = sc;
+}
+
+/**
+ * Sets the sign bit for address mode symconst.
+ */
+void set_ia32_am_sc_sign(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_sc_sign = 1;
+}
+
+/**
+ * Clears the sign bit for address mode symconst.
+ */
+void clear_ia32_am_sc_sign(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_sc_sign = 0;
+}
+
+/**
+ * Returns the sign bit for address mode symconst.
+ */
+int is_ia32_am_sc_sign(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.am_sc_sign;
}
/**
* Gets the addr mode const.
*/
-tarval *get_ia32_am_const(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->am_const;
+int get_ia32_am_scale(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.am_scale;
}
/**
- * Sets the const for addr mode.
+ * Sets the index register scale for addrmode.
*/
-void set_ia32_am_const(ir_node *node, tarval *am_const) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->am_const = am_const;
+void set_ia32_am_scale(ir_node *node, int scale) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_scale = scale;
}
/**
* Return the tarval of an immediate operation or NULL in case of SymConst
*/
tarval *get_ia32_Immop_tarval(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->tv;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ assert(attr->data.imm_tp == ia32_ImmConst);
+ return attr->cnst_val.tv;
}
/**
* Sets the attributes of an immediate operation to the specified tarval
*/
void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->tv = tv;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.imm_tp = ia32_ImmConst;
+ attr->cnst_val.tv = tv;
+}
+
+void set_ia32_Immop_symconst(ir_node *node, ident *ident) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.imm_tp = ia32_ImmSymConst;
+ attr->cnst_val.sc = ident;
+}
+
+ident *get_ia32_Immop_symconst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ assert(attr->data.imm_tp == ia32_ImmSymConst);
+ return attr->cnst_val.sc;
+}
+
+/**
+ * Sets the uses_frame flag.
+ */
+void set_ia32_use_frame(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.use_frame = 1;
+}
+
+/**
+ * Clears the uses_frame flag.
+ */
+void clear_ia32_use_frame(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.use_frame = 0;
+}
+
+/**
+ * Gets the uses_frame flag.
+ */
+int is_ia32_use_frame(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.use_frame;
+}
+
+/**
+ * Sets node to commutative.
+ */
+void set_ia32_commutative(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.is_commutative = 1;
+}
+
+/**
+ * Sets node to non-commutative.
+ */
+void clear_ia32_commutative(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.is_commutative = 0;
+}
+
+/**
+ * Checks if node is commutative.
+ */
+int is_ia32_commutative(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.is_commutative;
+}
+
+/**
+ * Sets node emit_cl.
+ */
+void set_ia32_emit_cl(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.emit_cl = 1;
+}
+
+/**
+ * Clears node emit_cl.
+ */
+void clear_ia32_emit_cl(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.emit_cl = 0;
+}
+
+/**
+ * Checks if node needs %cl.
+ */
+int is_ia32_emit_cl(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.emit_cl;
+}
+
+/**
+ * Sets node got_lea.
+ */
+void set_ia32_got_lea(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_lea = 1;
+}
+
+/**
+ * Clears node got_lea.
+ */
+void clear_ia32_got_lea(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_lea = 0;
}
/**
- * Return the old_ir attribute.
+ * Checks if node got lea.
*/
-ir_node *get_ia32_old_ir(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->old_ir;
+int is_ia32_got_lea(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.got_lea;
+}
+
+void set_ia32_need_stackent(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.need_stackent = 1;
+}
+
+void clear_ia32_need_stackent(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.need_stackent = 0;
+}
+
+int is_ia32_need_stackent(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.need_stackent;
}
/**
- * Sets the old_ir attribute.
+ * Gets the mode of the stored/loaded value (only set for Store/Load)
*/
-void set_ia32_old_ir(ir_node *node, ir_node *old_ir) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->old_ir = old_ir;
+ir_mode *get_ia32_ls_mode(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->ls_mode;
+}
+
+/**
+ * Sets the mode of the stored/loaded value (only set for Store/Load)
+ */
+void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->ls_mode = mode;
+}
+
+/**
+ * Gets the frame entity assigned to this node.
+ */
+ir_entity *get_ia32_frame_ent(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->frame_ent;
+}
+
+/**
+ * Sets the frame entity for this node.
+ */
+void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->frame_ent = ent;
+ if(ent != NULL)
+ set_ia32_use_frame(node);
+ else
+ clear_ia32_use_frame(node);
+}
+
+
+/**
+ * Gets the instruction latency.
+ */
+unsigned get_ia32_latency(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->latency;
+}
+
+/**
+* Sets the instruction latency.
+*/
+void set_ia32_latency(ir_node *node, unsigned latency) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->latency = latency;
}
/**
* Returns the argument register requirements of an ia32 node.
*/
-const ia32_register_req_t **get_ia32_in_req_all(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
+const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
return attr->in_req;
}
+/**
+ * Sets the argument register requirements of an ia32 node.
+ */
+void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->in_req = reqs;
+}
+
/**
* Returns the result register requirements of an ia32 node.
*/
-const ia32_register_req_t **get_ia32_out_req_all(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
+const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
return attr->out_req;
}
+/**
+ * Sets the result register requirements of an ia32 node.
+ */
+void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->out_req = reqs;
+}
+
/**
* Returns the argument register requirement at position pos of an ia32 node.
*/
-const ia32_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
- asmop_attr *attr = get_ia32_attr(node);
+const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ if(attr->in_req == NULL)
+ return arch_no_register_req;
+
return attr->in_req[pos];
}
/**
* Returns the result register requirement at position pos of an ia32 node.
*/
-const ia32_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
- asmop_attr *attr = get_ia32_attr(node);
+const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ if(attr->out_req == NULL)
+ return arch_no_register_req;
+
return attr->out_req[pos];
}
/**
* Sets the OUT register requirements at position pos.
*/
-void set_ia32_req_out(ir_node *node, const ia32_register_req_t *req, int pos) {
- asmop_attr *attr = get_ia32_attr(node);
+void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
attr->out_req[pos] = req;
}
/**
* Sets the IN register requirements at position pos.
*/
-void set_ia32_req_in(ir_node *node, const ia32_register_req_t *req, int pos) {
- asmop_attr *attr = get_ia32_attr(node);
+void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
attr->in_req[pos] = req;
}
* Returns the register flag of an ia32 node.
*/
arch_irn_flags_t get_ia32_flags(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->flags;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.flags;
}
/**
* Sets the register flag of an ia32 node.
*/
-void set_ia32_flags(const ir_node *node, arch_irn_flags_t flags) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->flags = flags;
+void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.flags = flags;
}
/**
* Returns the result register slots of an ia32 node.
*/
const arch_register_t **get_ia32_slots(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
+ ia32_attr_t *attr = get_ia32_attr(node);
return attr->slots;
}
/**
- * Returns the name of the OUT register at position pos.
+ * Sets the number of results.
*/
-const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
- asmop_attr *attr = get_ia32_attr(node);
-
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
+void set_ia32_n_res(ir_node *node, int n_res) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.n_res = n_res;
}
/**
- * Returns the index of the OUT register at position pos within its register class.
+ * Returns the number of results.
*/
-int get_ia32_out_regnr(const ir_node *node, int pos) {
- asmop_attr *attr = get_ia32_attr(node);
-
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
+int get_ia32_n_res(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.n_res;
}
/**
- * Returns the OUT register at position pos.
+ * Returns the flavour of an ia32 node,
*/
-const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
- asmop_attr *attr = get_ia32_attr(node);
+ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.op_flav;
+}
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
+/**
+ * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
+ */
+void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.op_flav = op_flav;
+}
- return attr->slots[pos];
+/**
+ * Returns the projnum code.
+ */
+pn_Cmp get_ia32_pncode(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->pn_code;
}
/**
- * Sets the number of results.
+ * Sets the projnum code
*/
-void set_ia32_n_res(ir_node *node, int n_res) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->n_res = n_res;
+void set_ia32_pncode(ir_node *node, pn_Cmp code) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->pn_code = code;
}
/**
- * Returns the number of results.
+ * Sets the flags for the n'th out.
*/
-int get_ia32_n_res(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->n_res;
+void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ attr->out_flags[pos] = flags;
}
/**
- * Returns the flavour of an ia32 node,
+ * Gets the flags for the n'th out.
*/
-op_flavour_t get_ia32_flavour(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->op_flav;
+arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none;
}
/**
- * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
+ * Get the list of available execution units.
*/
-void set_ia32_flavour(ir_node *node, op_flavour_t op_flav) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->op_flav = op_flav;
+const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->exec_units;
}
+#ifndef NDEBUG
+
/**
- * Returns the projnum code.
+ * Returns the name of the original ir node.
*/
-long get_ia32_pncode(const ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return attr->pn_code;
+const char *get_ia32_orig_node(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->orig_node;
}
/**
- * Sets the projnum code
+ * Sets the name of the original ir node.
*/
-void set_ia32_pncode(ir_node *node, long code) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->pn_code = code;
+void set_ia32_orig_node(ir_node *node, const char *name) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->orig_node = name;
}
+#endif /* NDEBUG */
/******************************************************************************************************
* _ _ _ _ __ _ _
******************************************************************************************************/
/**
- * Gets the type of an ia32_Const.
+ * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
+ */
+void copy_ia32_Immop_attr(ir_node *node, ir_node *from) {
+ ia32_immop_type_t immop_type = get_ia32_immop_type(from);
+
+ if(immop_type == ia32_ImmConst) {
+ set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from));
+ } else if(immop_type == ia32_ImmSymConst) {
+ set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from));
+ } else {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ assert(immop_type == ia32_ImmNone);
+ attr->data.imm_tp = ia32_ImmNone;
+ }
+}
+
+/**
+ * Copy the attributes from a Firm Const/SymConst to an ia32_Const
+ */
+void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
+ assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
+
+ switch (get_irn_opcode(cnst)) {
+ case iro_Const:
+ set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst));
+ break;
+ case iro_SymConst:
+ set_ia32_Immop_symconst(ia32_cnst, get_sc_ident(cnst));
+ break;
+ case iro_Unknown:
+ assert(0 && "Unknown Const NYI");
+ break;
+ default:
+ assert(0 && "Cannot create ia32_Const for this opcode");
+ }
+}
+
+void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
+ if(mode_is_reference(get_tarval_mode(tv))) {
+ if(tarval_is_null(tv)) {
+ tv = get_tarval_null(mode_Iu);
+ } else {
+ panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
+ }
+ } else {
+ tv = tarval_convert_to(tv, mode_Iu);
+ }
+
+ assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
+ && tv != NULL);
+ set_ia32_Immop_tarval(ia32_cnst, tv);
+}
+
+
+/**
+ * Sets the AddrMode(S|D) attribute
*/
-unsigned get_ia32_Const_type(ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
+void set_ia32_AddrMode(ir_node *node, char direction) {
+ ia32_attr_t *attr = get_ia32_attr(node);
- assert((is_ia32_Const(node) || is_ia32_fConst(node)) && "Need ia32_Const to get type");
+ switch (direction) {
+ case 'D':
+ attr->data.tp = ia32_AddrModeD;
+ break;
+ case 'S':
+ attr->data.tp = ia32_AddrModeS;
+ break;
+ default:
+ assert(0 && "wrong AM type");
+ }
+}
- return attr->tp;
+/**
+ * Returns whether or not the node is an immediate operation with Const.
+ */
+int is_ia32_ImmConst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.imm_tp == ia32_ImmConst);
}
/**
- * Sets the type of an ia32_Const.
+ * Returns whether or not the node is an immediate operation with SymConst.
*/
-void set_ia32_Const_type(ir_node *node, int type) {
- asmop_attr *attr = get_ia32_attr(node);
+int is_ia32_ImmSymConst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.imm_tp == ia32_ImmSymConst);
+}
- assert((is_ia32_Const(node) || is_ia32_fConst(node)) && "Need ia32_Const to set type");
- assert((type == asmop_Const || type == asmop_SymConst) && "Unsupported ia32_Const type");
+/**
+ * Returns whether or not the node is an AddrModeS node.
+ */
+int is_ia32_AddrModeS(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.tp == ia32_AddrModeS);
+}
- attr->tp = type;
+/**
+ * Returns whether or not the node is an AddrModeD node.
+ */
+int is_ia32_AddrModeD(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.tp == ia32_AddrModeD);
}
/**
- * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
+ * Checks if node is a Load or xLoad/vfLoad.
*/
-void set_ia32_Immop_attr(ir_node *node, ir_node *cnst) {
- asmop_attr *na = get_ia32_attr(node);
- asmop_attr *ca = get_ia32_attr(cnst);
+int is_ia32_Ld(const ir_node *node) {
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Load || op == iro_ia32_xLoad || op == iro_ia32_vfld || op == iro_ia32_fld;
+}
- assert((is_ia32_Const(cnst) || is_ia32_fConst(cnst)) && "Need ia32_Const to set Immop attr");
+/**
+ * Checks if node is a Store or xStore/vfStore.
+ */
+int is_ia32_St(const ir_node *node) {
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Store || op == iro_ia32_xStore || op == iro_ia32_vfst || op == iro_ia32_fst || op == iro_ia32_fstp;
+}
- na->tp = ca->tp;
- na->tv = ca->tv;
+/**
+ * Checks if node is a Const or xConst/vfConst.
+ */
+int is_ia32_Cnst(const ir_node *node) {
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
+}
- if (ca->old_ir) {
- na->old_ir = xcalloc(1, sizeof(*(ca->old_ir)));
- memcpy(na->old_ir, ca->old_ir, sizeof(*(ca->old_ir)));
- }
- else {
- na->old_ir = NULL;
- }
+/**
+ * Returns the name of the OUT register at position pos.
+ */
+const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return arch_register_get_name(attr->slots[pos]);
}
/**
- * Copy the attributes from a Const to an ia32_Const
+ * Returns the index of the OUT register at position pos within its register class.
*/
-void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
- asmop_attr *attr = get_ia32_attr(ia32_cnst);
+int get_ia32_out_regnr(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
- assert((is_ia32_Const(ia32_cnst) || is_ia32_fConst(ia32_cnst)) && "Need ia32_Const to set Const attr");
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
- switch (get_irn_opcode(cnst)) {
- case iro_Const:
- attr->tp = asmop_Const;
- attr->tv = get_Const_tarval(cnst);
- break;
- case iro_SymConst:
- attr->tp = asmop_SymConst;
- attr->tv = NULL;
- attr->old_ir = xcalloc(1, sizeof(*cnst));
- memcpy(attr->old_ir, cnst, sizeof(*cnst));
- break;
- case iro_Unknown:
- assert(0 && "Unknown Const NYI");
- break;
- default:
- assert(0 && "Cannot create ia32_Const for this opcode");
- }
+ return arch_register_get_index(attr->slots[pos]);
}
/**
- * Sets the AddrMode attribute
+ * Returns the OUT register at position pos.
*/
-void set_ia32_AddrMode(ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- attr->tp = asmop_AddrMode;
+const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return attr->slots[pos];
}
/**
- * Returns whether or not the node is an AddrMode node.
+ * Initializes the nodes attributes.
*/
-int is_ia32_AddrMode(ir_node *node) {
- asmop_attr *attr = get_ia32_attr(node);
- return (attr->tp == asmop_AddrMode);
+void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
+ const arch_register_req_t **in_reqs,
+ const arch_register_req_t **out_reqs,
+ const be_execution_unit_t ***execution_units,
+ int n_res, unsigned latency)
+{
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ set_ia32_flags(node, flags);
+ set_ia32_in_req_all(node, in_reqs);
+ set_ia32_out_req_all(node, out_reqs);
+ set_ia32_latency(node, latency);
+ set_ia32_n_res(node, n_res);
+
+ attr->exec_units = execution_units;
+
+ attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res);
+ memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
+
+ memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
}
+ir_node *get_ia32_result_proj(const ir_node *node)
+{
+ const ir_edge_t *edge;
+ foreach_out_edge(node, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ if(get_Proj_proj(proj) == 0) {
+ return proj;
+ }
+ }
+ return NULL;
+}
/***************************************************************************************
* _ _ _
*
***************************************************************************************/
+/* default compare operation to compare attributes */
+int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) {
+ if (a->data.tp != b->data.tp
+ || a->data.imm_tp != b->data.imm_tp)
+ return 1;
+
+ if (a->data.imm_tp == ia32_ImmConst
+ && a->cnst_val.tv != b->cnst_val.tv)
+ return 1;
+
+ if (a->data.imm_tp == ia32_ImmSymConst
+ && a->cnst_val.sc != b->cnst_val.sc)
+ return 1;
+
+ if (a->data.am_flavour != b->data.am_flavour
+ || a->data.am_scale != b->data.am_scale
+ || a->data.offs_sign != b->data.offs_sign
+ || a->data.am_sc_sign != b->data.am_sc_sign
+ || a->am_offs != b->am_offs
+ || a->am_sc != b->am_sc
+ || a->ls_mode != b->ls_mode)
+ return 1;
+
+ if (a->data.use_frame != b->data.use_frame
+ || a->data.use_frame != b->data.use_frame
+ || a->frame_ent != b->frame_ent)
+ return 1;
+
+ if(a->pn_code != b->pn_code)
+ return 1;
+
+ if (a->data.tp != b->data.tp
+ || a->data.op_flav != b->data.op_flav)
+ return 1;
+
+ return 0;
+}
+
+/* copies the ia32 attributes */
+static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
+ ia32_attr_t *attr_old = get_ia32_attr(old_node);
+ ia32_attr_t *attr_new = get_ia32_attr(new_node);
+
+ /* copy the attributes */
+ memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
+
+ /* copy out flags */
+ attr_new->out_flags =
+ DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags);
+}
+
+/**
+ * Registers the ia32_copy_attr function for all ia32 opcodes.
+ */
+void ia32_register_copy_attr_func(void) {
+ unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last();
+
+ for (i = f; i < l; i++) {
+ ir_op *op = get_irp_opcode(i);
+ op->ops.copy_attr = ia32_copy_attr;
+ }
+}
+
/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"
projects / libfirm / blobdiff