/**
* This file implements the creation of the achitecture specific firm opcodes
- * and the coresponding node constructors for the $arch assembler irg.
+ * and the coresponding node constructors for the ia32 assembler irg.
* @author Christian Wuerdig
* $Id$
*/
-
#ifdef HAVE_CONFIG_H
-#include "config.h"
+#include <config.h>
#endif
-#ifdef _WIN32
+#ifdef HAVE_MALLOC_H
#include <malloc.h>
-#else
+#endif
+
+#ifdef HAVE_ALLOCA_H
#include <alloca.h>
#endif
#include "firm_common_t.h"
#include "irvrfy_t.h"
#include "irprintf.h"
+#include "iredges.h"
+#include "error.h"
+#include "raw_bitset.h"
#include "../bearch.h"
#include "ia32_nodes_attr.h"
#include "ia32_new_nodes.h"
#include "gen_ia32_regalloc_if.h"
-
-#ifdef obstack_chunk_alloc
-# undef obstack_chunk_alloc
-# define obstack_chunk_alloc xmalloc
-#else
-# define obstack_chunk_alloc xmalloc
-# define obstack_chunk_free free
-#endif
-
-/***********************************************************************************
- * _ _ _ __
- * | | (_) | | / _|
- * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
- * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
- * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
- * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
- * | |
- * |_|
- ***********************************************************************************/
+#include "gen_ia32_machine.h"
/**
- * Prints a tarval to file F.
- * @param F output file
- * @param tv tarval
- * @param brackets 1 == print square brackets around tarval
+ * Returns the ident of an entity
+ * @param ent The entity
+ * @return The ident of the entity
*/
-static void fprintf_tv(FILE *F, tarval *tv, int brackets) {
- char buf[1024];
- tarval_snprintf(buf, sizeof(buf), tv);
-
- if (brackets)
- fprintf(F, "[%s]", buf);
- else
- fprintf(F, "%s", buf);
+ident *ia32_get_ent_ident(ir_entity *ent) {
+ ir_type *owner = get_entity_owner(ent);
+ ident *id = get_entity_ld_ident(ent);
+
+ if (owner == get_tls_type()) {
+ if (get_entity_visibility(ent) == visibility_external_allocated)
+ id = mangle(id, new_id_from_chars("@INDNTPOFF", 10));
+ else
+ id = mangle(id, new_id_from_chars("@NTPOFF", 7));
+ }
+ return id;
}
/**
- * Returns the name of a SymConst.
- * @param symc the SymConst
- * @return name of the SymConst
+ * Returns the ident of a SymConst.
+ * @param symc The SymConst
+ * @return The ident of the SymConst
*/
-const char *get_sc_name(ir_node *symc) {
- if (get_irn_opcode(symc) != iro_SymConst)
- return "NONE";
-
+static ident *get_sc_ident(ir_node *symc) {
switch (get_SymConst_kind(symc)) {
case symconst_addr_name:
- return get_id_str(get_SymConst_name(symc));
+ return get_SymConst_name(symc);
case symconst_addr_ent:
- return get_entity_ld_name(get_SymConst_entity(symc));
+ return ia32_get_ent_ident(get_SymConst_entity(symc));
default:
assert(0 && "Unsupported SymConst");
}
/**
- * Returns a string containing the names of all registers within the limited bitset
+ * returns true if a node has x87 registers
*/
-static char *get_limited_regs(const arch_register_req_t *req, char *buf, int max) {
- bitset_t *bs = bitset_alloca(req->cls->n_regs);
- char *p = buf;
- int size = 0;
- int i, cnt;
-
- req->limited(NULL, bs);
-
- for (i = 0; i < req->cls->n_regs; i++) {
- if (bitset_is_set(bs, i)) {
- cnt = snprintf(p, max - size, " %s", req->cls->regs[i].name);
- if (cnt < 0) {
- fprintf(stderr, "dumper problem, exiting\n");
- exit(1);
- }
-
- p += cnt;
- size += cnt;
-
- if (size >= max)
- break;
- }
- }
-
- return buf;
+int ia32_has_x87_register(const ir_node *n) {
+ assert(is_ia32_irn(n) && "Need ia32 node.");
+ return is_irn_machine_user(n, 0);
}
+/***********************************************************************************
+ * _ _ _ __
+ * | | (_) | | / _|
+ * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
+ * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
+ * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
+ * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
+ * | |
+ * |_|
+ ***********************************************************************************/
+
/**
* Dumps the register requirements for either in or out.
*/
-static void dump_reg_req(FILE *F, ir_node *n, const ia32_register_req_t **reqs, int inout) {
+static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
+ int inout) {
char *dir = inout ? "out" : "in";
int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
- char *buf = alloca(1024);
+ char buf[1024];
int i;
- memset(buf, 0, 1024);
+ memset(buf, 0, sizeof(buf));
if (reqs) {
for (i = 0; i < max; i++) {
fprintf(F, "%sreq #%d =", dir, i);
- if (reqs[i]->req.type == arch_register_req_type_none) {
+ if (reqs[i]->type == arch_register_req_type_none) {
fprintf(F, " n/a");
}
- if (reqs[i]->req.type & arch_register_req_type_normal) {
- fprintf(F, " %s", reqs[i]->req.cls->name);
+ if (reqs[i]->type & arch_register_req_type_normal) {
+ fprintf(F, " %s", reqs[i]->cls->name);
}
- if (reqs[i]->req.type & arch_register_req_type_limited) {
- fprintf(F, " %s", get_limited_regs(&reqs[i]->req, buf, 1024));
+ if (reqs[i]->type & arch_register_req_type_limited) {
+ fprintf(F, " %s",
+ arch_register_req_format(buf, sizeof(buf), reqs[i], n));
}
- if (reqs[i]->req.type & arch_register_req_type_should_be_same) {
- ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->same_pos));
+ if (reqs[i]->type & arch_register_req_type_should_be_same) {
+ ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
}
- if (reqs[i]->req.type & arch_register_req_type_should_be_different) {
- ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->different_pos));
+ if (reqs[i]->type & arch_register_req_type_should_be_different) {
+ ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
}
fprintf(F, "\n");
* @param reason indicates which kind of information should be dumped
* @return 0 on success or != 0 on failure
*/
-static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) {
+static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
ir_mode *mode = NULL;
int bad = 0;
- int i;
- ia32_attr_t *attr;
- const ia32_register_req_t **reqs;
+ int i, n_res, am_flav, flags;
+ const arch_register_req_t **reqs;
const arch_register_t **slots;
switch (reason) {
case dump_node_mode_txt:
mode = get_irn_mode(n);
- if (is_ia32_Load(n) || is_ia32_Store(n)) {
+ if (is_ia32_Ld(n) || is_ia32_St(n)) {
mode = get_ia32_ls_mode(n);
}
- if (mode) {
- fprintf(F, "[%s]", get_mode_name(mode));
- }
- else {
- fprintf(F, "[?NOMODE?]");
- }
+ fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
break;
case dump_node_nodeattr_txt:
- if (is_ia32_Call(n)) {
- fprintf(F, "&%s ", get_ia32_sc(n));
- }
- else if (get_ia32_cnst(n)) {
- char *pref = "";
-
- if (get_ia32_sc(n)) {
- pref = "SymC ";
+ if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ if(is_ia32_ImmSymConst(n)) {
+ ident *id = get_ia32_Immop_symconst(n);
+ fprintf(F, "[SymC %s]", get_id_str(id));
+ } else {
+ char buf[128];
+ tarval *tv = get_ia32_Immop_tarval(n);
+
+ tarval_snprintf(buf, sizeof(buf), tv);
+ fprintf(F, "[%s]", buf);
}
-
- fprintf(F, "[%s%s]", pref, get_ia32_cnst(n));
}
if (! is_ia32_Lea(n)) {
break;
case dump_node_info_txt:
- attr = get_ia32_attr(n);
+ n_res = get_ia32_n_res(n);
fprintf(F, "=== IA32 attr begin ===\n");
/* dump IN requirements */
}
/* dump OUT requirements */
- if (attr->n_res > 0) {
+ if (n_res > 0) {
reqs = get_ia32_out_req_all(n);
dump_reg_req(F, n, reqs, 1);
}
/* dump assigned registers */
slots = get_ia32_slots(n);
- if (slots && attr->n_res > 0) {
- for (i = 0; i < attr->n_res; i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
+ if (slots && n_res > 0) {
+ for (i = 0; i < n_res; i++) {
+ const arch_register_t *reg;
+
+ /* retrieve "real" x87 register */
+ if (ia32_has_x87_register(n))
+ reg = get_ia32_attr(n)->x87[i + 2];
+ else
+ reg = slots[i];
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
+ fprintf(F, "\n");
}
- fprintf(F, "\n");
/* dump op type */
fprintf(F, "op = ");
- switch (attr->tp) {
+ switch (get_ia32_op_type(n)) {
case ia32_Normal:
fprintf(F, "Normal");
break;
- case ia32_Const:
- fprintf(F, "Const");
- break;
- case ia32_SymConst:
- fprintf(F, "SymConst");
- break;
case ia32_AddrModeD:
fprintf(F, "AM Dest (Load+Store)");
break;
fprintf(F, "AM Source (Load)");
break;
default:
- fprintf(F, "unknown (%d)", attr->tp);
+ fprintf(F, "unknown (%d)", get_ia32_op_type(n));
break;
}
fprintf(F, "\n");
+ /* dump immop type */
+ fprintf(F, "immediate = ");
+ switch (get_ia32_immop_type(n)) {
+ case ia32_ImmNone:
+ fprintf(F, "None");
+ break;
+ case ia32_ImmConst:
+ fprintf(F, "Const");
+ break;
+ case ia32_ImmSymConst:
+ fprintf(F, "SymConst");
+ break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
+ break;
+ }
+ fprintf(F, "\n");
/* dump supported am */
fprintf(F, "AM support = ");
- switch (attr->am_support) {
+ switch (get_ia32_am_support(n)) {
case ia32_am_None:
fprintf(F, "none");
break;
fprintf(F, "full");
break;
default:
- fprintf(F, "unknown (%d)", attr->am_support);
+ fprintf(F, "unknown (%d)", get_ia32_am_support(n));
break;
}
fprintf(F, "\n");
/* dump am flavour */
fprintf(F, "AM flavour =");
- if (attr->am_flavour == ia32_am_N) {
+ am_flav = get_ia32_am_flavour(n);
+ if (am_flav == ia32_am_N) {
fprintf(F, " none");
}
else {
- if (attr->am_flavour & ia32_O) {
+ if (am_flav & ia32_O) {
fprintf(F, " O");
}
- if (attr->am_flavour & ia32_B) {
+ if (am_flav & ia32_B) {
fprintf(F, " B");
}
- if (attr->am_flavour & ia32_I) {
+ if (am_flav & ia32_I) {
fprintf(F, " I");
}
- if (attr->am_flavour & ia32_S) {
+ if (am_flav & ia32_S) {
fprintf(F, " S");
}
}
- fprintf(F, " (%d)\n", attr->am_flavour);
+ fprintf(F, " (%d)\n", am_flav);
/* dump AM offset */
- fprintf(F, "AM offset = ");
- if (attr->am_offs) {
- fprintf(F, "%s", get_ia32_am_offs(n));
+ if(get_ia32_am_offs_int(n) != 0) {
+ fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
}
- else {
- fprintf(F, "n/a");
+
+ /* dump AM symconst */
+ if(get_ia32_am_sc(n) != NULL) {
+ fprintf(F, "AM symconst = %s\n", get_id_str(get_ia32_am_sc(n)));
}
- fprintf(F, "\n");
/* dump AM scale */
fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
/* dump pn code */
- fprintf(F, "pn_code = %d\n", get_ia32_pncode(n));
+ if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
+ fprintf(F, "pn_code = %d (%s, unsigned)\n", get_ia32_pncode(n),
+ get_pnc_string(get_ia32_pncode(n) & ~ia32_pn_Cmp_Unsigned));
+ } else {
+ fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
+ get_pnc_string(get_ia32_pncode(n)));
+ }
/* dump n_res */
fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
+ /* dump use_frame */
+ fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
+
+ /* commutative */
+ fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
+
+ /* emit cl */
+ fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
+
+ /* got lea */
+ fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
+
+ /* need stackent */
+ fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
+
+ /* dump latency */
+ fprintf(F, "latency = %d\n", get_ia32_latency(n));
+
/* dump flags */
fprintf(F, "flags =");
- if (attr->flags == arch_irn_flags_none) {
+ flags = get_ia32_flags(n);
+ if (flags == arch_irn_flags_none) {
fprintf(F, " none");
}
else {
- if (attr->flags & arch_irn_flags_dont_spill) {
+ if (flags & arch_irn_flags_dont_spill) {
fprintf(F, " unspillable");
}
- if (attr->flags & arch_irn_flags_rematerializable) {
+ if (flags & arch_irn_flags_rematerializable) {
fprintf(F, " remat");
}
- if (attr->flags & arch_irn_flags_ignore) {
+ if (flags & arch_irn_flags_ignore) {
fprintf(F, " ignore");
}
+ if (flags & arch_irn_flags_modify_sp) {
+ fprintf(F, " modify_sp");
+ }
+ }
+ fprintf(F, " (%d)\n", flags);
+
+ /* dump frame entity */
+ fprintf(F, "frame entity = ");
+ if (get_ia32_frame_ent(n)) {
+ ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
}
- fprintf(F, " (%d)\n", attr->flags);
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ /* dump modes */
+ fprintf(F, "ls_mode = ");
+ if (get_ia32_ls_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+#ifndef NDEBUG
+ /* dump original ir node name */
+ fprintf(F, "orig node = ");
+ if (get_ia32_orig_node(n)) {
+ fprintf(F, "%s", get_ia32_orig_node(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+#endif /* NDEBUG */
fprintf(F, "=== IA32 attr end ===\n");
/* end of: case dump_node_info_txt */
* |___/
***************************************************************************************************/
- static char *copy_str(char *dst, const char *src) {
- dst = xcalloc(1, strlen(src) + 1);
- strncpy(dst, src, strlen(src) + 1);
- return dst;
- }
-
- static char *set_cnst_from_tv(char *cnst, tarval *tv) {
- if (cnst) {
- free(cnst);
- }
-
- cnst = xcalloc(1, 64);
- assert(tarval_snprintf(cnst, 63, tv));
- return cnst;
- }
-
/**
* Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
* Firm was made by people hating const :-(
*/
ia32_op_type_t get_ia32_op_type(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->tp;
+ return attr->data.tp;
}
/**
*/
void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->tp = tp;
+ attr->data.tp = tp;
+}
+
+/**
+ * Gets the immediate op type of an ia32 node.
+ */
+ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.imm_tp;
}
/**
*/
ia32_am_type_t get_ia32_am_support(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->am_support;
+ return attr->data.am_support;
}
/**
* Sets the supported addrmode of an ia32 node
*/
void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->am_support = am_tp;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_support = am_tp;
}
/**
*/
ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->am_flavour;
+ return attr->data.am_flavour;
}
/**
* Sets the addrmode flavour of an ia32 node
*/
void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->am_flavour = am_flavour;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_flavour = am_flavour;
}
/**
- * Joins all offsets to one string with adds.
+ * Gets the addressmode offset as int.
*/
-char *get_ia32_am_offs(const ir_node *node) {
+int get_ia32_am_offs_int(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- char *res = NULL;
- int size;
-
- if (! attr->am_offs) {
- return NULL;
- }
+ return attr->am_offs;
+}
- size = obstack_object_size(attr->am_offs);
- if (size > 0) {
- res = xcalloc(1, size + 1);
- memcpy(res, obstack_base(attr->am_offs), size);
- }
+/**
+ * Sets the addressmode offset from an int.
+ */
+void set_ia32_am_offs_int(ir_node *node, int offset) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_offs = offset;
+}
- res[size] = '\0';
- return res;
+void add_ia32_am_offs_int(ir_node *node, int offset) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_offs += offset;
}
/**
- * Add an offset for addrmode.
+ * Returns the symconst ident associated to addrmode.
*/
-static void extend_ia32_am_offs(ir_node *node, char *offset, char op) {
+ident *get_ia32_am_sc(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->am_sc;
+}
- if (!attr->am_offs) {
- /* obstack is not initialized */
- attr->am_offs = xcalloc(1, sizeof(*(attr->am_offs)));
- obstack_init(attr->am_offs);
- }
+/**
+ * Sets the symconst ident associated to addrmode.
+ */
+void set_ia32_am_sc(ir_node *node, ident *sc) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_sc = sc;
+}
- obstack_printf(attr->am_offs, "%c%s", op, offset);
+/**
+ * Sets the sign bit for address mode symconst.
+ */
+void set_ia32_am_sc_sign(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_sc_sign = 1;
}
/**
- * Add an offset for addrmode.
+ * Clears the sign bit for address mode symconst.
*/
-void add_ia32_am_offs(ir_node *node, char *offset) {
- extend_ia32_am_offs(node, offset, '+');
+void clear_ia32_am_sc_sign(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_sc_sign = 0;
}
/**
- * Sub an offset for addrmode.
+ * Returns the sign bit for address mode symconst.
*/
-void sub_ia32_am_offs(ir_node *node, char *offset) {
- extend_ia32_am_offs(node, offset, '-');
+int is_ia32_am_sc_sign(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.am_sc_sign;
}
/**
*/
int get_ia32_am_scale(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->am_scale;
+ return attr->data.am_scale;
}
/**
* Sets the index register scale for addrmode.
*/
void set_ia32_am_scale(ir_node *node, int scale) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->am_scale = scale;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_scale = scale;
}
/**
*/
tarval *get_ia32_Immop_tarval(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->tv;
+ assert(attr->data.imm_tp == ia32_ImmConst);
+ return attr->cnst_val.tv;
}
/**
*/
void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->tv = tv;
- attr->cnst = set_cnst_from_tv(attr->cnst, attr->tv);
+ attr->data.imm_tp = ia32_ImmConst;
+ attr->cnst_val.tv = tv;
+}
+
+void set_ia32_Immop_symconst(ir_node *node, ident *ident) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.imm_tp = ia32_ImmSymConst;
+ attr->cnst_val.sc = ident;
+}
+
+ident *get_ia32_Immop_symconst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ assert(attr->data.imm_tp == ia32_ImmSymConst);
+ return attr->cnst_val.sc;
}
/**
- * Return the sc attribute.
+ * Sets the uses_frame flag.
*/
-char *get_ia32_sc(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->sc;
+void set_ia32_use_frame(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.use_frame = 1;
}
/**
- * Sets the sc attribute.
+ * Clears the uses_frame flag.
*/
-void set_ia32_sc(ir_node *node, char *sc) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->sc = copy_str(attr->sc, sc);
+void clear_ia32_use_frame(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.use_frame = 0;
+}
- if (attr->cnst) {
- free(attr->cnst);
- }
- attr->cnst = attr->sc;
+/**
+ * Gets the uses_frame flag.
+ */
+int is_ia32_use_frame(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.use_frame;
+}
+
+/**
+ * Sets node to commutative.
+ */
+void set_ia32_commutative(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.is_commutative = 1;
}
/**
- * Gets the string representation of the internal const (tv or symconst)
+ * Sets node to non-commutative.
*/
-char *get_ia32_cnst(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->cnst;
+void clear_ia32_commutative(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.is_commutative = 0;
+}
+
+/**
+ * Checks if node is commutative.
+ */
+int is_ia32_commutative(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.is_commutative;
+}
+
+/**
+ * Sets node emit_cl.
+ */
+void set_ia32_emit_cl(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.emit_cl = 1;
+}
+
+/**
+ * Clears node emit_cl.
+ */
+void clear_ia32_emit_cl(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.emit_cl = 0;
+}
+
+/**
+ * Checks if node needs %cl.
+ */
+int is_ia32_emit_cl(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.emit_cl;
+}
+
+/**
+ * Sets node got_lea.
+ */
+void set_ia32_got_lea(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_lea = 1;
+}
+
+/**
+ * Clears node got_lea.
+ */
+void clear_ia32_got_lea(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_lea = 0;
+}
+
+/**
+ * Checks if node got lea.
+ */
+int is_ia32_got_lea(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.got_lea;
+}
+
+void set_ia32_need_stackent(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.need_stackent = 1;
+}
+
+void clear_ia32_need_stackent(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.need_stackent = 0;
+}
+
+int is_ia32_need_stackent(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.need_stackent;
}
/**
* Gets the mode of the stored/loaded value (only set for Store/Load)
*/
ir_mode *get_ia32_ls_mode(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->ls_mode;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->ls_mode;
}
/**
* Sets the mode of the stored/loaded value (only set for Store/Load)
*/
void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->ls_mode = mode;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->ls_mode = mode;
+}
+
+/**
+ * Gets the frame entity assigned to this node.
+ */
+ir_entity *get_ia32_frame_ent(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->frame_ent;
+}
+
+/**
+ * Sets the frame entity for this node.
+ */
+void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->frame_ent = ent;
+ if(ent != NULL)
+ set_ia32_use_frame(node);
+ else
+ clear_ia32_use_frame(node);
+}
+
+
+/**
+ * Gets the instruction latency.
+ */
+unsigned get_ia32_latency(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->latency;
+}
+
+/**
+* Sets the instruction latency.
+*/
+void set_ia32_latency(ir_node *node, unsigned latency) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->latency = latency;
}
/**
* Returns the argument register requirements of an ia32 node.
*/
-const ia32_register_req_t **get_ia32_in_req_all(const ir_node *node) {
+const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
return attr->in_req;
}
+/**
+ * Sets the argument register requirements of an ia32 node.
+ */
+void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->in_req = reqs;
+}
+
/**
* Returns the result register requirements of an ia32 node.
*/
-const ia32_register_req_t **get_ia32_out_req_all(const ir_node *node) {
+const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
return attr->out_req;
}
+/**
+ * Sets the result register requirements of an ia32 node.
+ */
+void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->out_req = reqs;
+}
+
/**
* Returns the argument register requirement at position pos of an ia32 node.
*/
-const ia32_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
+const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
+ if(attr->in_req == NULL)
+ return arch_no_register_req;
+
return attr->in_req[pos];
}
/**
* Returns the result register requirement at position pos of an ia32 node.
*/
-const ia32_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
+const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
+ if(attr->out_req == NULL)
+ return arch_no_register_req;
+
return attr->out_req[pos];
}
/**
* Sets the OUT register requirements at position pos.
*/
-void set_ia32_req_out(ir_node *node, const ia32_register_req_t *req, int pos) {
+void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->out_req[pos] = req;
}
/**
* Sets the IN register requirements at position pos.
*/
-void set_ia32_req_in(ir_node *node, const ia32_register_req_t *req, int pos) {
+void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->in_req[pos] = req;
}
*/
arch_irn_flags_t get_ia32_flags(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->flags;
+ return attr->data.flags;
}
/**
* Sets the register flag of an ia32 node.
*/
-void set_ia32_flags(const ir_node *node, arch_irn_flags_t flags) {
+void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->flags = flags;
+ attr->data.flags = flags;
}
/**
}
/**
- * Returns the name of the OUT register at position pos.
+ * Sets the number of results.
*/
-const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
+void set_ia32_n_res(ir_node *node, int n_res) {
ia32_attr_t *attr = get_ia32_attr(node);
-
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
+ attr->data.n_res = n_res;
}
/**
- * Returns the index of the OUT register at position pos within its register class.
+ * Returns the number of results.
*/
-int get_ia32_out_regnr(const ir_node *node, int pos) {
+int get_ia32_n_res(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
-
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
+ return attr->data.n_res;
}
/**
- * Returns the OUT register at position pos.
+ * Returns the flavour of an ia32 node,
*/
-const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
+ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.op_flav;
+}
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
+/**
+ * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
+ */
+void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.op_flav = op_flav;
+}
- return attr->slots[pos];
+/**
+ * Returns the projnum code.
+ */
+pn_Cmp get_ia32_pncode(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->pn_code;
}
/**
- * Sets the number of results.
+ * Sets the projnum code
*/
-void set_ia32_n_res(ir_node *node, int n_res) {
+void set_ia32_pncode(ir_node *node, pn_Cmp code) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->n_res = n_res;
+ attr->pn_code = code;
}
/**
- * Returns the number of results.
+ * Sets the flags for the n'th out.
*/
-int get_ia32_n_res(const ir_node *node) {
+void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->n_res;
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ attr->out_flags[pos] = flags;
}
/**
- * Returns the flavour of an ia32 node,
+ * Gets the flags for the n'th out.
*/
-ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
+arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->op_flav;
+ return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none;
}
/**
- * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
+ * Get the list of available execution units.
*/
-void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
+const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->op_flav = op_flav;
+ return attr->exec_units;
}
+#ifndef NDEBUG
+
/**
- * Returns the projnum code.
+ * Returns the name of the original ir node.
*/
-long get_ia32_pncode(const ir_node *node) {
+const char *get_ia32_orig_node(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->pn_code;
+ return attr->orig_node;
}
/**
- * Sets the projnum code
+ * Sets the name of the original ir node.
*/
-void set_ia32_pncode(ir_node *node, long code) {
+void set_ia32_orig_node(ir_node *node, const char *name) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->pn_code = code;
+ attr->orig_node = name;
}
+#endif /* NDEBUG */
/******************************************************************************************************
* _ _ _ _ __ _ _
* |_|
******************************************************************************************************/
-/**
- * Gets the type of an ia32_Const.
- */
-unsigned get_ia32_Const_type(ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
-
- assert((is_ia32_Const(node) || is_ia32_fConst(node)) && "Need ia32_Const to get type");
-
- return attr->tp;
-}
-
-/**
- * Sets the type of an ia32_Const.
- */
-void set_ia32_Const_type(ir_node *node, int type) {
- ia32_attr_t *attr = get_ia32_attr(node);
-
- assert((is_ia32_Const(node) || is_ia32_fConst(node)) && "Need ia32_Const to set type");
- assert((type == ia32_Const || type == ia32_SymConst) && "Unsupported ia32_Const type");
-
- attr->tp = type;
-}
-
/**
* Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
*/
-void set_ia32_Immop_attr(ir_node *node, ir_node *cnst) {
- ia32_attr_t *na = get_ia32_attr(node);
- ia32_attr_t *ca = get_ia32_attr(cnst);
-
- assert((is_ia32_Const(cnst) || is_ia32_fConst(cnst)) && "Need ia32_Const to set Immop attr");
-
- na->tv = ca->tv;
-
- if (ca->sc) {
- na->sc = copy_str(na->sc, ca->sc);
- }
- else {
- na->cnst = set_cnst_from_tv(na->cnst, na->tv);
- na->sc = NULL;
+void copy_ia32_Immop_attr(ir_node *node, ir_node *from) {
+ ia32_immop_type_t immop_type = get_ia32_immop_type(from);
+
+ if(immop_type == ia32_ImmConst) {
+ set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from));
+ } else if(immop_type == ia32_ImmSymConst) {
+ set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from));
+ } else {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ assert(immop_type == ia32_ImmNone);
+ attr->data.imm_tp = ia32_ImmNone;
}
}
/**
- * Copy the attributes from a Const to an ia32_Const
+ * Copy the attributes from a Firm Const/SymConst to an ia32_Const
*/
void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
- ia32_attr_t *attr = get_ia32_attr(ia32_cnst);
-
- assert((is_ia32_Const(ia32_cnst) || is_ia32_fConst(ia32_cnst)) && "Need ia32_Const to set Const attr");
+ assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
switch (get_irn_opcode(cnst)) {
case iro_Const:
- attr->tp = ia32_Const;
- attr->tv = get_Const_tarval(cnst);
- attr->cnst = set_cnst_from_tv(attr->cnst, attr->tv);
+ set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst));
break;
case iro_SymConst:
- attr->tp = ia32_SymConst;
- attr->tv = NULL;
- attr->sc = copy_str(attr->sc, get_sc_name(cnst));
- attr->cnst = attr->sc;
+ set_ia32_Immop_symconst(ia32_cnst, get_sc_ident(cnst));
break;
case iro_Unknown:
assert(0 && "Unknown Const NYI");
}
}
+void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
+ if(mode_is_reference(get_tarval_mode(tv))) {
+ if(tarval_is_null(tv)) {
+ tv = get_tarval_null(mode_Iu);
+ } else {
+ panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
+ }
+ } else {
+ tv = tarval_convert_to(tv, mode_Iu);
+ }
+
+ assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
+ && tv != NULL);
+ set_ia32_Immop_tarval(ia32_cnst, tv);
+}
+
+
/**
* Sets the AddrMode(S|D) attribute
*/
switch (direction) {
case 'D':
- attr->tp = ia32_AddrModeD;
+ attr->data.tp = ia32_AddrModeD;
break;
case 'S':
- attr->tp = ia32_AddrModeS;
+ attr->data.tp = ia32_AddrModeS;
break;
default:
assert(0 && "wrong AM type");
}
}
+/**
+ * Returns whether or not the node is an immediate operation with Const.
+ */
+int is_ia32_ImmConst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.imm_tp == ia32_ImmConst);
+}
+
+/**
+ * Returns whether or not the node is an immediate operation with SymConst.
+ */
+int is_ia32_ImmSymConst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.imm_tp == ia32_ImmSymConst);
+}
+
/**
* Returns whether or not the node is an AddrModeS node.
*/
-int is_ia32_AddrModeS(ir_node *node) {
+int is_ia32_AddrModeS(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return (attr->tp == ia32_AddrModeS);
+ return (attr->data.tp == ia32_AddrModeS);
}
/**
* Returns whether or not the node is an AddrModeD node.
*/
-int is_ia32_AddrModeD(ir_node *node) {
+int is_ia32_AddrModeD(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return (attr->tp == ia32_AddrModeD);
+ return (attr->data.tp == ia32_AddrModeD);
+}
+
+/**
+ * Checks if node is a Load or xLoad/vfLoad.
+ */
+int is_ia32_Ld(const ir_node *node) {
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Load || op == iro_ia32_xLoad || op == iro_ia32_vfld || op == iro_ia32_fld;
}
+/**
+ * Checks if node is a Store or xStore/vfStore.
+ */
+int is_ia32_St(const ir_node *node) {
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Store || op == iro_ia32_xStore || op == iro_ia32_vfst || op == iro_ia32_fst || op == iro_ia32_fstp;
+}
+/**
+ * Checks if node is a Const or xConst/vfConst.
+ */
+int is_ia32_Cnst(const ir_node *node) {
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
+}
+
+/**
+ * Returns the name of the OUT register at position pos.
+ */
+const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return arch_register_get_name(attr->slots[pos]);
+}
+
+/**
+ * Returns the index of the OUT register at position pos within its register class.
+ */
+int get_ia32_out_regnr(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return arch_register_get_index(attr->slots[pos]);
+}
+
+/**
+ * Returns the OUT register at position pos.
+ */
+const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return attr->slots[pos];
+}
+
+/**
+ * Initializes the nodes attributes.
+ */
+void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
+ const arch_register_req_t **in_reqs,
+ const arch_register_req_t **out_reqs,
+ const be_execution_unit_t ***execution_units,
+ int n_res, unsigned latency)
+{
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ set_ia32_flags(node, flags);
+ set_ia32_in_req_all(node, in_reqs);
+ set_ia32_out_req_all(node, out_reqs);
+ set_ia32_latency(node, latency);
+ set_ia32_n_res(node, n_res);
+
+ attr->exec_units = execution_units;
+
+ attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res);
+ memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
+
+ memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
+}
+
+ir_node *get_ia32_result_proj(const ir_node *node)
+{
+ const ir_edge_t *edge;
+
+ foreach_out_edge(node, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ if(get_Proj_proj(proj) == 0) {
+ return proj;
+ }
+ }
+ return NULL;
+}
/***************************************************************************************
* _ _ _
*
***************************************************************************************/
+/* default compare operation to compare attributes */
+int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) {
+ if (a->data.tp != b->data.tp
+ || a->data.imm_tp != b->data.imm_tp)
+ return 1;
+
+ if (a->data.imm_tp == ia32_ImmConst
+ && a->cnst_val.tv != b->cnst_val.tv)
+ return 1;
+
+ if (a->data.imm_tp == ia32_ImmSymConst
+ && a->cnst_val.sc != b->cnst_val.sc)
+ return 1;
+
+ if (a->data.am_flavour != b->data.am_flavour
+ || a->data.am_scale != b->data.am_scale
+ || a->data.offs_sign != b->data.offs_sign
+ || a->data.am_sc_sign != b->data.am_sc_sign
+ || a->am_offs != b->am_offs
+ || a->am_sc != b->am_sc
+ || a->ls_mode != b->ls_mode)
+ return 1;
+
+ if (a->data.use_frame != b->data.use_frame
+ || a->data.use_frame != b->data.use_frame
+ || a->frame_ent != b->frame_ent)
+ return 1;
+
+ if(a->pn_code != b->pn_code)
+ return 1;
+
+ if (a->data.tp != b->data.tp
+ || a->data.op_flav != b->data.op_flav)
+ return 1;
+
+ return 0;
+}
+
+/* copies the ia32 attributes */
+static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
+ ia32_attr_t *attr_old = get_ia32_attr(old_node);
+ ia32_attr_t *attr_new = get_ia32_attr(new_node);
+
+ /* copy the attributes */
+ memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
+
+ /* copy out flags */
+ attr_new->out_flags =
+ DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags);
+}
+
+/**
+ * Registers the ia32_copy_attr function for all ia32 opcodes.
+ */
+void ia32_register_copy_attr_func(void) {
+ unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last();
+
+ for (i = f; i < l; i++) {
+ ir_op *op = get_irp_opcode(i);
+ op->ops.copy_attr = ia32_copy_attr;
+ }
+}
+
/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"
projects / libfirm / blobdiff