/**
* This file implements the creation of the achitecture specific firm opcodes
- * and the coresponding node constructors for the $arch assembler irg.
+ * and the coresponding node constructors for the ia32 assembler irg.
* @author Christian Wuerdig
* $Id$
*/
* @return The ident of the SymConst
*/
static ident *get_sc_ident(ir_node *symc) {
- assert(get_irn_opcode(symc) == iro_SymConst && "need symconst to get ident");
+ entity *ent;
+ ir_type *owner;
+ ident *id;
switch (get_SymConst_kind(symc)) {
case symconst_addr_name:
return get_SymConst_name(symc);
case symconst_addr_ent:
- return get_entity_ld_ident(get_SymConst_entity(symc));
+ ent = get_SymConst_entity(symc);
+ owner = get_entity_owner(ent);
+ id = get_entity_ld_ident(ent);
+ if (owner == get_tls_type()) {
+ if (get_entity_visibility(ent) == visibility_external_allocated)
+ id = mangle(id, new_id_from_chars("@INDNTPOFF", 10));
+ else
+ id = mangle(id, new_id_from_chars("@NTPOFF", 7));
+ }
+ return id;
default:
assert(0 && "Unsupported SymConst");
}
fprintf(F, "\n");
+ /* dump immop type */
+ fprintf(F, "immediate = ");
+ switch (get_ia32_immop_type(n)) {
+ case ia32_ImmNone:
+ fprintf(F, "None");
+ break;
+ case ia32_ImmConst:
+ fprintf(F, "Const");
+ break;
+ case ia32_ImmSymConst:
+ fprintf(F, "SymConst");
+ break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
+ break;
+ }
+ fprintf(F, "\n");
/* dump supported am */
fprintf(F, "AM support = ");
/* commutative */
fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
+ /* emit cl */
+ fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
+
+ /* got lea */
+ fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
+
+ /* got reload */
+ fprintf(F, "got reload = %d\n", is_ia32_got_reload(n));
+
+ /* dump latency */
+ fprintf(F, "latency = %d\n", get_ia32_latency(n));
+
/* dump flags */
fprintf(F, "flags =");
flags = get_ia32_flags(n);
if (flags & arch_irn_flags_ignore) {
fprintf(F, " ignore");
}
+ if (flags & arch_irn_flags_modify_sp) {
+ fprintf(F, " modify_sp");
+ }
}
fprintf(F, " (%d)\n", flags);
}
fprintf(F, "\n");
+ /* dump modes */
+ fprintf(F, "ls_mode = ");
+ if (get_ia32_ls_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ fprintf(F, "res_mode = ");
+ if (get_ia32_res_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_res_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ fprintf(F, "src_mode = ");
+ if (get_ia32_src_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_src_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
+ fprintf(F, "tgt_mode = ");
+ if (get_ia32_tgt_mode(n)) {
+ ir_fprintf(F, "%+F", get_ia32_tgt_mode(n));
+ }
+ else {
+ fprintf(F, "n/a");
+ }
+ fprintf(F, "\n");
+
#ifndef NDEBUG
/* dump original ir node name */
fprintf(F, "orig node = ");
*/
static ident *get_ident_for_tv(tarval *tv) {
char buf[1024];
-
- assert(tarval_snprintf(buf, sizeof(buf), tv));
+ int len = tarval_snprintf(buf, sizeof(buf), tv);
+ assert(len);
return new_id_from_str(buf);
}
*/
char *get_ia32_am_offs(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- char *res = NULL;
- int size;
+ static char res[64];
if (! attr->am_offs) {
return NULL;
}
- size = obstack_object_size(attr->am_offs);
- if (size > 0) {
- res = xmalloc(size + 2);
- res[0] = attr->data.offs_sign ? '-' : '+';
- memcpy(&res[1], obstack_base(attr->am_offs), size);
- res[size + 1] = '\0';
- }
+ snprintf(res, sizeof(res), "%+ld", attr->am_offs);
return res;
}
+/**
+ * Gets the addressmode offset as long.
+ */
+long get_ia32_am_offs_long(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->am_offs;
+}
+
/**
* Add an offset for addrmode.
*/
static void extend_ia32_am_offs(ir_node *node, char *offset, char op) {
ia32_attr_t *attr = get_ia32_attr(node);
+ int res, o;
if (! offset || strlen(offset) < 1)
return;
- /* offset could already have an explicit sign */
- /* -> supersede op if necessary */
- if (offset[0] == '-' || offset[0] == '+') {
- if (offset[0] == '-') {
- op = (op == '-') ? '+' : '-';
- }
-
- /* skip explicit sign */
- offset++;
- }
-
- if (! attr->am_offs) {
- /* obstack is not initialized */
- attr->am_offs = xcalloc(1, sizeof(*(attr->am_offs)));
- obstack_init(attr->am_offs);
-
- attr->data.offs_sign = (op == '-') ? 1 : 0;
- }
- else {
- /* If obstack is initialized, connect the new offset with op */
- obstack_printf(attr->am_offs, "%c", op);
- }
+ res = sscanf(offset, "%d", &o);
+ assert(res == 1);
- obstack_printf(attr->am_offs, "%s", offset);
+ if (op == '-')
+ attr->am_offs -= o;
+ else if (op == '+')
+ attr->am_offs += o;
+ else
+ assert(0);
}
/**
attr->cnst = get_ident_for_tv(tv);
}
-/**
- * Return the sc attribute.
- */
-ident *get_ia32_sc(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->cnst_val.sc;
-}
-
-/**
- * Sets the sc attribute.
- */
-void set_ia32_sc(ir_node *node, ident *sc) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->cnst_val.sc = sc;
- attr->cnst = attr->cnst_val.sc;
-}
-
/**
* Gets the string representation of the internal const (tv or symconst)
*/
}
/**
- * Checks if node is commutative.
+ * Checks if node needs %cl.
*/
int is_ia32_emit_cl(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
return attr->data.emit_cl;
}
+/**
+ * Sets node got_lea.
+ */
+void set_ia32_got_lea(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_lea = 1;
+}
+
+/**
+ * Clears node got_lea.
+ */
+void clear_ia32_got_lea(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_lea = 0;
+}
+
+/**
+ * Checks if node got lea.
+ */
+int is_ia32_got_lea(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.got_lea;
+}
+
+/**
+ * Sets node got_reload.
+ */
+void set_ia32_got_reload(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_reload = 1;
+}
+
+/**
+ * Clears node got_reload.
+ */
+void clear_ia32_got_reload(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.got_reload = 0;
+}
+
+/**
+ * Checks if node got reload.
+ */
+int is_ia32_got_reload(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.got_reload;
+}
+
/**
* Gets the mode of the stored/loaded value (only set for Store/Load)
*/
}
/**
- * Gets the frame entity assigned to this node;
+ * Gets the frame entity assigned to this node.
*/
entity *get_ia32_frame_ent(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
}
/**
- * Sets the frame entity for this node;
+ * Sets the frame entity for this node.
*/
void set_ia32_frame_ent(ir_node *node, entity *ent) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->frame_ent = ent;
+ set_ia32_use_frame(node);
+}
+
+
+/**
+ * Gets the instruction latency.
+ */
+unsigned get_ia32_latency(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->latency;
+}
+
+/**
+* Sets the instruction latency.
+*/
+void set_ia32_latency(ir_node *node, unsigned latency) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->latency = latency;
}
/**
}
/**
- * Copy the attributes from a Firm Const to an ia32_Const
+ * Copy the attributes from a Firm Const/SymConst to an ia32_Const
*/
void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
ia32_attr_t *attr = get_ia32_attr(ia32_cnst);
+ ir_mode *mode;
assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
case iro_Const:
attr->data.tp = ia32_Const;
attr->cnst_val.tv = get_Const_tarval(cnst);
+ mode = get_tarval_mode(attr->cnst_val.tv);
+ if (mode_is_reference(mode) &&
+ get_mode_null(mode) == attr->cnst_val.tv) {
+ attr->cnst_val.tv = get_mode_null(mode_Iu);
+ }
attr->cnst = get_ident_for_tv(attr->cnst_val.tv);
break;
case iro_SymConst:
ia32_attr_t *attr = get_ia32_attr(node);
assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return arch_register_get_name(attr->slots[pos]);
ia32_attr_t *attr = get_ia32_attr(node);
assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return arch_register_get_index(attr->slots[pos]);
ia32_attr_t *attr = get_ia32_attr(node);
assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return attr->slots[pos];
* Initializes the nodes attributes.
*/
void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const ia32_register_req_t **in_reqs,
- const ia32_register_req_t **out_reqs, int n_res)
+ const ia32_register_req_t **out_reqs, int n_res, unsigned latency)
{
ia32_attr_t *attr = get_ia32_attr(node);
set_ia32_flags(node, flags);
set_ia32_in_req_all(node, in_reqs);
set_ia32_out_req_all(node, out_reqs);
+ set_ia32_latency(node, latency);
attr->data.n_res = n_res;
- memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
+ memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
}
/***************************************************************************************
return !equ;
}
+/* Copy attribute function not needed any more, but might be of use later. */
+#if 0
+/* copies the ia32 attributes */
+static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
+ ia32_attr_t *attr_old = get_ia32_attr(old_node);
+ ia32_attr_t *attr_new = get_ia32_attr(new_node);
+ int n_res = get_ia32_n_res(old_node);
+
+ /* copy the attributes */
+ memcpy(attr_new, attr_old, sizeof(*attr_new));
+}
+
+/**
+ * Registers the ia32_copy_attr function for all ia32 opcodes.
+ */
+void ia32_register_copy_attr_func(void) {
+ unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last();
+
+ for (i = f; i < l; i++) {
+ ir_op *op = get_irp_opcode(i);
+ op->ops.copy_attr = ia32_copy_attr;
+ }
+}
+#endif
+
/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"