int bad = 0;
asmop_attr *attr;
int i;
- const arch_register_req_t **reqs;
+ const ia32_register_req_t **reqs;
const arch_register_t **slots;
switch (reason) {
if (reqs) {
for (i = 0; i < get_irn_arity(n); i++) {
- if (reqs[i]->type != arch_register_req_type_none) {
- fprintf(F, "inreq[%d]=[%s]\n", i, reqs[i]->cls->name);
+ if (reqs[i]->req.type != arch_register_req_type_none) {
+ fprintf(F, "inreq[%d]=[%s]\n", i, reqs[i]->req.cls->name);
}
else {
fprintf(F, "inreq[%d]=[none]\n", i);
if (reqs) {
for (i = 0; i < attr->n_res; i++) {
- if (reqs[i]->type != arch_register_req_type_none) {
- fprintf(F, "outreq[%d]=[%s]\n", i, reqs[i]->cls->name);
+ if (reqs[i]->req.type != arch_register_req_type_none) {
+ fprintf(F, "outreq[%d]=[%s]\n", i, reqs[i]->req.cls->name);
}
else {
fprintf(F, "outreq[%d]=[none]\n", i);
/**
* Returns the argument register requirements of an ia32 node.
*/
-const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
+const ia32_register_req_t **get_ia32_in_req_all(const ir_node *node) {
asmop_attr *attr = get_ia32_attr(node);
return attr->in_req;
}
/**
* Returns the result register requirements of an ia32 node.
*/
-const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
+const ia32_register_req_t **get_ia32_out_req_all(const ir_node *node) {
asmop_attr *attr = get_ia32_attr(node);
return attr->out_req;
}
/**
* Returns the argument register requirement at position pos of an ia32 node.
*/
-const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
+const ia32_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
asmop_attr *attr = get_ia32_attr(node);
return attr->in_req[pos];
}
/**
* Returns the result register requirement at position pos of an ia32 node.
*/
-const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
+const ia32_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
asmop_attr *attr = get_ia32_attr(node);
return attr->out_req[pos];
}
/**
* Sets the OUT register requirements at position pos.
*/
-void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
+void set_ia32_req_out(ir_node *node, const ia32_register_req_t *req, int pos) {
asmop_attr *attr = get_ia32_attr(node);
attr->out_req[pos] = req;
}
/**
* Sets the IN register requirements at position pos.
*/
-void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
+void set_ia32_req_in(ir_node *node, const ia32_register_req_t *req, int pos) {
asmop_attr *attr = get_ia32_attr(node);
attr->in_req[pos] = req;
}
}
/**
- * Returns the flavour of an ia32 DivMod,
+ * Returns the flavour of an ia32 node,
*/
-divmod_flavour_t get_ia32_DivMod_flavour(const ir_node *node) {
+op_flavour_t get_ia32_flavour(const ir_node *node) {
asmop_attr *attr = get_ia32_attr(node);
- return attr->dm_flav;
+ return attr->op_flav;
}
/**
- * Sets the flavour of an ia32 DivMod node to flavour_Div/Mod/DivMod.
+ * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
*/
-void set_ia32_DivMod_flavour(ir_node *node, divmod_flavour_t dm_flav) {
+void set_ia32_flavour(ir_node *node, op_flavour_t op_flav) {
asmop_attr *attr = get_ia32_attr(node);
- attr->dm_flav = dm_flav;
+ attr->op_flav = op_flav;
}
/**
return (attr->tp == asmop_AddrMode);
}
-/* Include the generated functions */
+
+
+/***************************************************************************************
+ * _ _ _
+ * | | | | | |
+ * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
+ * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
+ * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
+ * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
+ *
+ ***************************************************************************************/
+
+/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"