* Checks if node is a Load or fLoad/vfLoad.
*/
int is_ia32_Ld(const ir_node *node) {
- return is_ia32_Load(node) || is_ia32_fLoad(node) || is_ia32_vfld(node);
+ return is_ia32_Load(node) || is_ia32_fLoad(node) || is_ia32_vfld(node) || is_ia32_fld(node);
}
/**
* Checks if node is a Store or fStore/vfStore.
*/
int is_ia32_St(const ir_node *node) {
- return is_ia32_Store(node) || is_ia32_fStore(node) || is_ia32_vfst(node);
+ return is_ia32_Store(node) || is_ia32_fStore(node) || is_ia32_vfst(node) || is_ia32_fst(node) || is_ia32_fstp(node);
}
/**
ia32_attr_t *attr = get_ia32_attr(node);
if (num) {
- attr->slots = NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(node)), num);
+ attr->slots = (const arch_register_t **)NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(node)), num);
memset(attr->slots, 0, sizeof(attr->slots[0]) * num);
}
else {
memcpy(attr_new, attr_old, sizeof(*attr_new));
/* copy the register slots */
- attr_new->slots = NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(new_node)), n_res);
+ attr_new->slots = (const arch_register_t **)NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(new_node)), n_res);
memcpy((void *)attr_new->slots, (void *)attr_old->slots, sizeof(attr_new->slots[0]) * n_res);
}