* This file implements the creation of the achitecture specific firm opcodes
* and the corresponding node constructors for the ia32 assembler irg.
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include <stdlib.h>
+#include "irargs_t.h"
#include "irprog_t.h"
#include "irgraph_t.h"
#include "irnode_t.h"
#include "ircons_t.h"
#include "iropt_t.h"
#include "irop.h"
-#include "firm_common_t.h"
#include "irvrfy_t.h"
#include "irprintf.h"
#include "iredges.h"
#include "raw_bitset.h"
#include "xmalloc.h"
-#include "../bearch_t.h"
+#include "../bearch.h"
+#include "../beinfo.h"
#include "bearch_ia32_t.h"
+#include "ia32_common_transform.h"
#include "ia32_nodes_attr.h"
#include "ia32_new_nodes.h"
#include "gen_ia32_regalloc_if.h"
static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
int inout) {
char *dir = inout ? "out" : "in";
- int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
+ int max = inout ? (int) arch_irn_get_n_outs(n) : get_irn_arity(n);
char buf[1024];
int i;
int bad = 0;
int i, n_res, flags;
const arch_register_req_t **reqs;
- const arch_register_t **slots;
switch (reason) {
case dump_node_opcode_txt:
fputc('+', F);
}
fprintf(F, "%ld", attr->offset);
+ if (attr->no_pic_adjust) {
+ fputs("(no_pic_adjust)", F);
+ }
}
}
else {
fputc('-', F);
}
fputs(get_entity_name(attr->am_sc), F);
+ if(attr->data.am_sc_no_pic_adjust) {
+ fputs("(no_pic_adjust)", F);
+ }
}
if(attr->am_offs != 0) {
if(attr->am_offs > 0 && attr->am_sc != NULL) {
break;
case dump_node_mode_txt:
- if (is_ia32_Ld(n) || is_ia32_St(n)) {
- mode = get_ia32_ls_mode(n);
- fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
- }
+ mode = get_ia32_ls_mode(n);
+ if (mode != NULL)
+ fprintf(F, "[%s]", get_mode_name(mode));
break;
case dump_node_nodeattr_txt:
break;
case dump_node_info_txt:
- n_res = get_ia32_n_res(n);
fprintf(F, "=== IA32 attr begin ===\n");
/* dump IN requirements */
dump_reg_req(F, n, reqs, 0);
}
- /* dump OUT requirements */
+ n_res = arch_irn_get_n_outs(n);
if (n_res > 0) {
+ /* dump OUT requirements */
reqs = get_ia32_out_req_all(n);
dump_reg_req(F, n, reqs, 1);
- }
- /* dump assigned registers */
- slots = get_ia32_slots(n);
- if (slots && n_res > 0) {
+ /* dump assigned registers */
for (i = 0; i < n_res; i++) {
- const arch_register_t *reg;
-
- reg = slots[i];
+ const arch_register_t *reg = arch_irn_get_register(n, i);
fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
/* dump supported am */
fprintf(F, "AM support = ");
switch (get_ia32_am_support(n)) {
- case ia32_am_None:
- fprintf(F, "none");
- break;
- case ia32_am_Source:
- fprintf(F, "source only (Load)");
- break;
+ case ia32_am_none: fputs("none\n", F); break;
+ case ia32_am_unary: fputs("source (unary)\n", F); break;
+ case ia32_am_binary: fputs("source (binary)\n", F); break;
+
default:
- fprintf(F, "unknown (%d)", get_ia32_am_support(n));
+ fprintf(F, "unknown (%d)\n", get_ia32_am_support(n));
break;
}
- fprintf(F, "\n");
/* dump AM offset */
if(get_ia32_am_offs_int(n) != 0) {
fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
}
- /* dump n_res */
- fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
-
- /* dump use_frame */
- fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
-
- /* commutative */
- fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
-
- /* need stackent */
+ fprintf(F, "n_res = %d\n", n_res);
+ fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
+ fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
-
- /* need stackent */
- fprintf(F, "is reload = %d\n", is_ia32_is_reload(n));
-
- /* dump latency */
- fprintf(F, "latency = %d\n", get_ia32_latency(n));
+ fprintf(F, "is reload = %d\n", is_ia32_is_reload(n));
+ fprintf(F, "latency = %d\n", get_ia32_latency(n));
/* dump flags */
fprintf(F, "flags =");
- flags = get_ia32_flags(n);
+ flags = arch_irn_get_flags(n);
if (flags == arch_irn_flags_none) {
fprintf(F, " none");
}
if (flags & arch_irn_flags_rematerializable) {
fprintf(F, " remat");
}
- if (flags & arch_irn_flags_ignore) {
- fprintf(F, " ignore");
- }
- if (flags & arch_irn_flags_modify_sp) {
- fprintf(F, " modify_sp");
- }
if (flags & arch_irn_flags_modify_flags) {
fprintf(F, " modify_flags");
}
return cc_attr;
}
+ia32_call_attr_t *get_ia32_call_attr(ir_node *node)
+{
+ ia32_attr_t *attr = get_ia32_attr(node);
+ ia32_call_attr_t *call_attr = CAST_IA32_ATTR(ia32_call_attr_t, attr);
+
+ return call_attr;
+}
+
+const ia32_call_attr_t *get_ia32_call_attr_const(const ir_node *node)
+{
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ const ia32_call_attr_t *call_attr = CONST_CAST_IA32_ATTR(ia32_call_attr_t, attr);
+
+ return call_attr;
+}
+
ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
return copyb_attr;
}
+ia32_climbframe_attr_t *get_ia32_climbframe_attr(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ ia32_climbframe_attr_t *climbframe_attr = CAST_IA32_ATTR(ia32_climbframe_attr_t, attr);
+
+ return climbframe_attr;
+}
+
+const ia32_climbframe_attr_t *get_ia32_climbframe_attr_const(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ const ia32_climbframe_attr_t *climbframe_attr = CONST_CAST_IA32_ATTR(ia32_climbframe_attr_t, attr);
+
+ return climbframe_attr;
+}
+
/**
* Gets the type of an ia32 node.
*/
attr->data.tp = tp;
}
-/**
- * Gets the supported address mode of an ia32 node
- */
-ia32_am_type_t get_ia32_am_support(const ir_node *node) {
- const ia32_attr_t *attr = get_ia32_attr_const(node);
- return attr->data.am_support;
-}
-
-ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
+ia32_am_type_t get_ia32_am_support(const ir_node *node)
+{
const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.am_arity;
}
/**
* Sets the supported address mode of an ia32 node
*/
-void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
- ia32_am_arity_t arity) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->data.am_support = am_tp;
- attr->data.am_arity = arity;
-
- assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
- (am_tp != ia32_am_None &&
- ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
+void set_ia32_am_support(ir_node *node, ia32_am_type_t arity)
+{
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_arity = arity;
}
/**
/**
* Gets the addr mode const.
*/
-int get_ia32_am_scale(const ir_node *node) {
+unsigned get_ia32_am_scale(const ir_node *node) {
const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.am_scale;
}
/**
* Sets the index register scale for address mode.
*/
-void set_ia32_am_scale(ir_node *node, int scale) {
+void set_ia32_am_scale(ir_node *node, unsigned scale) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert(0 <= scale && scale < 4 && "AM scale out of range");
+ assert(scale <= 3 && "AM scale out of range [0 ... 3]");
attr->data.am_scale = scale;
}
return attr->data.is_reload;
}
+void set_ia32_is_spill(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.is_spill = 1;
+}
+
+int is_ia32_is_spill(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ return attr->data.is_spill;
+}
+
+void set_ia32_is_remat(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.is_remat = 1;
+}
+
+int is_ia32_is_remat(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ return attr->data.is_remat;
+}
+
/**
* Gets the mode of the stored/loaded value (only set for Store/Load)
*/
attr->in_req[pos] = req;
}
-/**
- * Returns the register flag of an ia32 node.
- */
-arch_irn_flags_t get_ia32_flags(const ir_node *node) {
- const ia32_attr_t *attr = get_ia32_attr_const(node);
- return attr->data.flags;
-}
-
-/**
- * Sets the register flag of an ia32 node.
- */
-void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->data.flags = flags;
-}
-
-void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->data.flags |= flags;
-}
-
-/**
- * Returns the result register slots of an ia32 node.
- */
-const arch_register_t **get_ia32_slots(const ir_node *node) {
- const ia32_attr_t *attr = get_ia32_attr_const(node);
- return attr->slots;
-}
-
-/**
- * Returns the number of results.
- */
-int get_ia32_n_res(const ir_node *node) {
- const ia32_attr_t *attr = get_ia32_attr_const(node);
- return ARR_LEN(attr->slots);
-}
-
/**
* Returns the condition code of a node.
*/
return attr->size;
}
-/**
- * Sets the flags for the n'th out.
- */
-void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
- assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
- attr->out_flags[pos] = flags;
-}
-
-/**
- * Gets the flags for the n'th out.
- */
-arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
- const ia32_attr_t *attr = get_ia32_attr_const(node);
- assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
- return attr->out_flags[pos];
-}
-
/**
* Get the list of available execution units.
*/
/**
* Returns the name of the original ir node.
*/
-const char *get_ia32_orig_node(const ir_node *node) {
+const char *get_ia32_orig_node(const ir_node *node)
+{
const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->orig_node;
}
+static const char *ia32_get_old_node_name(const ir_node *irn)
+{
+ struct obstack *obst = env_cg->isa->name_obst;
+
+ lc_eoprintf(firm_get_arg_env(), obst, "%+F", irn);
+ obstack_1grow(obst, 0);
+ return obstack_finish(obst);
+}
+
/**
* Sets the name of the original ir node.
*/
-void set_ia32_orig_node(ir_node *node, const char *name) {
+void set_ia32_orig_node(ir_node *node, const ir_node *old)
+{
+ const char *name = ia32_get_old_node_name(old);
ia32_attr_t *attr = get_ia32_attr(node);
attr->orig_node = name;
}
return (attr->data.tp == ia32_AddrModeD);
}
-/**
- * Checks if node is a Load or xLoad/vfLoad.
- */
-int is_ia32_Ld(const ir_node *node) {
- int op = get_ia32_irn_opcode(node);
- return op == iro_ia32_Load ||
- op == iro_ia32_xLoad ||
- op == iro_ia32_vfld ||
- op == iro_ia32_fld;
-}
-
-/**
- * Checks if node is a Store or xStore/vfStore.
- */
-int is_ia32_St(const ir_node *node) {
- int op = get_ia32_irn_opcode(node);
- return op == iro_ia32_Store ||
- op == iro_ia32_Store8Bit ||
- op == iro_ia32_xStore ||
- op == iro_ia32_vfst ||
- op == iro_ia32_fst ||
- op == iro_ia32_fstp;
-}
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
- const ia32_attr_t *attr = get_ia32_attr_const(node);
-
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
-}
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_ia32_out_regnr(const ir_node *node, int pos) {
- const ia32_attr_t *attr = get_ia32_attr_const(node);
-
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
-}
-
void ia32_swap_left_right(ir_node *node)
{
ia32_attr_t *attr = get_ia32_attr(node);
set_irn_n(node, n_ia32_binary_right, left);
}
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
- const ia32_attr_t *attr = get_ia32_attr_const(node);
-
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return attr->slots[pos];
-}
-
/**
* Initializes the nodes attributes.
*/
ir_graph *irg = get_irn_irg(node);
struct obstack *obst = get_irg_obstack(irg);
ia32_attr_t *attr = get_ia32_attr(node);
+ backend_info_t *info;
- set_ia32_flags(node, flags);
+ arch_irn_set_flags(node, flags);
set_ia32_in_req_all(node, in_reqs);
set_ia32_out_req_all(node, out_reqs);
attr->attr_type |= IA32_ATTR_ia32_attr_t;
#endif
- attr->out_flags = NEW_ARR_D(int, obst, n_res);
- memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
-
- attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
- /* void* cast to suppress an incorrect warning on MSVC */
- memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
+ info = be_get_info(node);
+ info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res);
+ memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0]));
}
void
void
init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
- int symconst_sign, long offset)
+ int symconst_sign, int no_pic_adjust,
+ long offset)
{
ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
#ifndef NDEBUG
attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
#endif
- attr->symconst = symconst;
- attr->sc_sign = symconst_sign;
- attr->offset = offset;
+ attr->symconst = symconst;
+ attr->sc_sign = symconst_sign;
+ attr->no_pic_adjust = no_pic_adjust;
+ attr->offset = offset;
+}
+
+void init_ia32_call_attributes(ir_node* res, unsigned pop, ir_type* call_tp)
+{
+ ia32_call_attr_t *attr = get_irn_generic_attr(res);
+
+#ifndef NDEBUG
+ attr->attr.attr_type |= IA32_ATTR_ia32_call_attr_t;
+#endif
+ attr->pop = pop;
+ attr->call_tp = call_tp;
}
void
attr->pn_code = pnc;
}
-ir_node *get_ia32_result_proj(const ir_node *node)
-{
- const ir_edge_t *edge;
+void
+init_ia32_climbframe_attributes(ir_node *res, unsigned count) {
+ ia32_climbframe_attr_t *attr = get_irn_generic_attr(res);
- foreach_out_edge(node, edge) {
- ir_node *proj = get_edge_src_irn(edge);
- if(get_Proj_proj(proj) == 0) {
- return proj;
- }
- }
- return NULL;
+#ifndef NDEBUG
+ attr->attr.attr_type |= IA32_ATTR_ia32_climbframe_attr_t;
+#endif
+ attr->count = count;
}
/***************************************************************************************
***************************************************************************************/
/* default compare operation to compare attributes */
-int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
+int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b)
+{
if (a->data.tp != b->data.tp)
return 1;
|| a->data.am_sc_sign != b->data.am_sc_sign
|| a->am_offs != b->am_offs
|| a->am_sc != b->am_sc
+ || a->data.am_sc_no_pic_adjust != b->data.am_sc_no_pic_adjust
|| a->ls_mode != b->ls_mode)
return 1;
|| a->frame_ent != b->frame_ent)
return 1;
- if (a->data.tp != b->data.tp)
- return 1;
-
if (a->data.has_except_label != b->data.has_except_label)
return 1;
attr_a = get_ia32_condcode_attr_const(a);
attr_b = get_ia32_condcode_attr_const(b);
- if(attr_a->pn_code != attr_b->pn_code)
+ if (attr_a->pn_code != attr_b->pn_code)
+ return 1;
+
+ return 0;
+}
+
+/** Compare node attributes for call nodes. */
+static int ia32_compare_call_attr(ir_node *a, ir_node *b)
+{
+ const ia32_call_attr_t *attr_a;
+ const ia32_call_attr_t *attr_b;
+
+ if (ia32_compare_nodes_attr(a, b))
+ return 1;
+
+ attr_a = get_ia32_call_attr_const(a);
+ attr_b = get_ia32_call_attr_const(b);
+
+ if (attr_a->pop != attr_b->pop)
+ return 1;
+
+ if (attr_a->call_tp != attr_b->call_tp)
return 1;
return 0;
attr_a = get_ia32_copyb_attr_const(a);
attr_b = get_ia32_copyb_attr_const(b);
- if(attr_a->size != attr_b->size)
+ if (attr_a->size != attr_b->size)
return 1;
return 0;
const ia32_asm_attr_t *attr_a;
const ia32_asm_attr_t *attr_b;
- if(ia32_compare_nodes_attr(a, b))
+ if (ia32_compare_nodes_attr(a, b))
return 1;
attr_a = get_ia32_asm_attr_const(a);
const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
- if(attr_a->symconst != attr_b->symconst ||
- attr_a->sc_sign != attr_b->sc_sign ||
- attr_a->offset != attr_b->offset)
+ if (attr_a->symconst != attr_b->symconst
+ || attr_a->sc_sign != attr_b->sc_sign
+ || attr_a->no_pic_adjust != attr_b->no_pic_adjust
+ || attr_a->offset != attr_b->offset) {
return 1;
+ }
return 0;
}
return ia32_compare_nodes_attr(a, b);
}
+/** Compare node attributes for ClimbFrame nodes. */
+static
+int ia32_compare_climbframe_attr(ir_node *a, ir_node *b)
+{
+ const ia32_climbframe_attr_t *attr_a;
+ const ia32_climbframe_attr_t *attr_b;
+
+ if (ia32_compare_nodes_attr(a, b))
+ return 1;
+
+ attr_a = get_ia32_climbframe_attr_const(a);
+ attr_b = get_ia32_climbframe_attr_const(b);
+
+ if (attr_a->count != attr_b->count)
+ return 1;
+
+ return 0;
+}
/* copies the ia32 attributes */
static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
struct obstack *obst = get_irg_obstack(irg);
const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
ia32_attr_t *attr_new = get_ia32_attr(new_node);
+ backend_info_t *old_info = be_get_info(old_node);
+ backend_info_t *new_info = be_get_info(new_node);
/* copy the attributes */
memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
/* copy out flags */
- attr_new->out_flags =
- DUP_ARR_D(int, obst, attr_old->out_flags);
- /* copy register assignments */
- attr_new->slots =
- DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
+ new_info->out_infos =
+ DUP_ARR_D(reg_out_info_t, obst, old_info->out_infos);
}
/* Include the generated constructor functions */
projects / libfirm / blobdiff