#include "firm_common_t.h"
#include "irvrfy_t.h"
#include "irprintf.h"
+#include "iredges.h"
#include "../bearch.h"
#include "ia32_nodes_attr.h"
#include "ia32_new_nodes.h"
#include "gen_ia32_regalloc_if.h"
+#include "gen_ia32_machine.h"
/**
* Returns the ident of a SymConst.
* @return The ident of the SymConst
*/
static ident *get_sc_ident(ir_node *symc) {
- entity *ent;
- ir_type *owner;
- ident *id;
+ ir_entity *ent;
+ ir_type *owner;
+ ident *id;
switch (get_SymConst_kind(symc)) {
case symconst_addr_name:
return NULL;
}
-
+/**
+ * returns true if a node has x87 registers
+ */
+int ia32_has_x87_register(const ir_node *n) {
+ assert(is_ia32_irn(n) && "Need ia32 node.");
+ return is_irn_machine_user(n, 0);
+}
/***********************************************************************************
* _ _ _ __
slots = get_ia32_slots(n);
if (slots && n_res > 0) {
for (i = 0; i < n_res; i++) {
- fprintf(F, "reg #%d = %s\n", i, slots[i] ? slots[i]->name : "n/a");
+ const arch_register_t *reg;
+
+ /* retrieve "real" x87 register */
+ if (ia32_has_x87_register(n))
+ reg = get_ia32_attr(n)->x87[i + 2];
+ else
+ reg = slots[i];
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
fprintf(F, "\n");
}
}
fprintf(F, "\n");
+ /* dump AM symconst */
+ if(get_ia32_am_sc(n) != NULL) {
+ fprintf(F, "AM symconst = %s\n", get_id_str(get_ia32_am_sc(n)));
+ }
+
/* dump AM scale */
fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
/* dump pn code */
- fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
+ fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n), get_pnc_string(get_ia32_pncode(n)));
/* dump n_res */
fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
}
fprintf(F, "\n");
- fprintf(F, "src_mode = ");
- if (get_ia32_src_mode(n)) {
- ir_fprintf(F, "%+F", get_ia32_src_mode(n));
- }
- else {
- fprintf(F, "n/a");
- }
- fprintf(F, "\n");
-
- fprintf(F, "tgt_mode = ");
- if (get_ia32_tgt_mode(n)) {
- ir_fprintf(F, "%+F", get_ia32_tgt_mode(n));
- }
- else {
- fprintf(F, "n/a");
- }
- fprintf(F, "\n");
-
#ifndef NDEBUG
/* dump original ir node name */
fprintf(F, "orig node = ");
ia32_attr_t *attr = get_ia32_attr(node);
static char res[64];
- if (! attr->am_offs) {
- return NULL;
- }
-
- snprintf(res, sizeof(res), "%+ld", attr->am_offs);
+ snprintf(res, sizeof(res), "%+d", attr->am_offs);
return res;
}
/**
- * Gets the addressmode offset as long.
+ * Gets the addressmode offset as int.
*/
-long get_ia32_am_offs_long(const ir_node *node) {
+int get_ia32_am_offs_int(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
return attr->am_offs;
}
+/**
+ * Sets the addressmode offset from an int.
+ */
+void set_ia32_am_offs_int(ir_node *node, int offset) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_offs = offset;
+}
+
/**
* Add an offset for addrmode.
*/
static void extend_ia32_am_offs(ir_node *node, char *offset, char op) {
ia32_attr_t *attr = get_ia32_attr(node);
- int o;
+ int res, o;
- if (! offset || strlen(offset) < 1)
+ if (offset == NULL || offset[0] == '\0')
return;
- assert(sscanf(offset, "%d", &o) == 1);
+ if (offset[0] == '-')
+ res = sscanf(offset, "%d", &o);
+ else
+ res = sscanf(offset, "%u", &o);
+ assert(res == 1);
if (op == '-')
attr->am_offs -= o;
extend_ia32_am_offs(node, (char *)offset, '+');
}
+void add_ia32_am_offs_int(ir_node *node, int offset) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_offs += offset;
+}
+
/**
* Sub an offset for addrmode.
*/
/**
* Sets the string representation of the internal const.
*/
-void set_ia32_cnst(ir_node *node, char *cnst) {
+void set_ia32_cnst(ir_node *node, const char *cnst) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->cnst = new_id_from_str(cnst);
}
attr->res_mode = mode;
}
-/**
- * Gets the source mode of conversion.
- */
-ir_mode *get_ia32_src_mode(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->src_mode;
-}
-
-/**
- * Sets the source mode of conversion.
- */
-void set_ia32_src_mode(ir_node *node, ir_mode *mode) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->src_mode = mode;
-}
-
-/**
- * Gets the target mode of conversion.
- */
-ir_mode *get_ia32_tgt_mode(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->tgt_mode;
-}
-
-/**
- * Sets the target mode of conversion.
- */
-void set_ia32_tgt_mode(ir_node *node, ir_mode *mode) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->tgt_mode = mode;
-}
-
/**
* Gets the frame entity assigned to this node.
*/
-entity *get_ia32_frame_ent(const ir_node *node) {
+ir_entity *get_ia32_frame_ent(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
return attr->frame_ent;
}
/**
* Sets the frame entity for this node.
*/
-void set_ia32_frame_ent(ir_node *node, entity *ent) {
+void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->frame_ent = ent;
- set_ia32_use_frame(node);
+ if(ent != NULL)
+ set_ia32_use_frame(node);
+ else
+ clear_ia32_use_frame(node);
}
*/
const ia32_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->in_req[pos];
+ return attr->in_req != NULL ? attr->in_req[pos] : NULL;
}
/**
*/
const ia32_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->out_req[pos];
+ return attr->out_req != NULL ? attr->out_req[pos] : NULL;
}
/**
attr->pn_code = code;
}
+/**
+ * Sets the flags for the n'th out.
+ */
+void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ attr->out_flags[pos] = flags;
+}
+
+/**
+ * Gets the flags for the n'th out.
+ */
+arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none;
+}
+
+/**
+ * Get the list of available execution units.
+ */
+const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->exec_units;
+}
+
#ifndef NDEBUG
/**
attr->cnst_val.tv = get_Const_tarval(cnst);
mode = get_tarval_mode(attr->cnst_val.tv);
if (mode_is_reference(mode) &&
- get_mode_null(mode) == attr->cnst_val.tv)
- attr->cnst_val.tv = get_mode_null(mode_Is);
+ get_mode_null(mode) == attr->cnst_val.tv) {
+ attr->cnst_val.tv = get_mode_null(mode_Iu);
+ }
attr->cnst = get_ident_for_tv(attr->cnst_val.tv);
break;
case iro_SymConst:
* Checks if node is a Load or xLoad/vfLoad.
*/
int is_ia32_Ld(const ir_node *node) {
- return is_ia32_Load(node) || is_ia32_xLoad(node) || is_ia32_vfld(node) || is_ia32_fld(node);
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Load || op == iro_ia32_xLoad || op == iro_ia32_vfld || op == iro_ia32_fld;
}
/**
* Checks if node is a Store or xStore/vfStore.
*/
int is_ia32_St(const ir_node *node) {
- return is_ia32_Store(node) || is_ia32_xStore(node) || is_ia32_vfst(node) || is_ia32_fst(node) || is_ia32_fstp(node);
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Store || op == iro_ia32_xStore || op == iro_ia32_vfst || op == iro_ia32_fst || op == iro_ia32_fstp;
}
/**
* Checks if node is a Const or xConst/vfConst.
*/
int is_ia32_Cnst(const ir_node *node) {
- return is_ia32_Const(node) || is_ia32_xConst(node) || is_ia32_vfConst(node);
+ int op = get_ia32_irn_opcode(node);
+ return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
}
/**
const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert(is_ia32_irn(node) && "Not an ia32 node.");
assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
int get_ia32_out_regnr(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert(is_ia32_irn(node) && "Not an ia32 node.");
assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert(is_ia32_irn(node) && "Not an ia32 node.");
assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
* Initializes the nodes attributes.
*/
void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const ia32_register_req_t **in_reqs,
- const ia32_register_req_t **out_reqs, int n_res, unsigned latency)
+ const ia32_register_req_t **out_reqs, const be_execution_unit_t ***execution_units,
+ int n_res, unsigned latency)
{
ia32_attr_t *attr = get_ia32_attr(node);
+
set_ia32_flags(node, flags);
set_ia32_in_req_all(node, in_reqs);
set_ia32_out_req_all(node, out_reqs);
set_ia32_latency(node, latency);
+ set_ia32_n_res(node, n_res);
+
+ attr->exec_units = execution_units;
+
+ attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res);
+ memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
- attr->data.n_res = n_res;
memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
}
+ir_node *get_ia32_result_proj(const ir_node *node)
+{
+ const ir_edge_t *edge;
+
+ foreach_out_edge(node, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ if(get_Proj_proj(proj) == 0) {
+ return proj;
+ }
+ }
+ return NULL;
+}
+
+ir_mode *get_ia32_Conv_src_mode(const ir_node *node)
+{
+ if(get_ia32_op_type(node) == ia32_AddrModeS) {
+ return get_ia32_ls_mode(node);
+ }
+
+ return get_irn_mode(get_irn_n(node, 2));
+}
+
+ir_mode *get_ia32_Conv_tgt_mode(const ir_node *node)
+{
+ return get_irn_mode(node);
+}
+
/***************************************************************************************
* _ _ _
* | | | | | |
int ia32_compare_immop_attr(ia32_attr_t *a, ia32_attr_t *b) {
int equ = 0;
- if (a->data.tp == b->data.tp) {
- equ = (a->cnst == b->cnst);
- equ = equ ? (a->data.use_frame == b->data.use_frame) : 0;
+ if (a->data.tp != b->data.tp)
+ return 1;
- if (equ && a->data.use_frame && b->data.use_frame)
- equ = (a->frame_ent == b->frame_ent);
- }
+ if (a->cnst != b->cnst)
+ return 1;
- return !equ;
-}
+ if (a->data.use_frame != b->data.use_frame)
+ return 1;
+
+ if (a->data.use_frame && a->frame_ent != b->frame_ent)
+ return 1;
-/* compare converts */
-int ia32_compare_conv_attr(ia32_attr_t *a, ia32_attr_t *b) {
- int equ = ! ia32_compare_immop_attr(a, b);
+ if (a->data.am_flavour != b->data.am_flavour
+ || a->data.am_scale != b->data.am_scale
+ || a->data.offs_sign != b->data.offs_sign
+ || a->data.am_sc_sign != b->data.am_sc_sign
+ || a->am_offs != b->am_offs
+ || a->am_sc != b->am_sc)
+ return 1;
- equ = equ ? (a->src_mode == b->src_mode) && (a->tgt_mode == b->tgt_mode) : equ;
+ if(a->pn_code != b->pn_code)
+ return 1;
return !equ;
}
-/* Copy attribute function not needed any more, but might be of use later. */
-#if 0
/* copies the ia32 attributes */
static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
- ia32_attr_t *attr_old = get_ia32_attr(old_node);
- ia32_attr_t *attr_new = get_ia32_attr(new_node);
- int n_res = get_ia32_n_res(old_node);
+ ia32_attr_t *attr_old = get_ia32_attr(old_node);
+ ia32_attr_t *attr_new = get_ia32_attr(new_node);
/* copy the attributes */
- memcpy(attr_new, attr_old, sizeof(*attr_new));
+ memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
+
+ /* copy out flags */
+ DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags);
}
/**
op->ops.copy_attr = ia32_copy_attr;
}
}
-#endif
/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"
projects / libfirm / blobdiff