#include "gen_ia32_regalloc_if.h"
#include "gen_ia32_machine.h"
-/**
- * returns true if a node has x87 registers
- */
-int ia32_has_x87_register(const ir_node *n) {
- assert(is_ia32_irn(n) && "Need ia32 node.");
- return is_irn_machine_user(n, 0);
-}
-
/***********************************************************************************
* _ _ _ __
* | | (_) | | / _|
break;
case dump_node_mode_txt:
- mode = get_irn_mode(n);
-
if (is_ia32_Ld(n) || is_ia32_St(n)) {
mode = get_ia32_ls_mode(n);
+ fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
+ }
+
+ if(is_ia32_Immediate(n)) {
+ const ia32_immediate_attr_t *attr
+ = get_ia32_immediate_attr_const(n);
+
+ fputc(' ', F);
+ if(attr->symconst) {
+ if(attr->attr.data.am_sc_sign) {
+ fputc('-', F);
+ }
+ fputs(get_entity_name(attr->symconst), F);
+ }
+ if(attr->offset != 0 || attr->symconst == NULL) {
+ if(attr->offset > 0 && attr->symconst != NULL) {
+ fputc('+', F);
+ }
+ fprintf(F, "%ld", attr->offset);
+ }
}
- fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
+ {
+ const ia32_attr_t *attr = get_ia32_attr_const(n);
+
+ if(attr->am_sc != NULL || attr->am_offs != 0)
+ fputs(" [", F);
+
+ if(attr->am_sc != NULL) {
+ if(attr->data.am_sc_sign) {
+ fputc('-', F);
+ }
+ fputs(get_entity_name(attr->am_sc), F);
+ }
+ if(attr->am_offs != 0) {
+ if(attr->am_offs > 0 && attr->am_sc != NULL) {
+ fputc('+', F);
+ }
+ fprintf(F, "%d", attr->am_offs);
+ }
+
+ if(attr->am_sc != NULL || attr->am_offs != 0)
+ fputc(']', F);
+ }
break;
case dump_node_nodeattr_txt:
for (i = 0; i < n_res; i++) {
const arch_register_t *reg;
- /* retrieve "real" x87 register */
- if (ia32_has_x87_register(n))
- reg = get_ia32_attr(n)->x87[i + 2];
- else
- reg = slots[i];
+ reg = slots[i];
fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
/* dump pn code */
- if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
- fprintf(F, "pn_code = %d (%s, unsigned)\n", get_ia32_pncode(n),
- get_pnc_string(get_ia32_pncode(n) & ~ia32_pn_Cmp_Unsigned));
+ if(is_ia32_SwitchJmp(n)) {
+ fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
} else {
- fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
- get_pnc_string(get_ia32_pncode(n)));
+ if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
+ long pnc = get_ia32_pncode(n);
+ fprintf(F, "pn_code = %ld (%s, unsigned)\n",
+ pnc, get_pnc_string(pnc & ~ia32_pn_Cmp_Unsigned));
+ } else {
+ fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n),
+ get_pnc_string(get_ia32_pncode(n)));
+ }
}
/* dump n_res */
* |___/
***************************************************************************************************/
-/**
- * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
- * Firm was made by people hating const :-(
- */
-ia32_attr_t *get_ia32_attr(const ir_node *node) {
+ia32_attr_t *get_ia32_attr(ir_node *node) {
assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
- return (ia32_attr_t *)get_irn_generic_attr((ir_node *)node);
+ return (ia32_attr_t *)get_irn_generic_attr(node);
+}
+
+const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
+ assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
+ return (const ia32_attr_t*) get_irn_generic_attr_const(node);
+}
+
+ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
+ return x87_attr;
+}
+
+const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
+ return x87_attr;
+}
+
+const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
+
+ return asm_attr;
+}
+
+const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
+{
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ const ia32_immediate_attr_t *immediate_attr
+ = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
+
+ return immediate_attr;
}
/**
* Gets the type of an ia32 node.
*/
ia32_op_type_t get_ia32_op_type(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.tp;
}
* Gets the immediate op type of an ia32 node.
*/
ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.imm_tp;
}
/**
- * Gets the supported addrmode of an ia32 node
+ * Gets the supported address mode of an ia32 node
*/
ia32_am_type_t get_ia32_am_support(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.am_support;
}
+ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ return attr->data.am_arity;
+}
+
/**
- * Sets the supported addrmode of an ia32 node
+ * Sets the supported address mode of an ia32 node
*/
-void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
+void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
+ ia32_am_arity_t arity) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->data.am_support = am_tp;
+ attr->data.am_arity = arity;
+
+ assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
+ (am_tp != ia32_am_None &&
+ ((arity == ia32_am_unary) || (arity == ia32_am_binary))));
}
/**
- * Gets the addrmode flavour of an ia32 node
+ * Gets the address mode flavour of an ia32 node
*/
ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.am_flavour;
}
/**
- * Sets the addrmode flavour of an ia32 node
+ * Sets the address mode flavour of an ia32 node
*/
void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
ia32_attr_t *attr = get_ia32_attr(node);
}
/**
- * Gets the addressmode offset as int.
+ * Gets the address mode offset as int.
*/
int get_ia32_am_offs_int(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->am_offs;
}
/**
- * Sets the addressmode offset from an int.
+ * Sets the address mode offset from an int.
*/
void set_ia32_am_offs_int(ir_node *node, int offset) {
ia32_attr_t *attr = get_ia32_attr(node);
}
/**
- * Returns the symconst entity associated to addrmode.
+ * Returns the symconst entity associated to address mode.
*/
ir_entity *get_ia32_am_sc(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->am_sc;
}
/**
- * Sets the symconst entity associated to addrmode.
+ * Sets the symconst entity associated to address mode.
*/
void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
ia32_attr_t *attr = get_ia32_attr(node);
* Returns the sign bit for address mode symconst.
*/
int is_ia32_am_sc_sign(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.am_sc_sign;
}
* Gets the addr mode const.
*/
int get_ia32_am_scale(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.am_scale;
}
/**
- * Sets the index register scale for addrmode.
+ * Sets the index register scale for address mode.
*/
void set_ia32_am_scale(ir_node *node, int scale) {
ia32_attr_t *attr = get_ia32_attr(node);
* Return the tarval of an immediate operation or NULL in case of SymConst
*/
tarval *get_ia32_Immop_tarval(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
assert(attr->data.imm_tp == ia32_ImmConst);
return attr->cnst_val.tv;
}
}
ir_entity *get_ia32_Immop_symconst(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
assert(attr->data.imm_tp == ia32_ImmSymConst);
return attr->cnst_val.sc;
}
* Gets the uses_frame flag.
*/
int is_ia32_use_frame(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.use_frame;
}
* Checks if node is commutative.
*/
int is_ia32_commutative(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.is_commutative;
}
* Checks if node needs %cl.
*/
int is_ia32_emit_cl(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.emit_cl;
}
* Checks if node got lea.
*/
int is_ia32_got_lea(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.got_lea;
}
}
int is_ia32_need_stackent(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.need_stackent;
}
* Gets the mode of the stored/loaded value (only set for Store/Load)
*/
ir_mode *get_ia32_ls_mode(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->ls_mode;
}
* Gets the frame entity assigned to this node.
*/
ir_entity *get_ia32_frame_ent(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->frame_ent;
}
* Gets the instruction latency.
*/
unsigned get_ia32_latency(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->latency;
}
* Returns the argument register requirements of an ia32 node.
*/
const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->in_req;
}
* Returns the result register requirements of an ia32 node.
*/
const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->out_req;
}
* Returns the argument register requirement at position pos of an ia32 node.
*/
const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
if(attr->in_req == NULL)
return arch_no_register_req;
* Returns the result register requirement at position pos of an ia32 node.
*/
const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
if(attr->out_req == NULL)
return arch_no_register_req;
* Returns the register flag of an ia32 node.
*/
arch_irn_flags_t get_ia32_flags(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.flags;
}
* Returns the result register slots of an ia32 node.
*/
const arch_register_t **get_ia32_slots(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->slots;
}
-/**
- * Sets the number of results.
- */
-void set_ia32_n_res(ir_node *node, int n_res) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->data.n_res = n_res;
-}
-
/**
* Returns the number of results.
*/
int get_ia32_n_res(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->data.n_res;
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ return ARR_LEN(attr->slots);
}
/**
* Returns the flavour of an ia32 node,
*/
ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->data.op_flav;
}
/**
* Returns the projnum code.
*/
-pn_Cmp get_ia32_pncode(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+long get_ia32_pncode(const ir_node *node)
+{
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->pn_code;
}
/**
* Sets the projnum code
*/
-void set_ia32_pncode(ir_node *node, pn_Cmp code) {
+void set_ia32_pncode(ir_node *node, long code)
+{
ia32_attr_t *attr = get_ia32_attr(node);
attr->pn_code = code;
}
*/
void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
attr->out_flags[pos] = flags;
}
* Gets the flags for the n'th out.
*/
arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none;
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
+ return attr->out_flags[pos];
}
/**
* Get the list of available execution units.
*/
const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->exec_units;
}
+/**
+ * Get the exception label attribute.
+ */
+unsigned get_ia32_exc_label(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ return attr->data.except_label;
+}
+
+/**
+ * Set the exception label attribute.
+ */
+void set_ia32_exc_label(ir_node *node, unsigned flag) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.except_label = flag;
+}
+
#ifndef NDEBUG
/**
* Returns the name of the original ir node.
*/
const char *get_ia32_orig_node(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->orig_node;
}
}
void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
+#if 0
if(mode_is_reference(get_tarval_mode(tv))) {
if(tarval_is_null(tv)) {
tv = get_tarval_null(mode_Iu);
} else {
- panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
+ long val;
+ /* workaround... */
+ if(!tarval_is_long(tv))
+ panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
+ val = get_tarval_long(tv);
+ tv = new_tarval_from_long(val, mode_Iu);
}
} else {
tv = tarval_convert_to(tv, mode_Iu);
}
+#else
+ tv = tarval_convert_to(tv, mode_Iu);
+#endif
assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
&& tv != NULL);
* Returns whether or not the node is an immediate operation with Const.
*/
int is_ia32_ImmConst(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return (attr->data.imm_tp == ia32_ImmConst);
}
* Returns whether or not the node is an immediate operation with SymConst.
*/
int is_ia32_ImmSymConst(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return (attr->data.imm_tp == ia32_ImmSymConst);
}
* Returns whether or not the node is an AddrModeS node.
*/
int is_ia32_AddrModeS(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return (attr->data.tp == ia32_AddrModeS);
}
* Returns whether or not the node is an AddrModeD node.
*/
int is_ia32_AddrModeD(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
return (attr->data.tp == ia32_AddrModeD);
}
* Returns the name of the OUT register at position pos.
*/
const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
- assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return arch_register_get_name(attr->slots[pos]);
* Returns the index of the OUT register at position pos within its register class.
*/
int get_ia32_out_regnr(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
- assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return arch_register_get_index(attr->slots[pos]);
}
+void ia32_swap_left_right(ir_node *node)
+{
+ ir_node *left = get_irn_n(node, 2);
+ ir_node *right = get_irn_n(node, 3);
+ assert(is_ia32_commutative(node));
+ set_irn_n(node, 2, right);
+ set_irn_n(node, 3, left);
+ set_ia32_pncode(node, get_inversed_pnc(get_ia32_pncode(node)));
+}
+
/**
* Returns the OUT register at position pos.
*/
const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
- assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
+ assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
assert(attr->slots[pos] && "No register assigned");
return attr->slots[pos];
const be_execution_unit_t ***execution_units,
int n_res, unsigned latency)
{
- ia32_attr_t *attr = get_ia32_attr(node);
+ ir_graph *irg = get_irn_irg(node);
+ struct obstack *obst = get_irg_obstack(irg);
+ ia32_attr_t *attr = get_ia32_attr(node);
set_ia32_flags(node, flags);
set_ia32_in_req_all(node, in_reqs);
set_ia32_out_req_all(node, out_reqs);
set_ia32_latency(node, latency);
- set_ia32_n_res(node, n_res);
- attr->exec_units = execution_units;
+ attr->exec_units = execution_units;
+#ifndef NDEBUG
+ attr->attr_type |= IA32_ATTR_ia32_attr_t;
+#endif
- attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res);
+ attr->out_flags = NEW_ARR_D(int, obst, n_res);
memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
- memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
+ attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
+ memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
+}
+
+void
+init_ia32_x87_attributes(ir_node *res)
+{
+#ifndef NDEBUG
+ ia32_attr_t *attr = get_ia32_attr(res);
+ attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
+#endif
+ ia32_current_cg->do_x87_sim = 1;
+}
+
+void
+init_ia32_asm_attributes(ir_node *res)
+{
+#ifndef NDEBUG
+ ia32_attr_t *attr = get_ia32_attr(res);
+ attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
+#endif
+}
+
+void
+init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
+ int symconst_sign, long offset)
+{
+ ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
+
+#ifndef NDEBUG
+ attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
+#endif
+ attr->symconst = symconst;
+ attr->attr.data.am_sc_sign = symconst_sign;
+ attr->offset = offset;
}
ir_node *get_ia32_result_proj(const ir_node *node)
***************************************************************************************/
/* default compare operation to compare attributes */
-int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) {
+int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
if (a->data.tp != b->data.tp
|| a->data.imm_tp != b->data.imm_tp)
return 1;
return 1;
if (a->data.am_flavour != b->data.am_flavour
- || a->data.am_scale != b->data.am_scale
- || a->data.offs_sign != b->data.offs_sign
- || a->data.am_sc_sign != b->data.am_sc_sign
- || a->am_offs != b->am_offs
- || a->am_sc != b->am_sc
- || a->ls_mode != b->ls_mode)
+ || a->data.am_scale != b->data.am_scale
+ || a->data.am_sc_sign != b->data.am_sc_sign
+ || a->am_offs != b->am_offs
+ || a->am_sc != b->am_sc
+ || a->ls_mode != b->ls_mode)
+ return 1;
+
+ /* nodes with not yet assigned entities shouldn't be CSEd (important for
+ * unsigned int -> double conversions */
+ if(a->data.use_frame && a->frame_ent == NULL)
+ return 1;
+ if(b->data.use_frame && b->frame_ent == NULL)
return 1;
if (a->data.use_frame != b->data.use_frame
- || a->data.use_frame != b->data.use_frame
- || a->frame_ent != b->frame_ent)
+ || a->frame_ent != b->frame_ent)
return 1;
if(a->pn_code != b->pn_code)
return 1;
if (a->data.tp != b->data.tp
- || a->data.op_flav != b->data.op_flav)
+ || a->data.op_flav != b->data.op_flav)
+ return 1;
+
+ if (a->data.except_label != b->data.except_label)
+ return 1;
+
+ return 0;
+}
+
+static
+int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
+{
+ const ia32_attr_t* attr_a = get_ia32_attr_const(a);
+ const ia32_attr_t* attr_b = get_ia32_attr_const(b);
+
+ return ia32_compare_attr(attr_a, attr_b);
+}
+
+static
+int ia32_compare_x87_attr(ir_node *a, ir_node *b)
+{
+ return ia32_compare_nodes_attr(a, b);
+}
+
+static
+int ia32_compare_asm_attr(ir_node *a, ir_node *b)
+{
+ const ia32_asm_attr_t *attr_a;
+ const ia32_asm_attr_t *attr_b;
+
+ if(ia32_compare_nodes_attr(a, b))
+ return 1;
+
+ attr_a = get_ia32_asm_attr_const(a);
+ attr_b = get_ia32_asm_attr_const(b);
+
+ if(attr_a->asm_text != attr_b->asm_text)
+ return 1;
+
+ return 0;
+}
+
+static
+int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
+{
+ const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
+ const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
+
+ if(attr_a->symconst != attr_b->symconst ||
+ attr_a->attr.data.am_sc_sign != attr_b->attr.data.am_sc_sign ||
+ attr_a->offset != attr_b->offset)
return 1;
return 0;
}
/* copies the ia32 attributes */
-static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
- ia32_attr_t *attr_old = get_ia32_attr(old_node);
- ia32_attr_t *attr_new = get_ia32_attr(new_node);
+static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
+{
+ ir_graph *irg = get_irn_irg(new_node);
+ struct obstack *obst = get_irg_obstack(irg);
+ const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
+ ia32_attr_t *attr_new = get_ia32_attr(new_node);
/* copy the attributes */
memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
/* copy out flags */
attr_new->out_flags =
- DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags);
-}
-
-/**
- * Registers the ia32_copy_attr function for all ia32 opcodes.
- */
-void ia32_register_copy_attr_func(void) {
- unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last();
-
- for (i = f; i < l; i++) {
- ir_op *op = get_irp_opcode(i);
- op->ops.copy_attr = ia32_copy_attr;
- }
+ DUP_ARR_D(int, obst, attr_old->out_flags);
+ /* copy register assignments */
+ attr_new->slots =
+ DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
}
/* Include the generated constructor functions */
projects / libfirm / blobdiff