#include "gen_ia32_regalloc_if.h"
#include "gen_ia32_machine.h"
-/**
- * returns true if a node has x87 registers
- */
-int ia32_has_x87_register(const ir_node *n) {
- assert(is_ia32_irn(n) && "Need ia32 node.");
- return is_irn_machine_user(n, 0);
-}
-
/***********************************************************************************
* _ _ _ __
* | | (_) | | / _|
ir_mode *mode = NULL;
int bad = 0;
int i, n_res, am_flav, flags;
- const ia32_attr_t *attr = get_ia32_attr_const(n);
const arch_register_req_t **reqs;
const arch_register_t **slots;
break;
case dump_node_mode_txt:
- mode = get_irn_mode(n);
-
if (is_ia32_Ld(n) || is_ia32_St(n)) {
mode = get_ia32_ls_mode(n);
+ fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
+ }
+
+ if(is_ia32_Immediate(n)) {
+ const ia32_immediate_attr_t *attr
+ = get_ia32_immediate_attr_const(n);
+
+ fputc(' ', F);
+ if(attr->symconst) {
+ if(attr->attr.data.am_sc_sign) {
+ fputc('-', F);
+ }
+ fputs(get_entity_name(attr->symconst), F);
+ }
+ if(attr->offset != 0 || attr->symconst == NULL) {
+ if(attr->offset > 0 && attr->symconst != NULL) {
+ fputc('+', F);
+ }
+ fprintf(F, "%ld", attr->offset);
+ }
}
- fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
+ {
+ const ia32_attr_t *attr = get_ia32_attr_const(n);
+
+ if(attr->am_sc != NULL || attr->am_offs != 0)
+ fputs(" [", F);
+
+ if(attr->am_sc != NULL) {
+ if(attr->data.am_sc_sign) {
+ fputc('-', F);
+ }
+ fputs(get_entity_name(attr->am_sc), F);
+ }
+ if(attr->am_offs != 0) {
+ if(attr->am_offs > 0 && attr->am_sc != NULL) {
+ fputc('+', F);
+ }
+ fprintf(F, "%d", attr->am_offs);
+ }
+
+ if(attr->am_sc != NULL || attr->am_offs != 0)
+ fputc(']', F);
+ }
break;
case dump_node_nodeattr_txt:
for (i = 0; i < n_res; i++) {
const arch_register_t *reg;
- /* retrieve "real" x87 register */
- if (ia32_has_x87_register(n))
- reg = get_ia32_attr(n)->x87[i + 2];
- else
- reg = slots[i];
+ reg = slots[i];
fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
case ia32_ImmSymConst:
fprintf(F, "SymConst");
break;
- case ia32_ImmAsm:
- fprintf(F, "Asm '%s'\n",
- get_id_str(attr->cnst_val.asm_text));
- break;
default:
fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
break;
/* dump pn code */
if(is_ia32_SwitchJmp(n)) {
- fprintf(F, "pn_code = %d\n", get_ia32_pncode(n));
+ fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
} else {
if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
- int pnc = get_ia32_pncode(n);
- fprintf(F, "pn_code = %d (%s, unsigned)\n",
+ long pnc = get_ia32_pncode(n);
+ fprintf(F, "pn_code = %ld (%s, unsigned)\n",
pnc, get_pnc_string(pnc & ~ia32_pn_Cmp_Unsigned));
} else {
- fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
+ fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n),
get_pnc_string(get_ia32_pncode(n)));
}
}
return (const ia32_attr_t*) get_irn_generic_attr_const(node);
}
+ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
+ return x87_attr;
+}
+
+const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
+ return x87_attr;
+}
+
+const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
+
+ return asm_attr;
+}
+
+const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
+{
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ const ia32_immediate_attr_t *immediate_attr
+ = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
+
+ return immediate_attr;
+}
+
/**
* Gets the type of an ia32 node.
*/
return attr->data.am_support;
}
+ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
+ const ia32_attr_t *attr = get_ia32_attr_const(node);
+ return attr->data.am_arity;
+}
+
/**
* Sets the supported address mode of an ia32 node
*/
-void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
+void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
+ ia32_am_arity_t arity) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->data.am_support = am_tp;
+ attr->data.am_arity = arity;
+
+ assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
+ (am_tp != ia32_am_None &&
+ ((arity == ia32_am_unary) || (arity == ia32_am_binary))));
}
/**
/**
* Returns the projnum code.
*/
-pn_Cmp get_ia32_pncode(const ir_node *node) {
+long get_ia32_pncode(const ir_node *node)
+{
const ia32_attr_t *attr = get_ia32_attr_const(node);
return attr->pn_code;
}
/**
* Sets the projnum code
*/
-void set_ia32_pncode(ir_node *node, pn_Cmp code) {
+void set_ia32_pncode(ir_node *node, long code)
+{
ia32_attr_t *attr = get_ia32_attr(node);
attr->pn_code = code;
}
return arch_register_get_index(attr->slots[pos]);
}
+void ia32_swap_left_right(ir_node *node)
+{
+ ir_node *left = get_irn_n(node, 2);
+ ir_node *right = get_irn_n(node, 3);
+ assert(is_ia32_commutative(node));
+ set_irn_n(node, 2, right);
+ set_irn_n(node, 3, left);
+ set_ia32_pncode(node, get_inversed_pnc(get_ia32_pncode(node)));
+}
+
/**
* Returns the OUT register at position pos.
*/
set_ia32_out_req_all(node, out_reqs);
set_ia32_latency(node, latency);
- attr->exec_units = execution_units;
+ attr->exec_units = execution_units;
+#ifndef NDEBUG
+ attr->attr_type |= IA32_ATTR_ia32_attr_t;
+#endif
attr->out_flags = NEW_ARR_D(int, obst, n_res);
memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
}
+void
+init_ia32_x87_attributes(ir_node *res)
+{
+#ifndef NDEBUG
+ ia32_attr_t *attr = get_ia32_attr(res);
+ attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
+#endif
+ ia32_current_cg->do_x87_sim = 1;
+}
+
+void
+init_ia32_asm_attributes(ir_node *res)
+{
+#ifndef NDEBUG
+ ia32_attr_t *attr = get_ia32_attr(res);
+ attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
+#endif
+}
+
+void
+init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
+ int symconst_sign, long offset)
+{
+ ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
+
+#ifndef NDEBUG
+ attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
+#endif
+ attr->symconst = symconst;
+ attr->attr.data.am_sc_sign = symconst_sign;
+ attr->offset = offset;
+}
+
ir_node *get_ia32_result_proj(const ir_node *node)
{
const ir_edge_t *edge;
if (a->data.imm_tp == ia32_ImmSymConst
&& a->cnst_val.sc != b->cnst_val.sc)
return 1;
- if(a->data.imm_tp == ia32_ImmAsm
- && a->cnst_val.asm_text != b->cnst_val.asm_text)
- return 1;
if (a->data.am_flavour != b->data.am_flavour
|| a->data.am_scale != b->data.am_scale
|| a->ls_mode != b->ls_mode)
return 1;
+ /* nodes with not yet assigned entities shouldn't be CSEd (important for
+ * unsigned int -> double conversions */
+ if(a->data.use_frame && a->frame_ent == NULL)
+ return 1;
+ if(b->data.use_frame && b->frame_ent == NULL)
+ return 1;
+
if (a->data.use_frame != b->data.use_frame
- || a->data.use_frame != b->data.use_frame
|| a->frame_ent != b->frame_ent)
return 1;
return 0;
}
+static
+int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
+{
+ const ia32_attr_t* attr_a = get_ia32_attr_const(a);
+ const ia32_attr_t* attr_b = get_ia32_attr_const(b);
+
+ return ia32_compare_attr(attr_a, attr_b);
+}
+
+static
+int ia32_compare_x87_attr(ir_node *a, ir_node *b)
+{
+ return ia32_compare_nodes_attr(a, b);
+}
+
+static
+int ia32_compare_asm_attr(ir_node *a, ir_node *b)
+{
+ const ia32_asm_attr_t *attr_a;
+ const ia32_asm_attr_t *attr_b;
+
+ if(ia32_compare_nodes_attr(a, b))
+ return 1;
+
+ attr_a = get_ia32_asm_attr_const(a);
+ attr_b = get_ia32_asm_attr_const(b);
+
+ if(attr_a->asm_text != attr_b->asm_text)
+ return 1;
+
+ return 0;
+}
+
+static
+int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
+{
+ const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
+ const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
+
+ if(attr_a->symconst != attr_b->symconst ||
+ attr_a->attr.data.am_sc_sign != attr_b->attr.data.am_sc_sign ||
+ attr_a->offset != attr_b->offset)
+ return 1;
+
+ return 0;
+}
+
/* copies the ia32 attributes */
static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
{
DUP_ARR_D(int, obst, attr_old->out_flags);
/* copy register assignments */
attr_new->slots =
- DUP_ARR_D(const arch_register_t*, obst, attr_old->slots);
+ DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
}
/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"
-
-/**
- * Registers the ia32_copy_attr function for all ia32 opcodes.
- */
-void ia32_register_copy_attr_func(void) {
- int i;
-
- for (i = get_irp_n_opcodes() - 1; i >= 0; --i) {
- ir_op *op = get_irp_opcode(i);
- if (is_ia32_op(op))
- op->ops.copy_attr = ia32_copy_attr;
- }
-}
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