* @file
* @brief Handling of ia32 specific firm opcodes.
* @author Christian Wuerdig
- * @version $Id$
*
* This file implements the creation of the architecture specific firm opcodes
* and the corresponding node constructors for the ia32 assembler irg.
#include "raw_bitset.h"
#include "xmalloc.h"
-#include "../bearch.h"
-#include "../beinfo.h"
+#include "bearch.h"
+#include "beinfo.h"
#include "bearch_ia32_t.h"
#include "ia32_common_transform.h"
#include "ia32_nodes_attr.h"
#include "ia32_new_nodes.h"
#include "gen_ia32_regalloc_if.h"
-#include "gen_ia32_machine.h"
+
+struct obstack opcodes_obst;
/**
* Dumper interface for dumping ia32 nodes in vcg.
* @param reason indicates which kind of information should be dumped
* @return 0 on success or != 0 on failure
*/
-static void ia32_dump_node(FILE *F, ir_node *n, dump_reason_t reason)
+static void ia32_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
{
ir_mode *mode = NULL;
fprintf(F, "AM Source (Load)");
break;
default:
- fprintf(F, "unknown (%d)", get_ia32_op_type(n));
+ fprintf(F, "unknown (%d)", (int)get_ia32_op_type(n));
break;
}
fprintf(F, "\n");
case ia32_am_binary: fputs("source (binary)\n", F); break;
default:
- fprintf(F, "unknown (%d)\n", get_ia32_am_support(n));
+ fprintf(F, "unknown (%d)\n", (int)get_ia32_am_support(n));
break;
}
fprintf(F, "AM scale = %u\n", get_ia32_am_scale(n));
/* dump pn code */
- if (is_ia32_SwitchJmp(n)) {
- fprintf(F, "default_pn = %ld\n", get_ia32_default_pn(n));
- } else if (is_ia32_CMovcc(n) || is_ia32_Setcc(n) || is_ia32_Jcc(n)) {
- ia32_attr_t *attr = get_ia32_attr(n);
- fprintf(F, "condition_code = 0x%X\n", get_ia32_condcode(n));
- fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted);
+ if (is_ia32_CMovcc(n) || is_ia32_Setcc(n) || is_ia32_Jcc(n)) {
+ const ia32_attr_t *attr = get_ia32_attr_const(n);
+ fprintf(F, "condition_code = 0x%X\n", (unsigned)get_ia32_condcode(n));
+ fprintf(F, "ins_permuted = %u\n", (unsigned)attr->data.ins_permuted);
}
else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
return op_attr->latency;
}
-/**
- * Returns the condition code of a node.
- */
+const ir_switch_table *get_ia32_switch_table(const ir_node *node)
+{
+ const ia32_switch_attr_t *attr = get_ia32_switch_attr_const(node);
+ return attr->table;
+}
+
ia32_condition_code_t get_ia32_condcode(const ir_node *node)
{
const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node);
attr->condition_code = code;
}
-long get_ia32_default_pn(const ir_node *node)
-{
- const ia32_switch_attr_t *attr = get_ia32_switch_attr_const(node);
- return attr->default_pn;
-}
-
/**
* Returns the condition code of a node.
*/
return attr->size;
}
-/**
- * Get the list of available execution units.
- */
-const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node)
-{
- const ia32_attr_t *attr = get_ia32_attr_const(node);
- return attr->exec_units;
-}
-
/**
* Get the exception label attribute.
*/
*/
static void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
const arch_register_req_t **in_reqs,
- const be_execution_unit_t ***execution_units,
int n_res)
{
ir_graph *irg = get_irn_irg(node);
ia32_attr_t *attr = get_ia32_attr(node);
backend_info_t *info;
- arch_irn_set_flags(node, flags);
- arch_set_in_register_reqs(node, in_reqs);
+ arch_set_irn_flags(node, flags);
+ arch_set_irn_register_reqs_in(node, in_reqs);
- attr->exec_units = execution_units;
#ifndef NDEBUG
attr->attr_type |= IA32_ATTR_ia32_attr_t;
#endif
attr->count = count;
}
-static void init_ia32_switch_attributes(ir_node *res, long default_pn)
+static void init_ia32_switch_attributes(ir_node *node,
+ const ir_switch_table *table)
{
- ia32_switch_attr_t *attr = (ia32_switch_attr_t*) get_irn_generic_attr(res);
+ unsigned n_outs = arch_get_irn_n_outs(node);
+ unsigned o;
+
+ ia32_switch_attr_t *attr = (ia32_switch_attr_t*) get_irn_generic_attr(node);
#ifndef NDEBUG
attr->attr.attr_type |= IA32_ATTR_ia32_switch_attr_t;
#endif
- attr->default_pn = default_pn;
-}
+ attr->table = table;
+ for (o = 0; o < n_outs; ++o) {
+ arch_set_irn_register_req_out(node, o, arch_no_register_req);
+ }
+}
/* default compare operation to compare attributes */
static int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b)
return 0;
}
-/** Compare node attributes for nodes with condition code. */
-static int ia32_compare_switch_attr(const ir_node *a, const ir_node *b)
-{
- const ia32_switch_attr_t *attr_a;
- const ia32_switch_attr_t *attr_b;
-
- if (ia32_compare_nodes_attr(a, b))
- return 1;
-
- attr_a = get_ia32_switch_attr_const(a);
- attr_b = get_ia32_switch_attr_const(b);
-
- if (attr_a->default_pn != attr_b->default_pn)
- return 1;
-
- return 0;
-}
-
/** Compare node attributes for call nodes. */
static int ia32_compare_call_attr(const ir_node *a, const ir_node *b)
{
{
const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn);
- return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset;
+ return hash_ptr(a->symconst) + (a->sc_sign << 16) + a->offset;
}
/** Compare node attributes for Immediates. */
new_info->flags = old_info->flags;
}
+static void ia32_init_op(ir_op *op, unsigned latency)
+{
+ ia32_op_attr_t *attr = OALLOCZ(&opcodes_obst, ia32_op_attr_t);
+ attr->latency = latency;
+ set_op_attr(op, attr);
+}
+
/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"
projects / libfirm / blobdiff