#include "config.h"
#endif
-#ifdef _WIN32
+#ifdef HAVE_MALLOC_H
#include <malloc.h>
-#else
+#endif
+
+#ifdef HAVE_ALLOCA_H
#include <alloca.h>
#endif
#include "ia32_new_nodes.h"
#include "gen_ia32_regalloc_if.h"
-#ifdef obstack_chunk_alloc
-# undef obstack_chunk_alloc
-# define obstack_chunk_alloc xmalloc
-#else
-# define obstack_chunk_alloc xmalloc
-# define obstack_chunk_free free
-#endif
-
-/***********************************************************************************
- * _ _ _ __
- * | | (_) | | / _|
- * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
- * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
- * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
- * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
- * | |
- * |_|
- ***********************************************************************************/
-
-/**
- * Prints a tarval to file F.
- * @param F output file
- * @param tv tarval
- * @param brackets 1 == print square brackets around tarval
- */
-static void fprintf_tv(FILE *F, tarval *tv, int brackets) {
- char buf[1024];
- tarval_snprintf(buf, sizeof(buf), tv);
-
- if (brackets)
- fprintf(F, "[%s]", buf);
- else
- fprintf(F, "%s", buf);
-}
-
/**
- * Returns the name of a SymConst.
- * @param symc the SymConst
- * @return name of the SymConst
+ * Returns the ident of a SymConst.
+ * @param symc The SymConst
+ * @return The ident of the SymConst
*/
-const char *get_sc_name(ir_node *symc) {
- if (get_irn_opcode(symc) != iro_SymConst)
- return "NONE";
+static ident *get_sc_ident(ir_node *symc) {
+ assert(get_irn_opcode(symc) == iro_SymConst && "need symconst to get ident");
switch (get_SymConst_kind(symc)) {
case symconst_addr_name:
- return get_id_str(get_SymConst_name(symc));
+ return get_SymConst_name(symc);
case symconst_addr_ent:
- return get_entity_ld_name(get_SymConst_entity(symc));
+ return get_entity_ld_ident(get_SymConst_entity(symc));
default:
assert(0 && "Unsupported SymConst");
return NULL;
}
+
+
+/***********************************************************************************
+ * _ _ _ __
+ * | | (_) | | / _|
+ * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
+ * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
+ * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
+ * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
+ * | |
+ * |_|
+ ***********************************************************************************/
+
/**
* Returns a string containing the names of all registers within the limited bitset
*/
}
if (reqs[i]->req.type & arch_register_req_type_should_be_same) {
- ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->pos));
+ ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->same_pos));
}
if (reqs[i]->req.type & arch_register_req_type_should_be_different) {
- ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->pos));
+ ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->different_pos));
}
fprintf(F, "\n");
static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) {
ir_mode *mode = NULL;
int bad = 0;
- int i;
- ia32_attr_t *attr;
+ int i, n_res, am_flav, flags;
const ia32_register_req_t **reqs;
const arch_register_t **slots;
case dump_node_mode_txt:
mode = get_irn_mode(n);
- if (mode == mode_BB || mode == mode_ANY || mode == mode_BAD || mode == mode_T) {
- mode = NULL;
- }
- else if (is_ia32_Load(n)) {
- mode = get_irn_mode(get_irn_n(n, 0));
- }
- else if (is_ia32_Store(n)) {
- mode = get_irn_mode(get_irn_n(n, 2));
+ if (is_ia32_Ld(n) || is_ia32_St(n)) {
+ mode = get_ia32_ls_mode(n);
}
- if (mode) {
- fprintf(F, "[%s]", get_mode_name(mode));
- }
+ fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
break;
case dump_node_nodeattr_txt:
- if (is_ia32_Call(n)) {
- fprintf(F, "&%s ", get_ia32_sc(n));
- }
- else if (get_ia32_cnst(n)) {
- char *pref = "";
-
- if (get_ia32_sc(n)) {
- pref = "SymC ";
- }
+ if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
+ char *pref = is_ia32_ImmSymConst(n) ? "SymC" : "";
+ const char *cnst = get_ia32_cnst(n);
- fprintf(F, "[%s%s]", pref, get_ia32_cnst(n));
+ fprintf(F, "[%s%s]", pref, cnst ? cnst : "NONE");
}
- if (is_ia32_AddrModeS(n) || is_ia32_AddrModeD(n)) {
- fprintf(F, "[AM] ");
+ if (! is_ia32_Lea(n)) {
+ if (is_ia32_AddrModeS(n)) {
+ fprintf(F, "[AM S] ");
+ }
+ else if (is_ia32_AddrModeD(n)) {
+ fprintf(F, "[AM D] ");
+ }
}
break;
case dump_node_info_txt:
- attr = get_ia32_attr(n);
+ n_res = get_ia32_n_res(n);
fprintf(F, "=== IA32 attr begin ===\n");
/* dump IN requirements */
}
/* dump OUT requirements */
- if (attr->n_res > 0) {
+ if (n_res > 0) {
reqs = get_ia32_out_req_all(n);
dump_reg_req(F, n, reqs, 1);
}
/* dump assigned registers */
slots = get_ia32_slots(n);
- if (slots && attr->n_res > 0) {
- for (i = 0; i < attr->n_res; i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
+ if (slots && n_res > 0) {
+ for (i = 0; i < n_res; i++) {
+ fprintf(F, "reg #%d = %s\n", i, slots[i] ? slots[i]->name : "n/a");
}
+ fprintf(F, "\n");
}
- fprintf(F, "\n");
/* dump op type */
fprintf(F, "op = ");
- switch (attr->tp) {
+ switch (get_ia32_op_type(n)) {
case ia32_Normal:
fprintf(F, "Normal");
break;
case ia32_AddrModeS:
fprintf(F, "AM Source (Load)");
break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_op_type(n));
+ break;
}
fprintf(F, "\n");
/* dump supported am */
fprintf(F, "AM support = ");
- switch (attr->am_support) {
+ switch (get_ia32_am_support(n)) {
case ia32_am_None:
fprintf(F, "none");
break;
case ia32_am_Full:
fprintf(F, "full");
break;
+ default:
+ fprintf(F, "unknown (%d)", get_ia32_am_support(n));
+ break;
}
fprintf(F, "\n");
+ /* dump am flavour */
+ fprintf(F, "AM flavour =");
+ am_flav = get_ia32_am_flavour(n);
+ if (am_flav == ia32_am_N) {
+ fprintf(F, " none");
+ }
+ else {
+ if (am_flav & ia32_O) {
+ fprintf(F, " O");
+ }
+ if (am_flav & ia32_B) {
+ fprintf(F, " B");
+ }
+ if (am_flav & ia32_I) {
+ fprintf(F, " I");
+ }
+ if (am_flav & ia32_S) {
+ fprintf(F, " S");
+ }
+ }
+ fprintf(F, " (%d)\n", am_flav);
+
/* dump AM offset */
fprintf(F, "AM offset = ");
- if (attr->am_offs) {
+ if (get_ia32_am_offs(n)) {
fprintf(F, "%s", get_ia32_am_offs(n));
}
else {
fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
/* dump pn code */
- fprintf(F, "pn_code = %d\n", get_ia32_pncode(n));
+ fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
/* dump n_res */
fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
+ /* dump use_frame */
+ fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
+
+ /* commutative */
+ fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
+
/* dump flags */
fprintf(F, "flags =");
- if (attr->flags & arch_irn_flags_dont_spill) {
- fprintf(F, " unspillable");
+ flags = get_ia32_flags(n);
+ if (flags == arch_irn_flags_none) {
+ fprintf(F, " none");
+ }
+ else {
+ if (flags & arch_irn_flags_dont_spill) {
+ fprintf(F, " unspillable");
+ }
+ if (flags & arch_irn_flags_rematerializable) {
+ fprintf(F, " remat");
+ }
+ if (flags & arch_irn_flags_ignore) {
+ fprintf(F, " ignore");
+ }
+ }
+ fprintf(F, " (%d)\n", flags);
+
+ /* dump frame entity */
+ fprintf(F, "frame entity = ");
+ if (get_ia32_frame_ent(n)) {
+ ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
+ }
+ else {
+ fprintf(F, "n/a");
}
- if (attr->flags & arch_irn_flags_rematerializable) {
- fprintf(F, " remat");
+ fprintf(F, "\n");
+
+#ifndef NDEBUG
+ /* dump original ir node name */
+ fprintf(F, "orig node = ");
+ if (get_ia32_orig_node(n)) {
+ fprintf(F, "%s", get_ia32_orig_node(n));
}
- if (attr->flags & arch_irn_flags_ignore) {
- fprintf(F, " ignore");
+ else {
+ fprintf(F, "n/a");
}
fprintf(F, "\n");
+#endif /* NDEBUG */
fprintf(F, "=== IA32 attr end ===\n");
/* end of: case dump_node_info_txt */
* |___/
***************************************************************************************************/
- static char *copy_str(char *dst, const char *src) {
- dst = xcalloc(1, strlen(src) + 1);
- strncpy(dst, src, strlen(src) + 1);
- return dst;
- }
-
- static char *set_cnst_from_tv(char *cnst, tarval *tv) {
- if (cnst) {
- free(cnst);
- }
+/**
+ * Returns an ident for the given tarval tv.
+ */
+static ident *get_ident_for_tv(tarval *tv) {
+ char buf[1024];
- cnst = xcalloc(1, 64);
- assert(tarval_snprintf(cnst, 63, tv));
- return cnst;
- }
+ assert(tarval_snprintf(buf, sizeof(buf), tv));
+ return new_id_from_str(buf);
+}
/**
* Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
*/
ia32_op_type_t get_ia32_op_type(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->tp;
+ return attr->data.tp;
}
/**
*/
void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->tp = tp;
+ attr->data.tp = tp;
+}
+
+/**
+ * Gets the immediate op type of an ia32 node.
+ */
+ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.imm_tp;
+}
+
+/**
+ * Sets the immediate op type of an ia32 node.
+ */
+void set_ia32_immop_type(ir_node *node, ia32_immop_type_t tp) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.imm_tp = tp;
}
/**
*/
ia32_am_type_t get_ia32_am_support(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->am_support;
+ return attr->data.am_support;
}
/**
* Sets the supported addrmode of an ia32 node
*/
void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->am_support = am_tp;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_support = am_tp;
}
/**
* Gets the addrmode flavour of an ia32 node
*/
-ia32_am_flavour_t get_ia32_am_support(const ir_node *node) {
+ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->am_flavour;
+ return attr->data.am_flavour;
}
/**
* Sets the addrmode flavour of an ia32 node
*/
void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->am_support = am_flavour;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_flavour = am_flavour;
}
/**
char *res = NULL;
int size;
+ if (! attr->am_offs) {
+ return NULL;
+ }
+
size = obstack_object_size(attr->am_offs);
- if (size > 0) {
- res = xcalloc(1, size + 1);
- memcpy(res, obstack_base(attr->am_offs), size);
- }
+ if (size > 0) {
+ res = xmalloc(size + 2);
+ res[0] = attr->data.offs_sign ? '-' : '+';
+ memcpy(&res[1], obstack_base(attr->am_offs), size);
+ res[size + 1] = '\0';
+ }
- res[size] = '\0';
return res;
}
static void extend_ia32_am_offs(ir_node *node, char *offset, char op) {
ia32_attr_t *attr = get_ia32_attr(node);
- if (!attr->am_offs) {
+ if (! offset || strlen(offset) < 1)
+ return;
+
+ /* offset could already have an explicit sign */
+ /* -> supersede op if necessary */
+ if (offset[0] == '-' || offset[0] == '+') {
+ if (offset[0] == '-') {
+ op = (op == '-') ? '+' : '-';
+ }
+
+ /* skip explicit sign */
+ offset++;
+ }
+
+ if (! attr->am_offs) {
/* obstack is not initialized */
attr->am_offs = xcalloc(1, sizeof(*(attr->am_offs)));
obstack_init(attr->am_offs);
+
+ attr->data.offs_sign = (op == '-') ? 1 : 0;
}
else {
- /* obstack is initialized -> there is already one offset */
- /* present -> connect the offsets with an add */
- obstack_printf(attr->am_offs, " %c ", op);
+ /* If obstack is initialized, connect the new offset with op */
+ obstack_printf(attr->am_offs, "%c", op);
}
obstack_printf(attr->am_offs, "%s", offset);
/**
* Add an offset for addrmode.
*/
-void add_ia32_am_offs(ir_node *node, char *offset) {
- extend_ia32_am_offs(node, offset, '+');
+void add_ia32_am_offs(ir_node *node, const char *offset) {
+ extend_ia32_am_offs(node, (char *)offset, '+');
}
/**
* Sub an offset for addrmode.
*/
-void sub_ia32_am_offs(ir_node *node, char *offset) {
- extend_ia32_am_offs(node, offset, '-');
+void sub_ia32_am_offs(ir_node *node, const char *offset) {
+ extend_ia32_am_offs(node, (char *)offset, '-');
+}
+
+/**
+ * Returns the symconst ident associated to addrmode.
+ */
+ident *get_ia32_am_sc(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->am_sc;
+}
+
+/**
+ * Sets the symconst ident associated to addrmode.
+ */
+void set_ia32_am_sc(ir_node *node, ident *sc) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->am_sc = sc;
+}
+
+/**
+ * Sets the sign bit for address mode symconst.
+ */
+void set_ia32_am_sc_sign(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_sc_sign = 1;
+}
+
+/**
+ * Clears the sign bit for address mode symconst.
+ */
+void clear_ia32_am_sc_sign(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_sc_sign = 0;
+}
+
+/**
+ * Returns the sign bit for address mode symconst.
+ */
+int is_ia32_am_sc_sign(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.am_sc_sign;
}
/**
*/
int get_ia32_am_scale(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->am_scale;
+ return attr->data.am_scale;
}
/**
* Sets the index register scale for addrmode.
*/
void set_ia32_am_scale(ir_node *node, int scale) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->am_scale = scale;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.am_scale = scale;
}
/**
*/
tarval *get_ia32_Immop_tarval(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->tv;
+ return attr->cnst_val.tv;
}
/**
*/
void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->tv = tv;
- attr->cnst = set_cnst_from_tv(attr->cnst, attr->tv);
+ attr->cnst_val.tv = tv;
+ attr->cnst = get_ident_for_tv(tv);
}
/**
* Return the sc attribute.
*/
-char *get_ia32_sc(const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->sc;
+ident *get_ia32_sc(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->cnst_val.sc;
}
/**
* Sets the sc attribute.
*/
-void set_ia32_sc(ir_node *node, char *sc) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->sc = copy_str(attr->sc, sc);
-
- if (attr->cnst) {
- free(attr->cnst);
- }
- attr->cnst = attr->sc;
+void set_ia32_sc(ir_node *node, ident *sc) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->cnst_val.sc = sc;
+ attr->cnst = attr->cnst_val.sc;
}
/**
* Gets the string representation of the internal const (tv or symconst)
*/
-char *get_ia32_cnst(ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- return attr->cnst;
+const char *get_ia32_cnst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ if (! attr->cnst)
+ return NULL;
+ return get_id_str(attr->cnst);
+}
+
+/**
+ * Sets the string representation of the internal const.
+ */
+void set_ia32_cnst(ir_node *node, char *cnst) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->cnst = new_id_from_str(cnst);
+}
+
+/**
+ * Gets the ident representation of the internal const (tv or symconst)
+ */
+ident *get_ia32_id_cnst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->cnst;
+}
+
+/**
+ * Sets the ident representation of the internal const.
+ */
+void set_ia32_id_cnst(ir_node *node, ident *cnst) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->cnst = cnst;
+}
+
+/**
+ * Sets the uses_frame flag.
+ */
+void set_ia32_use_frame(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.use_frame = 1;
+}
+
+/**
+ * Clears the uses_frame flag.
+ */
+void clear_ia32_use_frame(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.use_frame = 0;
+}
+
+/**
+ * Gets the uses_frame flag.
+ */
+int is_ia32_use_frame(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.use_frame;
+}
+
+/**
+ * Sets node to commutative.
+ */
+void set_ia32_commutative(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.is_commutative = 1;
+}
+
+/**
+ * Sets node to non-commutative.
+ */
+void clear_ia32_commutative(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.is_commutative = 0;
+}
+
+/**
+ * Checks if node is commutative.
+ */
+int is_ia32_commutative(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.is_commutative;
+}
+
+/**
+ * Sets node emit_cl.
+ */
+void set_ia32_emit_cl(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.emit_cl = 1;
+}
+
+/**
+ * Clears node emit_cl.
+ */
+void clear_ia32_emit_cl(ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.emit_cl = 0;
+}
+
+/**
+ * Checks if node is commutative.
+ */
+int is_ia32_emit_cl(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->data.emit_cl;
+}
+
+/**
+ * Gets the mode of the stored/loaded value (only set for Store/Load)
+ */
+ir_mode *get_ia32_ls_mode(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->ls_mode;
+}
+
+/**
+ * Sets the mode of the stored/loaded value (only set for Store/Load)
+ */
+void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->ls_mode = mode;
+}
+
+/**
+ * Gets the mode of the result.
+ */
+ir_mode *get_ia32_res_mode(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->res_mode;
+}
+
+/**
+ * Sets the mode of the result.
+ */
+void set_ia32_res_mode(ir_node *node, ir_mode *mode) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->res_mode = mode;
+}
+
+/**
+ * Gets the source mode of conversion.
+ */
+ir_mode *get_ia32_src_mode(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->src_mode;
+}
+
+/**
+ * Sets the source mode of conversion.
+ */
+void set_ia32_src_mode(ir_node *node, ir_mode *mode) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->src_mode = mode;
+}
+
+/**
+ * Gets the target mode of conversion.
+ */
+ir_mode *get_ia32_tgt_mode(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->tgt_mode;
+}
+
+/**
+ * Sets the target mode of conversion.
+ */
+void set_ia32_tgt_mode(ir_node *node, ir_mode *mode) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->tgt_mode = mode;
+}
+
+/**
+ * Gets the frame entity assigned to this node;
+ */
+entity *get_ia32_frame_ent(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->frame_ent;
+}
+
+/**
+ * Sets the frame entity for this node;
+ */
+void set_ia32_frame_ent(ir_node *node, entity *ent) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->frame_ent = ent;
}
/**
return attr->in_req;
}
+/**
+ * Sets the argument register requirements of an ia32 node.
+ */
+void set_ia32_in_req_all(ir_node *node, const ia32_register_req_t **reqs) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->in_req = reqs;
+}
+
/**
* Returns the result register requirements of an ia32 node.
*/
return attr->out_req;
}
+/**
+ * Sets the result register requirements of an ia32 node.
+ */
+void set_ia32_out_req_all(ir_node *node, const ia32_register_req_t **reqs) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->out_req = reqs;
+}
+
/**
* Returns the argument register requirement at position pos of an ia32 node.
*/
*/
arch_irn_flags_t get_ia32_flags(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->flags;
+ return attr->data.flags;
}
/**
* Sets the register flag of an ia32 node.
*/
-void set_ia32_flags(const ir_node *node, arch_irn_flags_t flags) {
+void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->flags = flags;
+ attr->data.flags = flags;
}
/**
return attr->slots;
}
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
-
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
-}
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_ia32_out_regnr(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
-
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
-}
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
- ia32_attr_t *attr = get_ia32_attr(node);
-
- assert(is_ia32_irn(node) && "Not an ia32 node.");
- assert(pos < attr->n_res && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return attr->slots[pos];
-}
-
/**
* Sets the number of results.
*/
void set_ia32_n_res(ir_node *node, int n_res) {
ia32_attr_t *attr = get_ia32_attr(node);
- attr->n_res = n_res;
+ attr->data.n_res = n_res;
}
/**
*/
int get_ia32_n_res(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->n_res;
+ return attr->data.n_res;
}
/**
*/
ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return attr->op_flav;
+ return attr->data.op_flav;
}
/**
* Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
*/
void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
- ia32_attr_t *attr = get_ia32_attr(node);
- attr->op_flav = op_flav;
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->data.op_flav = op_flav;
}
/**
attr->pn_code = code;
}
+#ifndef NDEBUG
+
+/**
+ * Returns the name of the original ir node.
+ */
+const char *get_ia32_orig_node(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return attr->orig_node;
+}
+
+/**
+ * Sets the name of the original ir node.
+ */
+void set_ia32_orig_node(ir_node *node, const char *name) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ attr->orig_node = name;
+}
+
+#endif /* NDEBUG */
/******************************************************************************************************
* _ _ _ _ __ _ _
/**
* Gets the type of an ia32_Const.
*/
-unsigned get_ia32_Const_type(ir_node *node) {
+unsigned get_ia32_Const_type(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert((is_ia32_Const(node) || is_ia32_fConst(node)) && "Need ia32_Const to get type");
+ assert(is_ia32_Cnst(node) && "Need ia32_Const to get type");
- return attr->tp;
+ return attr->data.tp;
}
/**
void set_ia32_Const_type(ir_node *node, int type) {
ia32_attr_t *attr = get_ia32_attr(node);
- assert((is_ia32_Const(node) || is_ia32_fConst(node)) && "Need ia32_Const to set type");
+ assert(is_ia32_Cnst(node) && "Need ia32_Const to set type");
assert((type == ia32_Const || type == ia32_SymConst) && "Unsupported ia32_Const type");
- attr->tp = type;
+ attr->data.tp = type;
}
/**
ia32_attr_t *na = get_ia32_attr(node);
ia32_attr_t *ca = get_ia32_attr(cnst);
- assert((is_ia32_Const(cnst) || is_ia32_fConst(cnst)) && "Need ia32_Const to set Immop attr");
-
- na->tp = ca->tp;
- na->tv = ca->tv;
-
- if (ca->sc) {
- na->sc = copy_str(na->sc, ca->sc);
+ switch(get_ia32_Const_type(cnst)) {
+ case ia32_Const:
+ na->cnst_val.tv = ca->cnst_val.tv;
+ na->cnst = ca->cnst;
+ set_ia32_immop_type(node, ia32_ImmConst);
+ break;
+ case ia32_SymConst:
+ na->cnst_val.sc = ca->cnst_val.sc;
+ na->cnst = na->cnst_val.sc;
+ set_ia32_immop_type(node, ia32_ImmSymConst);
+ break;
+ default:
+ assert(0 && "Need ia32_Const to set Immop attr");
}
- else {
- na->sc = NULL;
+}
+
+/**
+ * Copy the attributes from Immop to an Immop
+ */
+void copy_ia32_Immop_attr(ir_node *dst, ir_node *src) {
+ ia32_attr_t *da = get_ia32_attr(dst);
+ ia32_attr_t *sa = get_ia32_attr(src);
+
+ switch(get_ia32_immop_type(src)) {
+ case ia32_ImmConst:
+ da->cnst_val.tv = sa->cnst_val.tv;
+ da->cnst = sa->cnst;
+ set_ia32_immop_type(dst, ia32_ImmConst);
+ break;
+ case ia32_ImmSymConst:
+ da->cnst_val.sc = sa->cnst_val.sc;
+ da->cnst = sa->cnst;
+ set_ia32_immop_type(dst, ia32_ImmSymConst);
+ break;
+ default:
+ assert(0 && "Need Immop to copy Immop attr");
}
}
/**
- * Copy the attributes from a Const to an ia32_Const
+ * Copy the attributes from a Firm Const to an ia32_Const
*/
void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
ia32_attr_t *attr = get_ia32_attr(ia32_cnst);
- assert((is_ia32_Const(ia32_cnst) || is_ia32_fConst(ia32_cnst)) && "Need ia32_Const to set Const attr");
+ assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
switch (get_irn_opcode(cnst)) {
case iro_Const:
- attr->tp = ia32_Const;
- attr->tv = get_Const_tarval(cnst);
- attr->cnst = set_cnst_from_tv(attr->cnst, attr->tv);
+ attr->data.tp = ia32_Const;
+ attr->cnst_val.tv = get_Const_tarval(cnst);
+ attr->cnst = get_ident_for_tv(attr->cnst_val.tv);
break;
case iro_SymConst:
- attr->tp = ia32_SymConst;
- attr->tv = NULL;
- attr->sc = copy_str(attr->sc, get_sc_name(cnst));
- attr->cnst = attr->sc;
+ attr->data.tp = ia32_SymConst;
+ attr->cnst_val.sc = get_sc_ident(cnst);
+ attr->cnst = attr->cnst_val.sc;
break;
case iro_Unknown:
assert(0 && "Unknown Const NYI");
switch (direction) {
case 'D':
- attr->tp = ia32_AddrModeD;
+ attr->data.tp = ia32_AddrModeD;
break;
case 'S':
- attr->tp = ia32_AddrModeS;
+ attr->data.tp = ia32_AddrModeS;
break;
default:
assert(0 && "wrong AM type");
}
}
+/**
+ * Returns whether or not the node is an immediate operation with Const.
+ */
+int is_ia32_ImmConst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.imm_tp == ia32_ImmConst);
+}
+
+/**
+ * Returns whether or not the node is an immediate operation with SymConst.
+ */
+int is_ia32_ImmSymConst(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.imm_tp == ia32_ImmSymConst);
+}
+
/**
* Returns whether or not the node is an AddrModeS node.
*/
-int is_ia32_AddrModeS(ir_node *node) {
+int is_ia32_AddrModeS(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
- return (attr->tp == ia32_AddrModeS);
+ return (attr->data.tp == ia32_AddrModeS);
}
/**
* Returns whether or not the node is an AddrModeD node.
*/
-int is_ia32_AddrModeD(ir_node *node) {
+int is_ia32_AddrModeD(const ir_node *node) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+ return (attr->data.tp == ia32_AddrModeD);
+}
+
+/**
+ * Checks if node is a Load or fLoad/vfLoad.
+ */
+int is_ia32_Ld(const ir_node *node) {
+ return is_ia32_Load(node) || is_ia32_fLoad(node) || is_ia32_vfld(node) || is_ia32_fld(node);
+}
+
+/**
+ * Checks if node is a Store or fStore/vfStore.
+ */
+int is_ia32_St(const ir_node *node) {
+ return is_ia32_Store(node) || is_ia32_fStore(node) || is_ia32_vfst(node) || is_ia32_fst(node) || is_ia32_fstp(node);
+}
+
+/**
+ * Checks if node is a Const or fConst/vfConst.
+ */
+int is_ia32_Cnst(const ir_node *node) {
+ return is_ia32_Const(node) || is_ia32_fConst(node) || is_ia32_vfConst(node);
+}
+
+/**
+ * Returns the name of the OUT register at position pos.
+ */
+const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(is_ia32_irn(node) && "Not an ia32 node.");
+ assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return arch_register_get_name(attr->slots[pos]);
+}
+
+/**
+ * Returns the index of the OUT register at position pos within its register class.
+ */
+int get_ia32_out_regnr(const ir_node *node, int pos) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ assert(is_ia32_irn(node) && "Not an ia32 node.");
+ assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return arch_register_get_index(attr->slots[pos]);
+}
+
+/**
+ * Returns the OUT register at position pos.
+ */
+const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
ia32_attr_t *attr = get_ia32_attr(node);
- return (attr->tp == ia32_AddrModeD);
+
+ assert(is_ia32_irn(node) && "Not an ia32 node.");
+ assert(pos < attr->data.n_res && "Invalid OUT position.");
+ assert(attr->slots[pos] && "No register assigned");
+
+ return attr->slots[pos];
}
+/**
+ * Allocates num register slots for node.
+ */
+void alloc_ia32_reg_slots(ir_node *node, int num) {
+ ia32_attr_t *attr = get_ia32_attr(node);
+
+ if (num) {
+ attr->slots = (const arch_register_t **)NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(node)), num);
+ memset(attr->slots, 0, sizeof(attr->slots[0]) * num);
+ }
+ else {
+ attr->slots = NULL;
+ }
+ attr->data.n_res = num;
+}
+
+/**
+ * Initializes the nodes attributes.
+ */
+void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const ia32_register_req_t **in_reqs,
+ const ia32_register_req_t **out_reqs, int n_res)
+{
+ set_ia32_flags(node, flags);
+ set_ia32_in_req_all(node, in_reqs);
+ set_ia32_out_req_all(node, out_reqs);
+ alloc_ia32_reg_slots(node, n_res);
+}
/***************************************************************************************
* _ _ _
*
***************************************************************************************/
+/* default compare operation to compare immediate ops */
+int ia32_compare_immop_attr(ia32_attr_t *a, ia32_attr_t *b) {
+ int equ = 0;
+
+ if (a->data.tp == b->data.tp) {
+ equ = (a->cnst == b->cnst);
+ equ = equ ? (a->data.use_frame == b->data.use_frame) : 0;
+
+ if (equ && a->data.use_frame && b->data.use_frame)
+ equ = (a->frame_ent == b->frame_ent);
+ }
+
+ return !equ;
+}
+
+/* copies the ia32 attributes */
+static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
+ ia32_attr_t *attr_old = get_ia32_attr(old_node);
+ ia32_attr_t *attr_new = get_ia32_attr(new_node);
+ int n_res = get_ia32_n_res(old_node);
+
+ /* copy the attributes */
+ memcpy(attr_new, attr_old, sizeof(*attr_new));
+
+ /* copy the register slots */
+ attr_new->slots = (const arch_register_t **)NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(new_node)), n_res);
+ memcpy((void *)attr_new->slots, (void *)attr_old->slots, sizeof(attr_new->slots[0]) * n_res);
+}
+
+/**
+ * Registers the ia32_copy_attr function for all ia32 opcodes.
+ */
+void ia32_register_copy_attr_func(void) {
+ unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last();
+
+ for (i = f; i < l; i++) {
+ ir_op *op = get_irp_opcode(i);
+ op->ops.copy_attr = ia32_copy_attr;
+ }
+}
+
/* Include the generated constructor functions */
#include "gen_ia32_new_nodes.c.inl"
projects / libfirm / blobdiff