*/
static void resolve_call(ir_node *call, ir_node *l_res, ir_node *h_res, ir_graph *irg, ir_node *block) {
ir_node *res, *in[2];
+ ir_node *bad = get_irg_bad(irg);
+ ir_node *nomem = get_irg_no_mem(irg);
in[0] = l_res;
in[1] = h_res;
res = new_r_Tuple(irg, block, h_res == NULL ? 1 : 2, in);
turn_into_tuple(call, pn_Call_max);
- set_Tuple_pred(call, pn_Call_M_regular, get_irg_no_mem(irg));
- set_Tuple_pred(call, pn_Call_X_regular, new_r_Jmp(irg, block));
- set_Tuple_pred(call, pn_Call_X_except, get_irg_bad(irg));
+ set_Tuple_pred(call, pn_Call_M_regular, nomem);
+ /* Matze: the new_r_Jmp here sometimes CSEs and then bad things happen
+ * (in movgen.c from 186.crafty for example) I don't know why it is here
+ * and if this fix is correct... */
+ /*set_Tuple_pred(call, pn_Call_X_regular, new_r_Jmp(irg, block));*/
+ set_Tuple_pred(call, pn_Call_X_regular, bad);
+ set_Tuple_pred(call, pn_Call_X_except, bad);
set_Tuple_pred(call, pn_Call_T_result, res);
- set_Tuple_pred(call, pn_Call_M_except, get_irg_no_mem(irg));
- set_Tuple_pred(call, pn_Call_P_value_res_base, get_irg_bad(irg));
+ set_Tuple_pred(call, pn_Call_M_except, nomem);
+ set_Tuple_pred(call, pn_Call_P_value_res_base, bad);
}
/**
* Map an Add (a_l, a_h, b_l, b_h)
*/
static int map_Add(ir_node *call, void *ctx) {
- ir_graph *irg = current_ir_graph;
- dbg_info *dbg = get_irn_dbg_info(call);
- ir_node *block = get_nodes_block(call);
- ir_node **params = get_Call_param_arr(call);
- ir_type *method = get_Call_type(call);
- ir_node *a_l = params[BINOP_Left_Low];
- ir_node *a_h = params[BINOP_Left_High];
- ir_node *b_l = params[BINOP_Right_Low];
- ir_node *b_h = params[BINOP_Right_High];
- ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res, *add;
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbg = get_irn_dbg_info(call);
+ ir_node *block = get_nodes_block(call);
+ ir_node **params = get_Call_param_arr(call);
+ ir_type *method = get_Call_type(call);
+ ir_node *a_l = params[BINOP_Left_Low];
+ ir_node *a_h = params[BINOP_Left_High];
+ ir_node *b_l = params[BINOP_Right_Low];
+ ir_node *b_h = params[BINOP_Right_High];
+ ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
+ ir_mode *mode_flags = ia32_reg_classes[CLASS_ia32_flags].mode;
+ ir_node *add_low, *add_high, *flags;
+ ir_node *l_res, *h_res;
(void) ctx;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
/* l_res = a_l + b_l */
/* h_res = a_h + b_h + carry */
- add = new_rd_ia32_Add64Bit(dbg, irg, block, a_l, a_h, b_l, b_h);
- l_res = new_r_Proj(irg, block, add, l_mode, pn_ia32_Add64Bit_low_res);
- h_res = new_r_Proj(irg, block, add, l_mode, pn_ia32_Add64Bit_high_res);
+ add_low = new_rd_ia32_l_Add(dbg, irg, block, a_l, b_l, mode_T);
+ flags = new_r_Proj(irg, block, add_low, mode_flags, pn_ia32_flags);
+ add_high = new_rd_ia32_l_Adc(dbg, irg, block, a_h, b_h, flags, h_mode);
+
+ l_res = new_r_Proj(irg, block, add_low, l_mode, pn_ia32_res);
+ h_res = add_high;
resolve_call(call, l_res, h_res, irg, block);
return 1;
/**
* Map a Sub (a_l, a_h, b_l, b_h)
*/
-static int map_Sub(ir_node *call, void *ctx) {
- ir_graph *irg = current_ir_graph;
- dbg_info *dbg = get_irn_dbg_info(call);
- ir_node *block = get_nodes_block(call);
- ir_node **params = get_Call_param_arr(call);
- ir_type *method = get_Call_type(call);
- ir_node *a_l = params[BINOP_Left_Low];
- ir_node *a_h = params[BINOP_Left_High];
- ir_node *b_l = params[BINOP_Right_Low];
- ir_node *b_h = params[BINOP_Right_High];
- ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res, *res;
+static int map_Sub(ir_node *call, void *ctx)
+{
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbg = get_irn_dbg_info(call);
+ ir_node *block = get_nodes_block(call);
+ ir_node **params = get_Call_param_arr(call);
+ ir_type *method = get_Call_type(call);
+ ir_node *a_l = params[BINOP_Left_Low];
+ ir_node *a_h = params[BINOP_Left_High];
+ ir_node *b_l = params[BINOP_Right_Low];
+ ir_node *b_h = params[BINOP_Right_High];
+ ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
+ ir_mode *mode_flags = ia32_reg_classes[CLASS_ia32_flags].mode;
+ ir_node *sub_low, *sub_high, *flags;
+ ir_node *l_res, *h_res;
(void) ctx;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
/* l_res = a_l - b_l */
/* h_res = a_h - b_h - carry */
- res = new_rd_ia32_Sub64Bit(dbg, irg, block, a_l, a_h, b_l, b_h);
- l_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Sub64Bit_low_res);
- h_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Sub64Bit_high_res);
+ sub_low = new_rd_ia32_l_Sub(dbg, irg, block, a_l, b_l, mode_T);
+ flags = new_r_Proj(irg, block, sub_low, mode_flags, pn_ia32_flags);
+ sub_high = new_rd_ia32_l_Sbb(dbg, irg, block, a_h, b_h, flags, h_mode);
+
+ l_res = new_r_Proj(irg, block, sub_low, l_mode, pn_ia32_res);
+ h_res = sub_high;
resolve_call(call, l_res, h_res, irg, block);
return 1;
ir_node *a_h = params[BINOP_Left_High];
ir_node *cnt = params[BINOP_Right_Low];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
ir_mode *c_mode;
ir_node *l_res, *h_res, *irn, *cond, *upper, *n_block, *l1, *l2, *h1, *h2, *in[2];
(void) ctx;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
if (is_Const(cnt)) {
/* the shift count is a const, create better code */
tarval *tv = get_Const_tarval(cnt);
if (tarval_cmp(tv, new_tarval_from_long(32, l_mode)) & (pn_Cmp_Gt|pn_Cmp_Eq)) {
/* simplest case: shift only the lower bits. Note that there is no
need to reduce the constant here, this is done by the hardware. */
- h_res = new_rd_Shl(dbg, irg, block, a_l, cnt, l_mode);
+ ir_node *conv = new_rd_Conv(dbg, irg, block, a_l, h_mode);
+ h_res = new_rd_Shl(dbg, irg, block, conv, cnt, h_mode);
l_res = new_rd_Const(dbg, irg, block, l_mode, get_mode_null(l_mode));
} else {
/* h_res = SHLD a_h, a_l, cnt */
- h_res = new_rd_ia32_l_ShlD(dbg, irg, block, a_h, a_l, cnt, l_mode);
+ h_res = new_rd_ia32_l_ShlD(dbg, irg, block, a_h, a_l, cnt, h_mode);
/* l_res = SHL a_l, cnt */
l_res = new_rd_ia32_l_ShlDep(dbg, irg, block, a_l, cnt, h_res, l_mode);
upper = get_nodes_block(call);
/* h_res = SHLD a_h, a_l, cnt */
- h1 = new_rd_ia32_l_ShlD(dbg, irg, upper, a_h, a_l, cnt, l_mode);
+ h1 = new_rd_ia32_l_ShlD(dbg, irg, upper, a_h, a_l, cnt, h_mode);
/* l_res = SHL a_l, cnt */
l1 = new_rd_ia32_l_ShlDep(dbg, irg, upper, a_l, cnt, h1, l_mode);
/* the block for cnt >= 32 */
n_block = new_rd_Block(dbg, irg, 1, &in[1]);
- h2 = l1;
+ h2 = new_rd_Conv(dbg, irg, n_block, l1, h_mode);
l2 = new_r_Const(irg, n_block, l_mode, get_mode_null(l_mode));
in[1] = new_r_Jmp(irg, n_block);
in[0] = h1;
in[1] = h2;
- h_res = new_r_Phi(irg, block, 2, in, l_mode);
+ h_res = new_r_Phi(irg, block, 2, in, h_mode);
set_irn_link(l_res, h_res);
set_irn_link(h_res, NULL);
ir_node *a_h = params[BINOP_Left_High];
ir_node *cnt = params[BINOP_Right_Low];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
ir_mode *c_mode;
ir_node *l_res, *h_res, *irn, *cond, *upper, *n_block, *l1, *l2, *h1, *h2, *in[2];
(void) ctx;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
if (is_Const(cnt)) {
/* the shift count is a const, create better code */
tarval *tv = get_Const_tarval(cnt);
if (tarval_cmp(tv, new_tarval_from_long(32, l_mode)) & (pn_Cmp_Gt|pn_Cmp_Eq)) {
/* simplest case: shift only the higher bits. Note that there is no
need to reduce the constant here, this is done by the hardware. */
- h_res = new_rd_Const(dbg, irg, block, l_mode, get_mode_null(l_mode));
- l_res = new_rd_Shr(dbg, irg, block, a_h, cnt, l_mode);
+ ir_node *conv = new_rd_Conv(dbg, irg, block, a_h, l_mode);
+ h_res = new_rd_Const(dbg, irg, block, h_mode, get_mode_null(h_mode));
+ l_res = new_rd_Shr(dbg, irg, block, conv, cnt, l_mode);
} else {
/* l_res = SHRD a_h:a_l, cnt */
l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_mode);
/* h_res = SHR a_h, cnt */
- h_res = new_rd_ia32_l_ShrDep(dbg, irg, block, a_h, cnt, l_res, l_mode);
+ h_res = new_rd_ia32_l_ShrDep(dbg, irg, block, a_h, cnt, l_res, h_mode);
}
resolve_call(call, l_res, h_res, irg, block);
return 1;
l1 = new_rd_ia32_l_ShrD(dbg, irg, upper, a_l, a_h, cnt, l_mode);
/* h_res = SHR a_h, cnt */
- h1 = new_rd_ia32_l_ShrDep(dbg, irg, upper, a_h, cnt, l1, l_mode);
+ h1 = new_rd_ia32_l_ShrDep(dbg, irg, upper, a_h, cnt, l1, h_mode);
c_mode = get_irn_mode(cnt);
irn = new_r_Const_long(irg, upper, c_mode, 32);
/* the block for cnt >= 32 */
n_block = new_rd_Block(dbg, irg, 1, &in[1]);
- l2 = h1;
- h2 = new_r_Const(irg, n_block, l_mode, get_mode_null(l_mode));
+ l2 = new_rd_Conv(dbg, irg, n_block, h1, l_mode);
+ h2 = new_r_Const(irg, n_block, l_mode, get_mode_null(h_mode));
in[1] = new_r_Jmp(irg, n_block);
set_irn_in(block, 2, in);
in[0] = h1;
in[1] = h2;
- h_res = new_r_Phi(irg, block, 2, in, l_mode);
+ h_res = new_r_Phi(irg, block, 2, in, h_mode);
set_irn_link(l_res, h_res);
set_irn_link(h_res, NULL);
ir_node *a_h = params[BINOP_Left_High];
ir_node *cnt = params[BINOP_Right_Low];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
ir_mode *c_mode;
ir_node *l_res, *h_res, *irn, *cond, *upper, *n_block, *l1, *l2, *h1, *h2, *in[2];
(void) ctx;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
if (is_Const(cnt)) {
/* the shift count is a const, create better code */
tarval *tv = get_Const_tarval(cnt);
if (tarval_cmp(tv, new_tarval_from_long(32, l_mode)) & (pn_Cmp_Gt|pn_Cmp_Eq)) {
/* simplest case: shift only the higher bits. Note that there is no
need to reduce the constant here, this is done by the hardware. */
- ir_mode *c_mode = get_irn_mode(cnt);
+ ir_node *conv = new_rd_Conv(dbg, irg, block, a_h, l_mode);
+ ir_mode *c_mode = get_irn_mode(cnt);
- h_res = new_rd_Shrs(dbg, irg, block, a_h, new_r_Const_long(irg, block, c_mode, 31), l_mode);
- l_res = new_rd_Shrs(dbg, irg, block, a_h, cnt, l_mode);
+ h_res = new_rd_Shrs(dbg, irg, block, a_h, new_r_Const_long(irg, block, c_mode, 31), h_mode);
+ l_res = new_rd_Shrs(dbg, irg, block, conv, cnt, l_mode);
} else {
/* l_res = SHRD a_h:a_l, cnt */
l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_mode);
/* h_res = SAR a_h, cnt */
- h_res = new_rd_ia32_l_SarDep(dbg, irg, block, a_h, cnt, l_res, l_mode);
+ h_res = new_rd_ia32_l_SarDep(dbg, irg, block, a_h, cnt, l_res, h_mode);
}
resolve_call(call, l_res, h_res, irg, block);
return 1;
l1 = new_rd_ia32_l_ShrD(dbg, irg, upper, a_l, a_h, cnt, l_mode);
/* h_res = SAR a_h, cnt */
- h1 = new_rd_ia32_l_SarDep(dbg, irg, upper, a_h, cnt, l1, l_mode);
+ h1 = new_rd_ia32_l_SarDep(dbg, irg, upper, a_h, cnt, l1, h_mode);
c_mode = get_irn_mode(cnt);
irn = new_r_Const_long(irg, upper, c_mode, 32);
/* the block for cnt >= 32 */
n_block = new_rd_Block(dbg, irg, 1, &in[1]);
- l2 = h1;
- h2 = new_rd_Shrs(dbg, irg, n_block, a_h, new_r_Const_long(irg, block, c_mode, 31), l_mode);
+ l2 = new_rd_Conv(dbg, irg, n_block, h1, l_mode);
+ h2 = new_rd_Shrs(dbg, irg, n_block, a_h, new_r_Const_long(irg, block, c_mode, 31), h_mode);
in[1] = new_r_Jmp(irg, n_block);
set_irn_in(block, 2, in);
in[0] = h1;
in[1] = h2;
- h_res = new_r_Phi(irg, block, 2, in, l_mode);
+ h_res = new_r_Phi(irg, block, 2, in, h_mode);
set_irn_link(l_res, h_res);
set_irn_link(h_res, NULL);
return 1;
}
+static int is_sign_extend(ir_node *low, ir_node *high)
+{
+ if (is_Shrs(high)) {
+ ir_node *high_l;
+ ir_node *high_r;
+ tarval *shift_count;
+
+ high_r = get_Shrs_right(high);
+ if (!is_Const(high_r)) return 0;
+
+ shift_count = get_Const_tarval(high_r);
+ if (!tarval_is_long(shift_count)) return 0;
+ if (get_tarval_long(shift_count) != 31) return 0;
+
+ high_l = get_Shrs_left(high);
+
+ if (is_Conv(low) && get_Conv_op(low) == high_l) return 1;
+ if (is_Conv(high_l) && get_Conv_op(high_l) == low) return 1;
+ } else if (is_Const(low) && is_Const(high)) {
+ tarval *tl = get_Const_tarval(low);
+ tarval *th = get_Const_tarval(high);
+
+ if (tarval_is_long(th) && tarval_is_long(tl)) {
+ long l = get_tarval_long(tl);
+ long h = get_tarval_long(th);
+
+ return (h == 0 && l >= 0) || (h == -1 && l < 0);
+ }
+ }
+
+ return 0;
+}
+
/**
* Map a Mul (a_l, a_h, b_l, b_h)
*/
ir_node *b_l = params[BINOP_Right_Low];
ir_node *b_h = params[BINOP_Right_High];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
ir_node *l_res, *h_res, *mul, *pEDX, *add;
(void) ctx;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
/*
EDX:EAX = a_l * b_l
l_res = EAX
h_res = t2 + t3
*/
+ /* handle the often used case of 32x32=64 mul */
+ if (is_sign_extend(a_l, a_h) && is_sign_extend(b_l, b_h)) {
+ mul = new_rd_ia32_l_IMul(dbg, irg, block, a_l, b_l);
+ h_res = new_rd_Proj(dbg, irg, block, mul, h_mode, pn_ia32_l_Mul_EDX);
+ l_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EAX);
+
+ goto end;
+ }
+
mul = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_l);
- pEDX = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EDX);
+ pEDX = new_rd_Proj(dbg, irg, block, mul, h_mode, pn_ia32_l_Mul_EDX);
l_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EAX);
- mul = new_rd_Mul(dbg, irg, block, a_h, b_l, l_mode);
- add = new_rd_Add(dbg, irg, block, mul, pEDX, l_mode);
- mul = new_rd_Mul(dbg, irg, block, a_l, b_h, l_mode);
- h_res = new_rd_Add(dbg, irg, block, add, mul, l_mode);
+ b_l = new_rd_Conv(dbg, irg, block, b_l, h_mode);
+ mul = new_rd_Mul( dbg, irg, block, a_h, b_l, h_mode);
+ add = new_rd_Add( dbg, irg, block, mul, pEDX, h_mode);
+ a_l = new_rd_Conv(dbg, irg, block, a_l, h_mode);
+ mul = new_rd_Mul( dbg, irg, block, a_l, b_h, h_mode);
+ h_res = new_rd_Add( dbg, irg, block, add, mul, h_mode);
+end:
resolve_call(call, l_res, h_res, irg, block);
return 1;
ir_node *a_l = params[BINOP_Left_Low];
ir_node *a_h = params[BINOP_Left_High];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res, *cnst, *res;
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
+ ir_node *l_res, *h_res, *res;
(void) ctx;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
- /* too bad: we need 0 in a register here */
- cnst = new_Const_long(l_mode, 0);
-
- /* l_res = 0 - a_l */
- /* h_res = 0 - a_h - carry */
-
- res = new_rd_ia32_Minus64Bit(dbg, irg, block, cnst, a_l, a_h);
+ res = new_rd_ia32_Minus64Bit(dbg, irg, block, a_l, a_h);
l_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Minus64Bit_low_res);
- h_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Minus64Bit_high_res);
+ h_res = new_r_Proj(irg, block, res, h_mode, pn_ia32_Minus64Bit_high_res);
resolve_call(call, l_res, h_res, irg, block);
* Map a Abs (a_l, a_h)
*/
static int map_Abs(ir_node *call, void *ctx) {
- ir_graph *irg = current_ir_graph;
- dbg_info *dbg = get_irn_dbg_info(call);
- ir_node *block = get_nodes_block(call);
- ir_node **params = get_Call_param_arr(call);
- ir_type *method = get_Call_type(call);
- ir_node *a_l = params[BINOP_Left_Low];
- ir_node *a_h = params[BINOP_Left_High];
- ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res, *sign, *sub_l, *sub_h, *res;
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbg = get_irn_dbg_info(call);
+ ir_node *block = get_nodes_block(call);
+ ir_node **params = get_Call_param_arr(call);
+ ir_type *method = get_Call_type(call);
+ ir_node *a_l = params[BINOP_Left_Low];
+ ir_node *a_h = params[BINOP_Left_High];
+ ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
+ ir_mode *mode_flags = ia32_reg_classes[CLASS_ia32_flags].mode;
+ ir_node *l_res, *h_res, *sign, *sub_l, *sub_h;
+ ir_node *sign_l;
+ ir_node *l_sub;
+ ir_node *flags;
(void) ctx;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
/*
Code inspired by gcc output :) (although gcc doubles the
operation for t1 as t2 and uses t1 for operations with low part
*/
- sign = new_rd_ia32_l_Sar(dbg, irg, block, a_h, new_Const_long(l_mode, 31), l_mode);
- sub_l = new_rd_ia32_l_Xor(dbg, irg, block, a_l, sign, l_mode);
- sub_h = new_rd_ia32_l_Xor(dbg, irg, block, a_h, sign, l_mode);
- res = new_rd_ia32_Sub64Bit(dbg, irg, block, sub_l, sub_h, sign, sign);
- l_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Sub64Bit_low_res);
- h_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Sub64Bit_high_res);
+ /* TODO: give a hint to the backend somehow to not create a cltd here... */
+ sign = new_rd_Shrs(dbg, irg, block, a_h, new_Const_long(l_mode, 31), h_mode);
+ sign_l = new_rd_Conv(dbg, irg, block, sign, l_mode);
+ sub_l = new_rd_Eor(dbg, irg, block, a_l, sign_l, l_mode);
+ sub_h = new_rd_Eor(dbg, irg, block, a_h, sign, h_mode);
+
+ l_sub = new_rd_ia32_l_Sub(dbg, irg, block, sub_l, sign_l, mode_T);
+ l_res = new_r_Proj(irg, block, l_sub, l_mode, pn_ia32_res);
+ flags = new_r_Proj(irg, block, l_sub, mode_flags, pn_ia32_flags);
+ h_res = new_rd_ia32_l_Sbb(dbg, irg, block, sub_h, sign, flags, h_mode);
resolve_call(call, l_res, h_res, irg, block);
static int map_Div(ir_node *call, void *ctx) {
ia32_intrinsic_env_t *env = ctx;
ir_type *method = get_Call_type(call);
- ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
ir_node *ptr;
ir_entity *ent;
symconst_symbol sym;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
- if (mode_is_signed(l_mode)) {
+ if (mode_is_signed(h_mode)) {
/* 64bit signed Division */
ent = env->divdi3;
if (ent == NULL) {
set_entity_ld_ident(ent, ID("__divdi3"));
}
} else {
- /* 64bit signed Division */
+ /* 64bit unsigned Division */
ent = env->udivdi3;
if (ent == NULL) {
/* create library entity */
static int map_Mod(ir_node *call, void *ctx) {
ia32_intrinsic_env_t *env = ctx;
ir_type *method = get_Call_type(call);
- ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 0));
ir_node *ptr;
ir_entity *ent;
symconst_symbol sym;
- assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
-
- if (mode_is_signed(l_mode)) {
+ if (mode_is_signed(h_mode)) {
/* 64bit signed Modulo */
ent = env->moddi3;
if (ent == NULL) {
a_f = new_rd_ia32_l_vfist(dbg, irg, block, frame, a_f, get_irg_no_mem(irg));
set_ia32_frame_ent(a_f, ent);
set_ia32_use_frame(a_f);
- set_ia32_ls_mode(a_f, mode_D);
+ set_ia32_ls_mode(a_f, mode_Ls);
mem = a_f;
/* load low part of the result */
/* We have a Conv long long -> float here */
ir_node *a_l = params[BINOP_Left_Low];
ir_node *a_h = params[BINOP_Left_High];
- ir_mode *mode_a_l = get_irn_mode(a_l);
- ir_mode *mode_a_h = get_irn_mode(a_h);
ir_mode *fres_mode = get_type_mode(get_method_res_type(method, 0));
- assert(! mode_is_float(mode_a_l) && ! mode_is_float(mode_a_h) && "unexpected Conv call");
+ assert(! mode_is_float(get_irn_mode(a_l))
+ && ! mode_is_float(get_irn_mode(a_h)));
/* allocate memory on frame to store args */
ent = env->irg == irg ? env->ll_d_conv : NULL;