* to runtime calls.
*/
void ia32_handle_intrinsics(void) {
- if (intrinsics && ARR_LEN(intrinsics) > 0)
- lower_intrinsics(intrinsics, ARR_LEN(intrinsics));
+ if (intrinsics && ARR_LEN(intrinsics) > 0) {
+ lower_intrinsics(intrinsics, ARR_LEN(intrinsics), /*part_block_used=*/1);
+ }
}
#define BINOP_Left_Low 0
* Map an Add (a_l, a_h, b_l, b_h)
*/
static int map_Add(ir_node *call, void *ctx) {
- ir_graph *irg = current_ir_graph;
- dbg_info *dbg = get_irn_dbg_info(call);
- ir_node *block = get_nodes_block(call);
- ir_node **params = get_Call_param_arr(call);
- ir_type *method = get_Call_type(call);
- ir_node *a_l = params[BINOP_Left_Low];
- ir_node *a_h = params[BINOP_Left_High];
- ir_node *b_l = params[BINOP_Right_Low];
- ir_node *b_h = params[BINOP_Right_High];
- ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res, *add;
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbg = get_irn_dbg_info(call);
+ ir_node *block = get_nodes_block(call);
+ ir_node **params = get_Call_param_arr(call);
+ ir_type *method = get_Call_type(call);
+ ir_node *a_l = params[BINOP_Left_Low];
+ ir_node *a_h = params[BINOP_Left_High];
+ ir_node *b_l = params[BINOP_Right_Low];
+ ir_node *b_h = params[BINOP_Right_High];
+ ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
+ ir_mode *mode_flags = ia32_reg_classes[CLASS_ia32_flags].mode;
+ ir_node *add_low, *add_high, *flags;
+ ir_node *l_res, *h_res;
(void) ctx;
assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
/* l_res = a_l + b_l */
/* h_res = a_h + b_h + carry */
- add = new_rd_ia32_Add64Bit(dbg, irg, block, a_l, a_h, b_l, b_h);
- l_res = new_r_Proj(irg, block, add, l_mode, pn_ia32_Add64Bit_low_res);
- h_res = new_r_Proj(irg, block, add, l_mode, pn_ia32_Add64Bit_high_res);
+ add_low = new_rd_ia32_l_Add(dbg, irg, block, a_l, b_l, mode_T);
+ flags = new_r_Proj(irg, block, add_low, mode_flags, pn_ia32_flags);
+ add_high = new_rd_ia32_l_Adc(dbg, irg, block, a_h, b_h, flags, h_mode);
+
+ l_res = new_r_Proj(irg, block, add_low, l_mode, pn_ia32_res);
+ h_res = add_high;
resolve_call(call, l_res, h_res, irg, block);
return 1;
ir_node *a_h = params[BINOP_Left_High];
ir_node *cnt = params[BINOP_Right_Low];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res;
+ ir_mode *c_mode;
+ ir_node *l_res, *h_res, *irn, *cond, *upper, *n_block, *l1, *l2, *h1, *h2, *in[2];
(void) ctx;
assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
+ if (is_Const(cnt)) {
+ /* the shift count is a const, create better code */
+ tarval *tv = get_Const_tarval(cnt);
+
+ if (tarval_cmp(tv, new_tarval_from_long(32, l_mode)) & (pn_Cmp_Gt|pn_Cmp_Eq)) {
+ /* simplest case: shift only the lower bits. Note that there is no
+ need to reduce the constant here, this is done by the hardware. */
+ h_res = new_rd_Shl(dbg, irg, block, a_l, cnt, l_mode);
+ l_res = new_rd_Const(dbg, irg, block, l_mode, get_mode_null(l_mode));
+
+ } else {
+ /* h_res = SHLD a_h, a_l, cnt */
+ h_res = new_rd_ia32_l_ShlD(dbg, irg, block, a_h, a_l, cnt, l_mode);
+
+ /* l_res = SHL a_l, cnt */
+ l_res = new_rd_ia32_l_ShlDep(dbg, irg, block, a_l, cnt, h_res, l_mode);
+ }
+
+ resolve_call(call, l_res, h_res, irg, block);
+ return 1;
+ }
+
+ part_block(call);
+ upper = get_nodes_block(call);
+
/* h_res = SHLD a_h, a_l, cnt */
- h_res = new_rd_ia32_l_ShlD(dbg, irg, block, a_h, a_l, cnt, l_mode);
+ h1 = new_rd_ia32_l_ShlD(dbg, irg, upper, a_h, a_l, cnt, l_mode);
/* l_res = SHL a_l, cnt */
- l_res = new_rd_ia32_l_ShlDep(dbg, irg, block, a_l, cnt, h_res, l_mode);
+ l1 = new_rd_ia32_l_ShlDep(dbg, irg, upper, a_l, cnt, h1, l_mode);
+
+ c_mode = get_irn_mode(cnt);
+ irn = new_r_Const_long(irg, upper, c_mode, 32);
+ irn = new_rd_And(dbg, irg, upper, cnt, irn, c_mode);
+ irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, upper, c_mode, get_mode_null(c_mode)));
+ irn = new_r_Proj(irg, upper, irn, mode_b, pn_Cmp_Eq);
+ cond = new_rd_Cond(dbg, irg, upper, irn);
+
+ in[0] = new_r_Proj(irg, upper, cond, mode_X, pn_Cond_true);
+ in[1] = new_r_Proj(irg, upper, cond, mode_X, pn_Cond_false);
+
+ /* the block for cnt >= 32 */
+ n_block = new_rd_Block(dbg, irg, 1, &in[1]);
+ h2 = l1;
+ l2 = new_r_Const(irg, n_block, l_mode, get_mode_null(l_mode));
+ in[1] = new_r_Jmp(irg, n_block);
+
+ set_irn_in(block, 2, in);
+
+ in[0] = l1;
+ in[1] = l2;
+ l_res = new_r_Phi(irg, block, 2, in, l_mode);
+ set_irn_link(block, l_res);
+
+ in[0] = h1;
+ in[1] = h2;
+ h_res = new_r_Phi(irg, block, 2, in, l_mode);
+ set_irn_link(l_res, h_res);
+ set_irn_link(h_res, NULL);
+
+ /* move it down */
+ set_nodes_block(call, block);
+ for (irn = get_irn_link(call); irn != NULL; irn = get_irn_link(irn))
+ set_nodes_block(irn, block);
resolve_call(call, l_res, h_res, irg, block);
return 1;
ir_node *a_h = params[BINOP_Left_High];
ir_node *cnt = params[BINOP_Right_Low];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res;
+ ir_mode *c_mode;
+ ir_node *l_res, *h_res, *irn, *cond, *upper, *n_block, *l1, *l2, *h1, *h2, *in[2];
(void) ctx;
assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
+ if (is_Const(cnt)) {
+ /* the shift count is a const, create better code */
+ tarval *tv = get_Const_tarval(cnt);
+
+ if (tarval_cmp(tv, new_tarval_from_long(32, l_mode)) & (pn_Cmp_Gt|pn_Cmp_Eq)) {
+ /* simplest case: shift only the higher bits. Note that there is no
+ need to reduce the constant here, this is done by the hardware. */
+ h_res = new_rd_Const(dbg, irg, block, l_mode, get_mode_null(l_mode));
+ l_res = new_rd_Shr(dbg, irg, block, a_h, cnt, l_mode);
+ } else {
+ /* l_res = SHRD a_h:a_l, cnt */
+ l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_mode);
+
+ /* h_res = SHR a_h, cnt */
+ h_res = new_rd_ia32_l_ShrDep(dbg, irg, block, a_h, cnt, l_res, l_mode);
+ }
+ resolve_call(call, l_res, h_res, irg, block);
+ return 1;
+ }
+
+ part_block(call);
+ upper = get_nodes_block(call);
+
/* l_res = SHRD a_h:a_l, cnt */
- l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_mode);
+ l1 = new_rd_ia32_l_ShrD(dbg, irg, upper, a_l, a_h, cnt, l_mode);
/* h_res = SHR a_h, cnt */
- h_res = new_rd_ia32_l_ShrDep(dbg, irg, block, a_h, cnt, l_res, l_mode);
+ h1 = new_rd_ia32_l_ShrDep(dbg, irg, upper, a_h, cnt, l1, l_mode);
+
+ c_mode = get_irn_mode(cnt);
+ irn = new_r_Const_long(irg, upper, c_mode, 32);
+ irn = new_rd_And(dbg, irg, upper, cnt, irn, c_mode);
+ irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, upper, c_mode, get_mode_null(c_mode)));
+ irn = new_r_Proj(irg, upper, irn, mode_b, pn_Cmp_Eq);
+ cond = new_rd_Cond(dbg, irg, upper, irn);
+
+ in[0] = new_r_Proj(irg, upper, cond, mode_X, pn_Cond_true);
+ in[1] = new_r_Proj(irg, upper, cond, mode_X, pn_Cond_false);
+
+ /* the block for cnt >= 32 */
+ n_block = new_rd_Block(dbg, irg, 1, &in[1]);
+ l2 = h1;
+ h2 = new_r_Const(irg, n_block, l_mode, get_mode_null(l_mode));
+ in[1] = new_r_Jmp(irg, n_block);
+
+ set_irn_in(block, 2, in);
+
+ in[0] = l1;
+ in[1] = l2;
+ l_res = new_r_Phi(irg, block, 2, in, l_mode);
+ set_irn_link(block, l_res);
+
+ in[0] = h1;
+ in[1] = h2;
+ h_res = new_r_Phi(irg, block, 2, in, l_mode);
+ set_irn_link(l_res, h_res);
+ set_irn_link(h_res, NULL);
+
+ /* move it down */
+ set_nodes_block(call, block);
+ for (irn = get_irn_link(call); irn != NULL; irn = get_irn_link(irn))
+ set_nodes_block(irn, block);
resolve_call(call, l_res, h_res, irg, block);
return 1;
ir_node *a_h = params[BINOP_Left_High];
ir_node *cnt = params[BINOP_Right_Low];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res;
+ ir_mode *c_mode;
+ ir_node *l_res, *h_res, *irn, *cond, *upper, *n_block, *l1, *l2, *h1, *h2, *in[2];
(void) ctx;
assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
+ if (is_Const(cnt)) {
+ /* the shift count is a const, create better code */
+ tarval *tv = get_Const_tarval(cnt);
+
+ if (tarval_cmp(tv, new_tarval_from_long(32, l_mode)) & (pn_Cmp_Gt|pn_Cmp_Eq)) {
+ /* simplest case: shift only the higher bits. Note that there is no
+ need to reduce the constant here, this is done by the hardware. */
+ ir_mode *c_mode = get_irn_mode(cnt);
+
+ h_res = new_rd_Shrs(dbg, irg, block, a_h, new_r_Const_long(irg, block, c_mode, 31), l_mode);
+ l_res = new_rd_Shrs(dbg, irg, block, a_h, cnt, l_mode);
+ } else {
+ /* l_res = SHRD a_h:a_l, cnt */
+ l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_mode);
+
+ /* h_res = SAR a_h, cnt */
+ h_res = new_rd_ia32_l_SarDep(dbg, irg, block, a_h, cnt, l_res, l_mode);
+ }
+ resolve_call(call, l_res, h_res, irg, block);
+ return 1;
+ }
+
+ part_block(call);
+ upper = get_nodes_block(call);
+
/* l_res = SHRD a_h:a_l, cnt */
- l_res = new_rd_ia32_l_ShrD(dbg, irg, block, a_l, a_h, cnt, l_mode);
+ l1 = new_rd_ia32_l_ShrD(dbg, irg, upper, a_l, a_h, cnt, l_mode);
/* h_res = SAR a_h, cnt */
- h_res = new_rd_ia32_l_SarDep(dbg, irg, block, a_h, cnt, l_res, l_mode);
+ h1 = new_rd_ia32_l_SarDep(dbg, irg, upper, a_h, cnt, l1, l_mode);
+
+ c_mode = get_irn_mode(cnt);
+ irn = new_r_Const_long(irg, upper, c_mode, 32);
+ irn = new_rd_And(dbg, irg, upper, cnt, irn, c_mode);
+ irn = new_rd_Cmp(dbg, irg, upper, irn, new_r_Const(irg, upper, c_mode, get_mode_null(c_mode)));
+ irn = new_r_Proj(irg, upper, irn, mode_b, pn_Cmp_Eq);
+ cond = new_rd_Cond(dbg, irg, upper, irn);
+
+ in[0] = new_r_Proj(irg, upper, cond, mode_X, pn_Cond_true);
+ in[1] = new_r_Proj(irg, upper, cond, mode_X, pn_Cond_false);
+
+ /* the block for cnt >= 32 */
+ n_block = new_rd_Block(dbg, irg, 1, &in[1]);
+ l2 = h1;
+ h2 = new_rd_Shrs(dbg, irg, n_block, a_h, new_r_Const_long(irg, block, c_mode, 31), l_mode);
+ in[1] = new_r_Jmp(irg, n_block);
+
+ set_irn_in(block, 2, in);
+
+ in[0] = l1;
+ in[1] = l2;
+ l_res = new_r_Phi(irg, block, 2, in, l_mode);
+ set_irn_link(block, l_res);
+
+ in[0] = h1;
+ in[1] = h2;
+ h_res = new_r_Phi(irg, block, 2, in, l_mode);
+ set_irn_link(l_res, h_res);
+ set_irn_link(h_res, NULL);
+
+ /* move it down */
+ set_nodes_block(call, block);
+ for (irn = get_irn_link(call); irn != NULL; irn = get_irn_link(irn))
+ set_nodes_block(irn, block);
resolve_call(call, l_res, h_res, irg, block);
return 1;
h_res = t2 + t3
*/
+ /* handle the often used case of 32x32=64 mul */
+ if (is_Shrs(a_h) && get_Shrs_left(a_h) == a_l) {
+ ir_node *c1 = get_Shrs_right(a_h);
+
+ if (is_Const(c1)) {
+ tarval *tv = get_Const_tarval(c1);
+
+ if (tarval_is_long(tv) && get_tarval_long(tv) == 31) {
+ /* a is a sign extend */
+
+ if (is_Shrs(b_h) && get_Shrs_left(b_h) == b_l && c1 == get_Shrs_right(b_h)) {
+ /* b is a sign extend: it's a 32 * 32 = 64 signed multiplication */
+ mul = new_rd_ia32_l_IMul(dbg, irg, block, a_l, b_l);
+ h_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EDX);
+ l_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EAX);
+
+ goto end;
+ }
+ /* we rely here on Consts being on the right site */
+ if (is_Const(b_h) && is_Const(b_l)) {
+ tarval *th = get_Const_tarval(b_h);
+ tarval *tl = get_Const_tarval(b_l);
+
+ if (tarval_is_long(th) && tarval_is_long(tl)) {
+ long h = get_tarval_long(th);
+ long l = get_tarval_long(tl);
+
+ if ((h == 0 && l >= 0) || (h == -1 && l < 0)) {
+ /* b is a sign extended const */
+ mul = new_rd_ia32_l_IMul(dbg, irg, block, a_l, b_l);
+ h_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EDX);
+ l_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EAX);
+
+ goto end;
+ }
+ }
+ }
+ }
+ }
+
+ }
+
mul = new_rd_ia32_l_Mul(dbg, irg, block, a_l, b_l);
pEDX = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EDX);
l_res = new_rd_Proj(dbg, irg, block, mul, l_mode, pn_ia32_l_Mul_EAX);
mul = new_rd_Mul(dbg, irg, block, a_l, b_h, l_mode);
h_res = new_rd_Add(dbg, irg, block, add, mul, l_mode);
+end:
resolve_call(call, l_res, h_res, irg, block);
return 1;
ir_node *a_l = params[BINOP_Left_Low];
ir_node *a_h = params[BINOP_Left_High];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
- ir_node *l_res, *h_res, *cnst, *res;
+ ir_node *l_res, *h_res, *res;
(void) ctx;
assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
- /* too bad: we need 0 in a register here */
- cnst = new_Const_long(l_mode, 0);
-
- /* l_res = 0 - a_l */
- /* h_res = 0 - a_h - carry */
-
- res = new_rd_ia32_Minus64Bit(dbg, irg, block, cnst, a_l, a_h);
+ res = new_rd_ia32_Minus64Bit(dbg, irg, block, a_l, a_h);
l_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Minus64Bit_low_res);
h_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Minus64Bit_high_res);
*/
- sign = new_rd_ia32_l_Sar(dbg, irg, block, a_h, new_Const_long(l_mode, 31), l_mode);
- sub_l = new_rd_ia32_l_Xor(dbg, irg, block, a_l, sign, l_mode);
- sub_h = new_rd_ia32_l_Xor(dbg, irg, block, a_h, sign, l_mode);
+ /* TODO: give a hint to the backend somehow to not create a cltd here... */
+ sign = new_rd_Shrs(dbg, irg, block, a_h, new_Const_long(l_mode, 31), l_mode);
+ sub_l = new_rd_Eor(dbg, irg, block, a_l, sign, l_mode);
+ sub_h = new_rd_Eor(dbg, irg, block, a_h, sign, l_mode);
res = new_rd_ia32_Sub64Bit(dbg, irg, block, sub_l, sub_h, sign, sign);
l_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Sub64Bit_low_res);
h_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Sub64Bit_high_res);
a_f = new_rd_ia32_l_vfist(dbg, irg, block, frame, a_f, get_irg_no_mem(irg));
set_ia32_frame_ent(a_f, ent);
set_ia32_use_frame(a_f);
- set_ia32_ls_mode(a_f, mode_D);
+ set_ia32_ls_mode(a_f, mode_Ls);
mem = a_f;
/* load low part of the result */
projects / libfirm / blobdiff