+/*
+ * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
/**
* @file
* @brief Handles fpu rounding modes
#include "array.h"
#include "../beirgmod.h"
-#include "../bearch.h"
+#include "../bearch_t.h"
#include "../besched.h"
#include "../beabi.h"
#include "../benode_t.h"
#include "../bestate.h"
#include "../beutil.h"
#include "../bessaconstr.h"
+#include "../beirg_t.h"
static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force,
ir_node *after)
spill = new_rd_ia32_FnstCW(NULL, irg, block, frame, noreg, state,
nomem);
- set_ia32_am_support(spill, ia32_am_Dest);
set_ia32_op_type(spill, ia32_AddrModeD);
set_ia32_am_flavour(spill, ia32_B);
set_ia32_ls_mode(spill, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
if(spill != NULL) {
reload = new_rd_ia32_FldCW(NULL, irg, block, frame, noreg, spill);
- set_ia32_am_support(reload, ia32_am_Source);
set_ia32_op_type(reload, ia32_AddrModeS);
set_ia32_am_flavour(reload, ia32_B);
set_ia32_ls_mode(reload, ia32_reg_classes[CLASS_ia32_fp_cw].mode);
assert(last_state != NULL);
cwstore = new_rd_ia32_FnstCW(NULL, irg, block, frame, noreg, last_state,
nomem);
- set_ia32_am_support(cwstore, ia32_am_Dest);
set_ia32_op_type(cwstore, ia32_AddrModeD);
set_ia32_am_flavour(cwstore, ia32_B);
set_ia32_ls_mode(cwstore, lsmode);
sched_add_before(before, cwstore);
load = new_rd_ia32_Load(NULL, irg, block, frame, noreg, cwstore);
- set_ia32_am_support(load, ia32_am_Source);
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_flavour(load, ia32_B);
set_ia32_ls_mode(load, lsmode);
sched_add_before(before, load);
load_res = new_r_Proj(irg, block, load, mode_Iu, pn_ia32_Load_res);
- sched_add_before(before, load_res);
/* TODO: make the actual mode configurable in ChangeCW... */
or = new_rd_ia32_Or(NULL, irg, block, noreg, noreg, load_res, noreg,
sched_add_before(before, or);
store = new_rd_ia32_Store(NULL, irg, block, frame, noreg, or, nomem);
- set_ia32_am_support(store, ia32_am_Dest);
set_ia32_op_type(store, ia32_AddrModeD);
set_ia32_am_flavour(store, ia32_B);
set_ia32_ls_mode(store, lsmode);
sched_add_before(before, store);
fldcw = new_rd_ia32_FldCW(NULL, irg, block, frame, noreg, store);
- set_ia32_am_support(fldcw, ia32_am_Source);
set_ia32_op_type(fldcw, ia32_AddrModeS);
set_ia32_am_flavour(fldcw, ia32_B);
set_ia32_ls_mode(fldcw, lsmode);
int i, len;
/* do ssa construction for the fpu modes */
- env.arch_env = birg->main_env->arch_env;
+ env.arch_env = be_get_birg_arch_env(birg);
env.state_nodes = NEW_ARR_F(ir_node*, 0);
irg_walk_graph(irg, collect_fpu_mode_nodes_walker, NULL, &env);
for(i = 0; i < len; ++i) {
be_liveness_update(lv, env.state_nodes[i]);
}
+ } else {
+ be_liveness_invalidate(birg->lv);
}
/* set registers for the phis */
}
be_ssa_construction_destroy(&senv);
DEL_ARR_F(env.state_nodes);
+
+ be_liveness_invalidate(be_get_birg_liveness(birg));
}
void ia32_setup_fpu_mode(ia32_code_gen_t *cg)