in2 = get_irn_n(irn, n_ia32_binary_right);
in1_reg = arch_get_irn_register(in1);
in2_reg = arch_get_irn_register(in2);
- out_reg = get_ia32_out_reg(irn, 0);
+ out_reg = arch_irn_get_register(irn, 0);
irg = cg->irg;
block = get_nodes_block(irn);
set_irn_mode(res, get_irn_mode(irn));
- SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(cg, irn));
+ SET_IA32_ORIG_NODE(res, irn);
/* remove the old sub */
sched_remove(irn);
DBG_OPT_SUB2NEGADD(irn, res);
}
-static INLINE int need_constraint_copy(ir_node *irn)
+static inline int need_constraint_copy(ir_node *irn)
{
/* TODO this should be determined from the node specification */
switch (get_ia32_irn_opcode(irn)) {
ir_node *in_node, *block;
reqs = get_ia32_out_req_all(node);
- n_res = get_ia32_n_res(node);
+ n_res = arch_irn_get_n_outs(node);
block = get_nodes_block(node);
/* check all OUT requirements, if there is a should_be_same */
same_pos = get_first_same(req);
/* get in and out register */
- out_reg = get_ia32_out_reg(node, i);
+ out_reg = arch_irn_get_register(node, i);
in_node = get_irn_n(node, same_pos);
in_reg = arch_get_irn_register(in_node);
return;
reqs = get_ia32_out_req_all(irn);
- n_res = get_ia32_n_res(irn);
+ n_res = arch_irn_get_n_outs(irn);
for (i = 0; i < n_res; i++) {
const arch_register_t *out_reg;
continue;
/* get in and out register */
- out_reg = get_ia32_out_reg(irn, i);
+ out_reg = arch_irn_get_register(irn, i);
same_pos = get_first_same(reqs[i]);
same_node = get_irn_n(irn, same_pos);
same_reg = arch_get_irn_register(same_node);