* @author Christian Wuerdig
* @version $Id$
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include "irnode.h"
#include "ircons.h"
nomem = new_rd_NoMem(cg->irg);
in1 = get_irn_n(irn, n_ia32_binary_left);
in2 = get_irn_n(irn, n_ia32_binary_right);
- in1_reg = arch_get_irn_register(cg->arch_env, in1);
- in2_reg = arch_get_irn_register(cg->arch_env, in2);
+ in1_reg = arch_get_irn_register(in1);
+ in2_reg = arch_get_irn_register(in2);
out_reg = get_ia32_out_reg(irn, 0);
irg = cg->irg;
set_ia32_op_type(res, ia32_AddrModeS);
set_ia32_ls_mode(res, op_mode);
- arch_set_irn_register(cg->arch_env, res, in2_reg);
+ arch_set_irn_register(res, in2_reg);
/* add to schedule */
sched_add_before(irn, res);
if (flags_proj == NULL) {
res = new_rd_ia32_Neg(dbg, irg, block, in2);
- arch_set_irn_register(cg->arch_env, res, in2_reg);
+ arch_set_irn_register(res, in2_reg);
/* add to schedule */
sched_add_before(irn, res);
/* generate the add */
res = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, nomem, res, in1);
- arch_set_irn_register(cg->arch_env, res, out_reg);
+ arch_set_irn_register(res, out_reg);
set_ia32_commutative(res);
/* exchange the add and the sub */
* a + -b = a + (~b + 1) would set the carry flag IF a == b ...
*/
not = new_rd_ia32_Not(dbg, irg, block, in2);
- arch_set_irn_register(cg->arch_env, not, in2_reg);
+ arch_set_irn_register(not, in2_reg);
sched_add_before(irn, not);
stc = new_rd_ia32_Stc(dbg, irg, block);
- arch_set_irn_register(cg->arch_env, stc,
- &ia32_flags_regs[REG_EFLAGS]);
+ arch_set_irn_register(stc, &ia32_flags_regs[REG_EFLAGS]);
sched_add_before(irn, stc);
adc = new_rd_ia32_Adc(dbg, irg, block, noreg, noreg, nomem, not,
in1, stc);
- arch_set_irn_register(cg->arch_env, adc, out_reg);
+ arch_set_irn_register(adc, out_reg);
sched_add_before(irn, adc);
set_irn_mode(adc, mode_T);
adc_flags = new_r_Proj(irg, block, adc, mode_Iu, pn_ia32_Adc_flags);
- arch_set_irn_register(cg->arch_env, adc_flags,
- &ia32_flags_regs[REG_EFLAGS]);
+ arch_set_irn_register(adc_flags, &ia32_flags_regs[REG_EFLAGS]);
cmc = new_rd_ia32_Cmc(dbg, irg, block, adc_flags);
- arch_set_irn_register(cg->arch_env, cmc,
- &ia32_flags_regs[REG_EFLAGS]);
+ arch_set_irn_register(cmc, &ia32_flags_regs[REG_EFLAGS]);
sched_add_before(irn, cmc);
exchange(flags_proj, cmc);
}
}
+ set_irn_mode(res, get_irn_mode(irn));
+
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(cg, irn));
/* remove the old sub */
DBG_OPT_SUB2NEGADD(irn, res);
}
-static INLINE int need_constraint_copy(ir_node *irn)
+static inline int need_constraint_copy(ir_node *irn)
{
/* TODO this should be determined from the node specification */
switch (get_ia32_irn_opcode(irn)) {
ir_node *node)
{
ir_graph *irg = cg->irg;
- const arch_env_t *arch_env = cg->arch_env;
const arch_register_req_t **reqs;
const arch_register_t *out_reg, *in_reg;
int n_res, i;
/* get in and out register */
out_reg = get_ia32_out_reg(node, i);
in_node = get_irn_n(node, same_pos);
- in_reg = arch_get_irn_register(arch_env, in_node);
+ in_reg = arch_get_irn_register(in_node);
/* requirement already fulfilled? */
if (in_reg == out_reg)
if (!mode_is_data(get_irn_mode(in)))
continue;
- in_reg = arch_get_irn_register(arch_env, in);
+ in_reg = arch_get_irn_register(in);
if (in_reg != out_reg)
continue;
DBG_OPT_2ADDRCPY(copy);
/* destination is the out register */
- arch_set_irn_register(arch_env, copy, out_reg);
+ arch_set_irn_register(copy, out_reg);
/* insert copy before the node into the schedule */
sched_add_before(node, copy);
perm_proj0 = new_r_Proj(irg, block, perm, get_irn_mode(in[0]), 0);
perm_proj1 = new_r_Proj(irg, block, perm, get_irn_mode(in[1]), 1);
- arch_set_irn_register(arch_env, perm_proj0, out_reg);
- arch_set_irn_register(arch_env, perm_proj1, in_reg);
+ arch_set_irn_register(perm_proj0, out_reg);
+ arch_set_irn_register(perm_proj1, in_reg);
sched_add_before(node, perm);
* register -> base or index is broken then.
* Solution: Turn back this address mode into explicit Load + Operation.
*/
-static void fix_am_source(ir_node *irn, void *env)
+static void fix_am_source(ir_node *irn)
{
- ia32_code_gen_t *cg = env;
- const arch_env_t *arch_env = cg->arch_env;
const arch_register_req_t **reqs;
int n_res, i;
out_reg = get_ia32_out_reg(irn, i);
same_pos = get_first_same(reqs[i]);
same_node = get_irn_n(irn, same_pos);
- same_reg = arch_get_irn_register(arch_env, same_node);
+ same_reg = arch_get_irn_register(same_node);
/* should_be same constraint is fullfilled, nothing to do */
if (out_reg == same_reg)
/* we only need to do something if the out reg is the same as base
or index register */
- if (out_reg != arch_get_irn_register(arch_env, get_irn_n(irn, n_ia32_base)) &&
- out_reg != arch_get_irn_register(arch_env, get_irn_n(irn, n_ia32_index)))
+ if (out_reg != arch_get_irn_register(get_irn_n(irn, n_ia32_base)) &&
+ out_reg != arch_get_irn_register(get_irn_n(irn, n_ia32_index)))
continue;
load_res = turn_back_am(irn);
- arch_set_irn_register(cg->arch_env, load_res, out_reg);
+ arch_set_irn_register(load_res, out_reg);
DBG((dbg, LEVEL_3,
"irg %+F: build back AM source for node %+F, inserted load %+F\n",
- cg->irg, irn, get_Proj_pred(load_res)));
+ get_irn_irg(irn), irn, get_Proj_pred(load_res)));
break;
}
}
/* first: turn back AM source if necessary */
for (irn = sched_first(block); ! sched_is_end(irn); irn = next) {
next = sched_next(irn);
- fix_am_source(irn, env);
+ fix_am_source(irn);
}
for (irn = sched_first(block); ! sched_is_end(irn); irn = next) {
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