* $Id$
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
#include "irnode.h"
#include "ircons.h"
#include "irgmod.h"
const arch_register_t *in1_reg, *in2_reg, *out_reg, **slots;
/* Return if AM node or not a Sub or xSub */
- if (get_ia32_op_type(irn) != ia32_Normal || !(is_ia32_Sub(irn) || is_ia32_xSub(irn)))
+ if (!(is_ia32_Sub(irn) || is_ia32_xSub(irn)) || get_ia32_op_type(irn) != ia32_Normal)
return;
noreg = ia32_new_NoReg_gp(cg);
int imm = 0;
ir_node *res = NULL;
ir_node *nomem, *noreg, *base, *index, *op1, *op2;
- char *offs;
+ const char *offs = NULL;
ia32_transform_env_t tenv;
const arch_register_t *out_reg, *base_reg, *index_reg;
+ int imm_tp = ia32_ImmConst;
/* must be a LEA */
if (! is_ia32_Lea(irn))
base = get_irn_n(irn, 0);
index = get_irn_n(irn,1);
- offs = get_ia32_am_offs(irn);
+ if (am_flav & ia32_O) {
+ offs = get_ia32_am_offs(irn);
+
+ if (! offs) {
+ ident *id = get_ia32_am_sc(irn);
- /* offset has a explicit sign -> we need to skip + */
- if (offs && offs[0] == '+')
- offs++;
+ assert(id != NULL);
+ offs = get_id_str(id);
+ imm_tp = ia32_ImmSymConst;
+ }
+ /* offset has a explicit sign -> we need to skip + */
+ else if (offs[0] == '+')
+ offs++;
+ }
out_reg = arch_get_irn_register(cg->arch_env, irn);
base_reg = arch_get_irn_register(cg->arch_env, base);
if (imm) {
set_ia32_cnst(res, offs);
- set_ia32_immop_type(res, ia32_ImmConst);
+ set_ia32_immop_type(res, imm_tp);
}
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(cg, irn));
we have to change it, as CMP doesn't support immediate
as left operands.
*/
+#if 0
if ((is_ia32_CondJmp(irn) || is_ia32_CmpSet(irn) || is_ia32_xCmpSet(irn)) &&
(is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn)) &&
op_tp == ia32_AddrModeS)
set_ia32_op_type(irn, ia32_AddrModeD);
set_ia32_pncode(irn, get_inversed_pnc(get_ia32_pncode(irn)));
}
+#endif
}
end: ;
}
/* check only ia32 nodes with source address mode */
if (! is_ia32_irn(irn) || get_ia32_op_type(irn) != ia32_AddrModeS)
return;
+ /* no need to fix unary operations */
+ if (get_irn_arity(irn) == 4)
+ return;
base = get_irn_n(irn, 0);
index = get_irn_n(irn, 1);
for (irn = sched_first(block); ! sched_is_end(irn); irn = next) {
ia32_code_gen_t *cg = env;
- next = sched_next(irn);
- if (is_ia32_irn(irn)) {
- /* check if there is a sub which need to be transformed */
- ia32_transform_sub_to_neg_add(irn, cg);
+ next = sched_next(irn);
- /* transform a LEA into an Add if possible */
- ia32_transform_lea_to_add(irn, cg);
+ /* check if there is a sub which need to be transformed */
+ ia32_transform_sub_to_neg_add(irn, cg);
- /* check for peephole optimization */
- ia32_peephole_optimization(irn, cg);
- }
+ /* transform a LEA into an Add if possible */
+ ia32_transform_lea_to_add(irn, cg);
}
/* second: insert copies and finish irg */