* @file
* @brief This file implements functions to finalize the irg for emit.
* @author Christian Wuerdig
- * @version $Id$
*/
#include "config.h"
#include "pdeq.h"
#include "error.h"
-#include "../bearch.h"
-#include "../besched.h"
-#include "../benode.h"
+#include "bearch.h"
+#include "besched.h"
+#include "benode.h"
#include "bearch_ia32_t.h"
#include "ia32_finish.h"
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
-COMPILETIME_ASSERT((int)pn_ia32_Sub_res == pn_ia32_Sbb_res, pn_ia32_Sub_res);
-COMPILETIME_ASSERT((int)pn_ia32_Sub_flags == pn_ia32_Sbb_flags, pn_ia32_Sub_flags);
-
/**
* Transforms a Sub or xSub into Neg--Add iff OUT_REG != SRC1_REG && OUT_REG == SRC2_REG.
* THIS FUNCTIONS MUST BE CALLED AFTER REGISTER ALLOCATION.
in2 = get_irn_n(irn, n_ia32_binary_right);
in1_reg = arch_get_irn_register(in1);
in2_reg = arch_get_irn_register(in2);
- out_reg = arch_irn_get_register(irn, 0);
+ out_reg = arch_get_irn_register_out(irn, 0);
if (out_reg == in1_reg)
return;
/* generate the add */
res = new_bd_ia32_xAdd(dbgi, block, noreg, noreg, nomem, res, in1);
set_ia32_ls_mode(res, get_ia32_ls_mode(irn));
-
- /* exchange the add and the sub */
- edges_reroute(irn, res);
-
- /* add to schedule */
- sched_add_before(irn, res);
} else {
- ir_node *res_proj = NULL;
- ir_node *flags_proj = NULL;
- ir_node *carry;
- const ir_edge_t *edge;
+ ir_node *flags_proj = NULL;
+ ir_node *carry;
if (get_irn_mode(irn) == mode_T) {
/* collect the Proj uses */
foreach_out_edge(irn, edge) {
ir_node *proj = get_edge_src_irn(edge);
long pn = get_Proj_proj(proj);
- if (pn == pn_ia32_Sub_res) {
- assert(res_proj == NULL);
- res_proj = proj;
- } else {
- assert(pn == pn_ia32_Sub_flags);
+ if (pn == pn_ia32_flags) {
assert(flags_proj == NULL);
flags_proj = proj;
+ break;
}
}
}
adc = new_bd_ia32_Adc(dbgi, block, noreg, noreg, nomem, nnot, in1, carry);
arch_set_irn_register(adc, out_reg);
- sched_add_before(irn, adc);
-
- set_irn_mode(adc, mode_T);
- adc_flags = new_r_Proj(adc, mode_Iu, pn_ia32_Adc_flags);
- arch_set_irn_register(adc_flags, &ia32_registers[REG_EFLAGS]);
+ set_ia32_commutative(adc);
if (flags_proj != NULL) {
+ set_irn_mode(adc, mode_T);
+ adc_flags = new_r_Proj(adc, mode_Iu, pn_ia32_Adc_flags);
+ arch_set_irn_register(adc_flags, &ia32_registers[REG_EFLAGS]);
+
cmc = new_bd_ia32_Cmc(dbgi, block, adc_flags);
arch_set_irn_register(cmc, &ia32_registers[REG_EFLAGS]);
- sched_add_before(irn, cmc);
+ sched_add_after(irn, cmc);
exchange(flags_proj, cmc);
}
- if (res_proj != NULL) {
- set_Proj_pred(res_proj, adc);
- set_Proj_proj(res_proj, pn_ia32_Adc_res);
- }
-
res = adc;
} else {
res = new_bd_ia32_Neg(dbgi, block, in2);
res = new_bd_ia32_Add(dbgi, block, noreg, noreg, nomem, res, in1);
arch_set_irn_register(res, out_reg);
set_ia32_commutative(res);
-
- /* exchange the add and the sub */
- edges_reroute(irn, res);
-
- /* add to schedule */
- sched_add_before(irn, res);
}
}
+ /* exchange the add and the sub */
+ edges_reroute(irn, res);
+ sched_add_before(irn, res);
+
set_irn_mode(res, get_irn_mode(irn));
SET_IA32_ORIG_NODE(res, irn);
case iro_ia32_Conv_I2I:
case iro_ia32_Conv_I2I8Bit:
case iro_ia32_CMovcc:
+ case iro_ia32_Minus64Bit:
return 0;
default:
int n_res, i;
ir_node *in_node, *block;
- n_res = arch_irn_get_n_outs(node);
+ n_res = arch_get_irn_n_outs(node);
block = get_nodes_block(node);
/* check all OUT requirements, if there is a should_be_same */
int i2, arity;
int same_pos;
ir_node *uses_out_reg;
- const arch_register_req_t *req = arch_get_out_register_req(node, i);
- const arch_register_class_t *cls;
+ const arch_register_req_t *req = arch_get_irn_register_req_out(node, i);
int uses_out_reg_pos;
if (!arch_register_req_is(req, should_be_same))
same_pos = get_first_same(req);
/* get in and out register */
- out_reg = arch_irn_get_register(node, i);
+ out_reg = arch_get_irn_register_out(node, i);
in_node = get_irn_n(node, same_pos);
in_reg = arch_get_irn_register(in_node);
/* requirement already fulfilled? */
if (in_reg == out_reg)
continue;
- cls = arch_register_get_class(in_reg);
- assert(cls == arch_register_get_class(out_reg));
+ assert(in_reg->reg_class == out_reg->reg_class);
/* check if any other input operands uses the out register */
arity = get_irn_arity(node);
* (the register can't be live since the operation will override it
* anyway) */
if (uses_out_reg == NULL) {
- ir_node *copy = be_new_Copy(cls, block, in_node);
+ ir_node *copy = be_new_Copy(block, in_node);
DBG_OPT_2ADDRCPY(copy);
/* destination is the out register */
if (get_ia32_am_support(irn) != ia32_am_binary)
return;
- n_res = arch_irn_get_n_outs(irn);
+ n_res = arch_get_irn_n_outs(irn);
for (i = 0; i < n_res; i++) {
- const arch_register_req_t *req = arch_get_out_register_req(irn, i);
+ const arch_register_req_t *req = arch_get_irn_register_req_out(irn, i);
const arch_register_t *out_reg;
int same_pos;
ir_node *same_node;
continue;
/* get in and out register */
- out_reg = arch_irn_get_register(irn, i);
+ out_reg = arch_get_irn_register_out(irn, i);
same_pos = get_first_same(req);
same_node = get_irn_n(irn, same_pos);
same_reg = arch_get_irn_register(same_node);
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