noreg = ia32_new_NoReg_gp(cg);
noreg_fp = ia32_new_NoReg_xmm(cg);
- nomem = new_rd_NoMem(cg->irg);
+ nomem = new_NoMem();
in1 = get_irn_n(irn, n_ia32_binary_left);
in2 = get_irn_n(irn, n_ia32_binary_right);
in1_reg = arch_get_irn_register(in1);
in2_reg = arch_get_irn_register(in2);
- out_reg = get_ia32_out_reg(irn, 0);
+ out_reg = arch_irn_get_register(irn, 0);
irg = cg->irg;
block = get_nodes_block(irn);
assert(get_irn_mode(irn) != mode_T);
- res = new_rd_ia32_xXor(dbg, irg, block, noreg, noreg, nomem, in2, noreg_fp);
+ res = new_bd_ia32_xXor(dbg, block, noreg, noreg, nomem, in2, noreg_fp);
size = get_mode_size_bits(op_mode);
entity = ia32_gen_fp_known_const(size == 32 ? ia32_SSIGN : ia32_DSIGN);
set_ia32_am_sc(res, entity);
sched_add_before(irn, res);
/* generate the add */
- res = new_rd_ia32_xAdd(dbg, irg, block, noreg, noreg, nomem, res, in1);
+ res = new_bd_ia32_xAdd(dbg, block, noreg, noreg, nomem, res, in1);
set_ia32_ls_mode(res, get_ia32_ls_mode(irn));
/* exchange the add and the sub */
}
if (flags_proj == NULL) {
- res = new_rd_ia32_Neg(dbg, irg, block, in2);
+ res = new_bd_ia32_Neg(dbg, block, in2);
arch_set_irn_register(res, in2_reg);
/* add to schedule */
sched_add_before(irn, res);
/* generate the add */
- res = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, nomem, res, in1);
+ res = new_bd_ia32_Add(dbg, block, noreg, noreg, nomem, res, in1);
arch_set_irn_register(res, out_reg);
set_ia32_commutative(res);
*
* a + -b = a + (~b + 1) would set the carry flag IF a == b ...
*/
- not = new_rd_ia32_Not(dbg, irg, block, in2);
+ not = new_bd_ia32_Not(dbg, block, in2);
arch_set_irn_register(not, in2_reg);
sched_add_before(irn, not);
- stc = new_rd_ia32_Stc(dbg, irg, block);
+ stc = new_bd_ia32_Stc(dbg, block);
arch_set_irn_register(stc, &ia32_flags_regs[REG_EFLAGS]);
sched_add_before(irn, stc);
- adc = new_rd_ia32_Adc(dbg, irg, block, noreg, noreg, nomem, not,
- in1, stc);
+ adc = new_bd_ia32_Adc(dbg, block, noreg, noreg, nomem, not, in1, stc);
arch_set_irn_register(adc, out_reg);
sched_add_before(irn, adc);
adc_flags = new_r_Proj(irg, block, adc, mode_Iu, pn_ia32_Adc_flags);
arch_set_irn_register(adc_flags, &ia32_flags_regs[REG_EFLAGS]);
- cmc = new_rd_ia32_Cmc(dbg, irg, block, adc_flags);
+ cmc = new_bd_ia32_Cmc(dbg, block, adc_flags);
arch_set_irn_register(cmc, &ia32_flags_regs[REG_EFLAGS]);
sched_add_before(irn, cmc);
set_irn_mode(res, get_irn_mode(irn));
- SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(cg, irn));
+ SET_IA32_ORIG_NODE(res, irn);
/* remove the old sub */
sched_remove(irn);
ir_node *in_node, *block;
reqs = get_ia32_out_req_all(node);
- n_res = get_ia32_n_res(node);
+ n_res = arch_irn_get_n_outs(node);
block = get_nodes_block(node);
/* check all OUT requirements, if there is a should_be_same */
same_pos = get_first_same(req);
/* get in and out register */
- out_reg = get_ia32_out_reg(node, i);
+ out_reg = arch_irn_get_register(node, i);
in_node = get_irn_n(node, same_pos);
in_reg = arch_get_irn_register(in_node);
return;
reqs = get_ia32_out_req_all(irn);
- n_res = get_ia32_n_res(irn);
+ n_res = arch_irn_get_n_outs(irn);
for (i = 0; i < n_res; i++) {
const arch_register_t *out_reg;
continue;
/* get in and out register */
- out_reg = get_ia32_out_reg(irn, i);
+ out_reg = arch_irn_get_register(irn, i);
same_pos = get_first_same(reqs[i]);
same_node = get_irn_n(irn, same_pos);
same_reg = arch_get_irn_register(same_node);