- BugFix: fixed effect of r22470: Immediate is always the RIGHT operand

[libfirm] / ir / be / ia32 / ia32_finish.c

diff --git a/ir/be/ia32/ia32_finish.c b/ir/be/ia32/ia32_finish.c
index 7820830..02afd1c 100644 (file)
--- a/ir/be/ia32/ia32_finish.c
+++ b/ir/be/ia32/ia32_finish.c
@@ -44,6 +44,7 @@
 #include "ia32_finish.h"
 #include "ia32_new_nodes.h"
 #include "ia32_map_regs.h"
+#include "ia32_common_transform.h"
 #include "ia32_transform.h"
 #include "ia32_dbg_stat.h"
 #include "ia32_optimize.h"
@@ -171,6 +172,7 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg) {
                        stc = new_rd_ia32_Stc(dbg, irg, block);
                        arch_set_irn_register(cg->arch_env, stc,
                                              &ia32_flags_regs[REG_EFLAGS]);
+                       sched_add_before(irn, stc);
 
                        adc = new_rd_ia32_Adc(dbg, irg, block, noreg, noreg, nomem, not,
                                              in1, stc);
@@ -201,7 +203,7 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg) {
 
        /* remove the old sub */
        sched_remove(irn);
-       be_kill_node(irn);
+       kill_node(irn);
 
        DBG_OPT_SUB2NEGADD(irn, res);
 }
@@ -385,7 +387,8 @@ static void assure_should_be_same_requirements(ia32_code_gen_t *cg,
  * register -> base or index is broken then.
  * Solution: Turn back this address mode into explicit Load + Operation.
  */
-static void fix_am_source(ir_node *irn, void *env) {
+static void fix_am_source(ir_node *irn, void *env)
+{
        ia32_code_gen_t            *cg = env;
        const arch_env_t           *arch_env = cg->arch_env;
        ir_node                    *base;
@@ -400,11 +403,11 @@ static void fix_am_source(ir_node *irn, void *env) {
        if (! is_ia32_irn(irn) || get_ia32_op_type(irn) != ia32_AddrModeS)
                return;
        /* only need to fix binary operations */
-       if (get_ia32_am_arity(irn) != ia32_am_binary)
+       if (get_ia32_am_support(irn) != ia32_am_binary)
                return;
 
-       base  = get_irn_n(irn, 0);
-       index = get_irn_n(irn, 1);
+       base  = get_irn_n(irn, n_ia32_base);
+       index = get_irn_n(irn, n_ia32_index);
 
        reg_base  = arch_get_irn_register(arch_env, base);
        reg_index = arch_get_irn_register(arch_env, index);
@@ -464,6 +467,8 @@ static void fix_am_source(ir_node *irn, void *env) {
                        /* copy address mode information to load */
                        set_ia32_op_type(load, ia32_AddrModeS);
                        ia32_copy_am_attrs(load, irn);
+                       if (is_ia32_is_reload(irn))
+                               set_ia32_is_reload(load);
 
                        /* insert the load into schedule */
                        sched_add_before(irn, load);
@@ -474,17 +479,22 @@ static void fix_am_source(ir_node *irn, void *env) {
                        arch_set_irn_register(cg->arch_env, load_res, out_reg);
 
                        /* set the new input operand */
-                       set_irn_n(irn, n_ia32_binary_right, load_res);
-                       if(get_irn_mode(irn) == mode_T) {
+                       if (is_ia32_Immediate(get_irn_n(irn, n_ia32_binary_right)))
+                               set_irn_n(irn, n_ia32_binary_left, load_res);
+                       else
+                               set_irn_n(irn, n_ia32_binary_right, load_res);
+                       if (get_irn_mode(irn) == mode_T) {
                                const ir_edge_t *edge, *next;
                                foreach_out_edge_safe(irn, edge, next) {
                                        ir_node *node = get_edge_src_irn(edge);
                                        int      pn   = get_Proj_proj(node);
-                                       if(pn == 0) {
+                                       if (pn == pn_ia32_res) {
                                                exchange(node, irn);
-                                       } else if(pn == pn_ia32_mem) {
+                                       } else if (pn == pn_ia32_mem) {
                                                set_Proj_pred(node, load);
                                                set_Proj_proj(node, pnmem);
+                                       } else {
+                                               panic("Unexpected Proj");
                                        }
                                }
                                set_irn_mode(irn, mode_Iu);