#include "ia32_nodes_attr.h"
#include "ia32_new_nodes.h"
#include "ia32_map_regs.h"
-
-#ifdef obstack_chunk_alloc
-# undef obstack_chunk_alloc
-# define obstack_chunk_alloc xmalloc
-#else
-# define obstack_chunk_alloc xmalloc
-# define obstack_chunk_free free
-#endif
+#include "bearch_ia32_t.h"
#define BLOCK_PREFIX(x) ".L" x
-extern int obstack_printf(struct obstack *obst, char *fmt, ...);
-
#define SNPRINTF_BUF_LEN 128
/* global arch_env for lc_printf functions */
static const arch_env_t *arch_env = NULL;
+/** by default, we generate assembler code for the Linux gas */
+asm_flavour_t asm_flavour = ASM_LINUX_GAS;
+
+/**
+ * Switch to a new section
+ */
+void ia32_switch_section(FILE *F, section_t sec) {
+ static section_t curr_sec = NO_SECTION;
+ static const char *text[ASM_MAX][SECTION_MAX] = {
+ {
+ ".section\t.text", ".section\t.data", ".section\t.rodata", ".section\t.text"
+ },
+ {
+ ".section\t.text", ".section\t.data", ".section .rdata,\"dr\"", ".section\t.text"
+ }
+ };
+
+ if (curr_sec == sec)
+ return;
+
+ curr_sec = sec;
+ switch (sec) {
+
+ case NO_SECTION:
+ break;
+
+ case SECTION_TEXT:
+ case SECTION_DATA:
+ case SECTION_RODATA:
+ case SECTION_COMMON:
+ fprintf(F, "\t%s\n", text[asm_flavour][sec]);
+ }
+}
+
+static void ia32_dump_function_object(FILE *F, const char *name)
+{
+ switch (asm_flavour) {
+ case ASM_LINUX_GAS:
+ fprintf(F, "\t.type\t%s, @function\n", name);
+ break;
+ case ASM_MINGW_GAS:
+ fprintf(F, "\t.def\t%s;\t.scl\t2;\t.type\t32;\t.endef\n", name);
+ break;
+ }
+}
+
+static void ia32_dump_function_size(FILE *F, const char *name)
+{
+ switch (asm_flavour) {
+ case ASM_LINUX_GAS:
+ fprintf(F, "\t.size\t%s, .-%s\n", name, name);
+ break;
+ }
+}
+
/*************************************************************
* _ _ __ _ _
* (_) | | / _| | | | |
/**
* returns true if a node has x87 registers
*/
-static int has_x87_register(const ir_node *n)
-{
- return get_irn_op(n)->flags & (irop_flag_machine << 1);
+static int has_x87_register(const ir_node *n) {
+ return is_irn_machine_user(n, 0);
}
/* We always pass the ir_node which is a pointer. */
reg = arch_get_irn_register(arch_env, op);
assert(reg && "no in register found");
+
+ /* in case of unknown: just return a register */
+ if (REGS_ARE_EQUAL(reg, &ia32_gp_regs[REG_GP_UKNWN]))
+ reg = &ia32_gp_regs[REG_EAX];
+ else if (REGS_ARE_EQUAL(reg, &ia32_xmm_regs[REG_XMM_UKNWN]))
+ reg = &ia32_xmm_regs[REG_XMM0];
+ else if (REGS_ARE_EQUAL(reg, &ia32_vfp_regs[REG_VFP_UKNWN]))
+ reg = &ia32_vfp_regs[REG_VF0];
+
return reg;
}
ir_mode *mode = get_irn_mode(X);
if (mode == mode_T) {
- mode = is_ia32_AddrModeS(X) || is_ia32_AddrModeD(X) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
+ mode = (is_ia32_Ld(X) || is_ia32_St(X)) ? get_ia32_ls_mode(X) : get_ia32_res_mode(X);
}
if (!X)
(!(is_ia32_St(n) || \
is_ia32_Store8Bit(n) || \
is_ia32_CondJmp(n) || \
- is_ia32_fCondJmp(n) || \
+ is_ia32_xCondJmp(n) || \
is_ia32_SwitchJmp(n)))
if (! buf) {
snprintf(buf, SNPRINTF_BUF_LEN, "%s, %s", get_ia32_cnst(n), ia32_emit_am(n, env));
}
else {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S, %s", n, ia32_emit_am(n, env));
+ if (PRODUCES_RESULT(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n, env));
+ }
+ else {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, ia32_emit_am(n, env));
+ }
}
break;
case ia32_AddrModeD:
lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
}
break;
- case ia32_am_Dest:
- snprintf(buf, SNPRINTF_BUF_LEN, ia32_emit_am(n, env));
+ case ia32_AddrModeD:
+ snprintf(buf, SNPRINTF_BUF_LEN, "%s", ia32_emit_am(n, env));
break;
default:
assert(0 && "unsupported op type");
return get_irn_link(block);
}
+/**
+ * Returns the Proj with projection number proj and NOT mode_M
+ */
+static ir_node *get_proj(const ir_node *irn, long proj) {
+ const ir_edge_t *edge;
+ ir_node *src;
+
+ assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
+
+ foreach_out_edge(irn, edge) {
+ src = get_edge_src_irn(edge);
+
+ assert(is_Proj(src) && "Proj expected");
+ if (get_irn_mode(src) == mode_M)
+ continue;
+
+ if (get_Proj_proj(src) == proj)
+ return src;
+ }
+ return NULL;
+}
+
/**
* Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
*/
static void finish_CondJmp(FILE *F, const ir_node *irn, ir_mode *mode) {
const ir_node *proj1, *proj2 = NULL;
const ir_node *block, *next_bl = NULL;
- const ir_edge_t *edge;
char buf[SNPRINTF_BUF_LEN];
char cmd_buf[SNPRINTF_BUF_LEN];
char cmnt_buf[SNPRINTF_BUF_LEN];
/* get both Proj's */
- edge = get_irn_out_edge_first(irn);
- proj1 = get_edge_src_irn(edge);
- assert(is_Proj(proj1) && "CondJmp with a non-Proj");
+ proj1 = get_proj(irn, pn_Cond_true);
+ assert(proj1 && "CondJmp without true Proj");
- edge = get_irn_out_edge_next(irn, edge);
- if (edge) {
- proj2 = get_edge_src_irn(edge);
- assert(is_Proj(proj2) && "CondJmp with a non-Proj");
- }
+ proj2 = get_proj(irn, pn_Cond_false);
+ assert(proj2 && "CondJmp without false Proj");
/* for now, the code works for scheduled and non-schedules blocks */
block = get_nodes_block(irn);
- if (proj2) {
- /* we have a block schedule */
- next_bl = next_blk_sched(block);
-
- if (get_cfop_target_block(proj1) == next_bl) {
- /* exchange both proj's so the second one can be omitted */
- const ir_node *t = proj1;
- proj1 = proj2;
- proj2 = t;
- }
+
+ /* we have a block schedule */
+ next_bl = next_blk_sched(block);
+
+ if (get_cfop_target_block(proj1) == next_bl) {
+ /* exchange both proj's so the second one can be omitted */
+ const ir_node *t = proj1;
+ proj1 = proj2;
+ proj2 = t;
}
/* the first Proj must always be created */
IA32_DO_EMIT(irn);
/* the second Proj might be a fallthrough */
- if (proj2) {
- if (get_cfop_target_block(proj2) != next_bl) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
- }
- else {
- cmd_buf[0] = '\0';
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrogh %s */", get_cfop_target(proj2, buf));
- }
- IA32_DO_EMIT(irn);
+ if (get_cfop_target_block(proj2) != next_bl) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(proj2, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* otherwise */");
}
+ else {
+ cmd_buf[0] = '\0';
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* fallthrough %s */", get_cfop_target(proj2, buf));
+ }
+ IA32_DO_EMIT(irn);
}
/**
finish_CondJmp(F, irn, get_ia32_res_mode(irn));
}
+/**
+ * Emits code for conditional x87 floating point jump with two variables.
+ */
+static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) {
+ FILE *F = env->out;
+ char cmd_buf[SNPRINTF_BUF_LEN];
+ char cmnt_buf[SNPRINTF_BUF_LEN];
+ ia32_attr_t *attr = get_ia32_attr(irn);
+ const char *reg = attr->x87[1]->name;
+ const char *instr = "fcom";
+ int reverse = 0;
+
+ switch (get_ia32_pncode(irn)) {
+ case iro_ia32_fcomrJmp:
+ reverse = 1;
+ case iro_ia32_fcomJmp:
+ default:
+ instr = "fucom";
+ break;
+ case iro_ia32_fcomrpJmp:
+ reverse = 1;
+ case iro_ia32_fcompJmp:
+ instr = "fucomp";
+ break;
+ case iro_ia32_fcomrppJmp:
+ reverse = 1;
+ case iro_ia32_fcomppJmp:
+ instr = "fucompp";
+ reg = "";
+ break;
+ }
+
+ if (reverse)
+ set_ia32_pncode(irn, (long)get_negated_pnc(get_ia32_pncode(irn), mode_Is));
+
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s", instr, reg);
+ lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
+ IA32_DO_EMIT(irn);
+// lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %3D", irn);
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */");
+ IA32_DO_EMIT(irn);
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "sahf");
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store ah into flags */");
+ IA32_DO_EMIT(irn);
+
+ finish_CondJmp(F, irn, mode_Is);
+}
+
/*********************************************************
* _ _ _
* (_) | (_)
static void emit_ia32_SwitchJmp(const ir_node *irn, ia32_emit_env_t *emit_env) {
unsigned long interval;
char buf[SNPRINTF_BUF_LEN];
- int last_value, i, pn, do_jmp_tbl = 1;
+ int last_value, i, pn;
jmp_tbl_t tbl;
ir_node *proj;
const ir_edge_t *edge;
/* two-complement's magic make this work without overflow */
interval = tbl.max_value - tbl.min_value;
- /* check value interval */
- if (interval > 16 * 1024) {
- do_jmp_tbl = 0;
- }
-
- /* check ratio of value interval to number of branches */
- if ((float)(interval + 1) / (float)tbl.num_branches > 8.0) {
- do_jmp_tbl = 0;
- }
-
- if (do_jmp_tbl) {
- /* emit the table */
- if (tbl.min_value != 0) {
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %lu, -%d(%1S)",
- interval, tbl.min_value, irn);
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* first switch value is not 0 */");
+ /* emit the table */
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %u", irn, interval);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
+ IA32_DO_EMIT(irn);
- IA32_DO_EMIT(irn);
- }
- else {
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %lu, %1S", interval, irn);
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* compare for switch */");
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
+ IA32_DO_EMIT(irn);
- IA32_DO_EMIT(irn);
- }
+ if (tbl.num_branches > 1) {
+ /* create table */
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "ja %s", get_cfop_target(tbl.defProj, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default jump if out of range */");
+ lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp %s[%1S*4]", tbl.label, irn);
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
IA32_DO_EMIT(irn);
- if (tbl.num_branches > 1) {
- /* create table */
-
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "jmp [%1S*4+%s]", irn, tbl.label);
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* get jump table entry as target */");
- IA32_DO_EMIT(irn);
-
- fprintf(F, "\t.section\t.rodata\n");
- fprintf(F, "\t.align 4\n");
+ ia32_switch_section(F, SECTION_RODATA);
+ fprintf(F, "\t.align 4\n");
- fprintf(F, "%s:\n", tbl.label);
+ fprintf(F, "%s:\n", tbl.label);
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */\n", tbl.branches[0].value);
- IA32_DO_EMIT(irn);
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[0].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", tbl.branches[0].value);
+ IA32_DO_EMIT(irn);
- last_value = tbl.branches[0].value;
- for (i = 1; i < tbl.num_branches; ++i) {
- while (++last_value < tbl.branches[i].value) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
- IA32_DO_EMIT(irn);
- }
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
+ last_value = tbl.branches[0].value;
+ for (i = 1; i < tbl.num_branches; ++i) {
+ while (++last_value < tbl.branches[i].value) {
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.defProj, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
IA32_DO_EMIT(irn);
}
-
- fprintf(F, "\t.text");
- }
- else {
- /* one jump is enough */
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, ".long %s", get_cfop_target(tbl.branches[i].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", last_value);
IA32_DO_EMIT(irn);
}
+ ia32_switch_section(F, SECTION_TEXT);
}
- else { // no jump table
- for (i = 0; i < tbl.num_branches; ++i) {
- lc_esnprintf(env, cmd_buf, SNPRINTF_BUF_LEN, "cmpl %d, %1S", tbl.branches[i].value, irn);
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* case %d */", i);
- IA32_DO_EMIT(irn);
- fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
- }
-
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.defProj, buf));
- snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* default case */");
+ else {
+ /* one jump is enough */
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "jmp %s", get_cfop_target(tbl.branches[0].target, buf));
+ snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* only one case given */");
IA32_DO_EMIT(irn);
}
* Emit rep movsd instruction for memcopy.
*/
static void emit_ia32_CopyB(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- tarval *tv = get_ia32_Immop_tarval(irn);
- int rem = get_tarval_long(tv);
- int size = get_tarval_long(get_ia32_Immop_tarval(get_irn_n(irn, 2)));
+ FILE *F = emit_env->out;
+ tarval *tv = get_ia32_Immop_tarval(irn);
+ int rem = get_tarval_long(tv);
+ ir_node *size_node = get_irn_n(irn, 2);
+ int size;
char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+ /* beware: size_node could be a be_Copy to fulfill constraints for ecx */
+ size_node = be_is_Copy(size_node) ? be_get_Copy_op(size_node) : size_node;
+ size = get_tarval_long(get_ia32_Immop_tarval(size_node));
+
emit_CopyB_prolog(F, rem, size);
snprintf(cmd_buf, SNPRINTF_BUF_LEN, "rep movsd");
* Emit code for conversions (I, FP), (FP, I) and (FP, FP).
*/
static void emit_ia32_Conv_with_FP(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- const lc_arg_env_t *env = ia32_get_arg_env();
+ FILE *F = emit_env->out;
+ const lc_arg_env_t *env = ia32_get_arg_env();
+ ir_mode *src_mode = get_ia32_src_mode(irn);
+ ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
char *from, *to, buf[64];
- ir_mode *src_mode, *tgt_mode;
char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
- src_mode = is_ia32_AddrModeS(irn) ? get_ia32_ls_mode(irn) : get_irn_mode(get_irn_n(irn, 2));
- tgt_mode = get_ia32_res_mode(irn);
-
from = mode_is_float(src_mode) ? (get_mode_size_bits(src_mode) == 32 ? "ss" : "sd") : "si";
to = mode_is_float(tgt_mode) ? (get_mode_size_bits(tgt_mode) == 32 ? "ss" : "sd") : "si";
* Emits code for an Int conversion.
*/
static void emit_ia32_Conv_I2I(const ir_node *irn, ia32_emit_env_t *emit_env) {
- FILE *F = emit_env->out;
- const lc_arg_env_t *env = ia32_get_arg_env();
- char *move_cmd, *conv_cmd;
- ir_mode *src_mode, *tgt_mode;
+ FILE *F = emit_env->out;
+ const lc_arg_env_t *env = ia32_get_arg_env();
+ char *move_cmd = "movzx";
+ char *conv_cmd = NULL;
+ ir_mode *src_mode = get_ia32_src_mode(irn);
+ ir_mode *tgt_mode = get_ia32_tgt_mode(irn);
int n, m;
char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
const arch_register_t *in_reg, *out_reg;
- src_mode = is_ia32_AddrModeS(irn) ? get_ia32_ls_mode(irn) : get_irn_mode(get_irn_n(irn, 2));
- tgt_mode = get_ia32_res_mode(irn);
-
n = get_mode_size_bits(src_mode);
m = get_mode_size_bits(tgt_mode);
else
assert(0 && "unsupported Conv_I2I");
}
- else {
- move_cmd = "movzx";
- conv_cmd = NULL;
- }
switch(get_ia32_op_type(irn)) {
case ia32_Normal:
char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
if (ent) {
- snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_name(ent));
+ snprintf(cmd_buf, SNPRINTF_BUF_LEN, "call %s", get_entity_ld_name(ent));
}
else {
lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "%1D", get_irn_n(irn, be_pos_Call_ptr));
char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
if (offs) {
- lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S,%s%u", irn,
- (dir == be_stack_dir_expand) ? " -" : " ", offs);
+ if (dir == be_stack_dir_expand)
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "sub %1S, %u", irn, offs);
+ else
+ lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "add %1S, %u", irn, offs);
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F (IncSP) */", irn);
}
else {
*/
static void emit_be_Copy(const ir_node *irn, ia32_emit_env_t *emit_env) {
FILE *F = emit_env->out;
+ const arch_env_t *aenv = emit_env->arch_env;
char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
+ if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, irn), arch_get_irn_register(aenv, be_get_Copy_op(irn))))
+ return;
+
if (mode_is_float(get_irn_mode(irn)))
lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "movs%M %1D, %1S", irn, irn, irn);
else
IA32_DO_EMIT(irn);
}
+/**
+ * Emits code for Constant loading.
+ */
+static void emit_ia32_Const(const ir_node *n, ia32_emit_env_t *env) {
+ FILE *F = env->out;
+ char cmd_buf[256], cmnt_buf[256];
+ const lc_arg_env_t *arg_env = ia32_get_arg_env();
+
+ if (get_ia32_Immop_tarval(n) == get_tarval_null(get_irn_mode(n))) {
+ const char *instr = "xor";
+ if (env->isa->opt_arch == arch_pentium_4) {
+ /* P4 prefers sub r, r, others xor r, r */
+ instr = "sub";
+ }
+ lc_esnprintf(arg_env, cmd_buf, 256, "%s %1D, %1D ", instr, n, n);
+ lc_esnprintf(arg_env, cmnt_buf, 256, "/* optimized mov 0 to register */");
+ }
+ else {
+ if (get_ia32_op_type(n) == ia32_SymConst) {
+ lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, OFFSET FLAT:%C ", n, n);
+ lc_esnprintf(arg_env, cmnt_buf, 256, "/* Move address of SymConst into register */");
+ }
+ else {
+ lc_esnprintf(arg_env, cmd_buf, 256, "mov %1D, %C ", n, n);
+ lc_esnprintf(arg_env, cmnt_buf, 256, "/* Mov Const into register */");
+ }
+ }
+ lc_efprintf(arg_env, F, "\t%-35s %-60s /* %+F (%+G) */\n", cmd_buf, cmnt_buf, n, n);
+}
+
/***********************************************************************************
*/
static void ia32_register_emitters(void) {
-#define IA32_EMIT(a) op_ia32_##a->ops.generic = (op_func)emit_ia32_##a
-#define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
-#define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
+#define IA32_EMIT2(a,b) op_ia32_##a->ops.generic = (op_func)emit_ia32_##b
+#define IA32_EMIT(a) IA32_EMIT2(a,a)
+#define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
+#define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
/* first clear the generic function pointer for all ops */
clear_irp_opcodes_generic_func();
IA32_EMIT(Conv_FP2FP);
IA32_EMIT(Conv_I2I);
IA32_EMIT(Conv_I2I8Bit);
+ IA32_EMIT(Const);
+ IA32_EMIT2(fcomJmp, x87CondJmp);
+ IA32_EMIT2(fcompJmp, x87CondJmp);
+ IA32_EMIT2(fcomppJmp, x87CondJmp);
+ IA32_EMIT2(fcomrJmp, x87CondJmp);
+ IA32_EMIT2(fcomrpJmp, x87CondJmp);
+ IA32_EMIT2(fcomrppJmp, x87CondJmp);
/* benode emitter */
BE_EMIT(Call);
EMIT(Jmp);
EMIT(Proj);
-#undef IA32_EMIT
#undef BE_EMIT
#undef EMIT
+#undef IA32_EMIT2
+#undef IA32_EMIT
}
/**
* Emits code for a node.
*/
static void ia32_emit_node(const ir_node *irn, void *env) {
- ia32_emit_env_t *emit_env = env;
- firm_dbg_module_t *mod = emit_env->mod;
+ ia32_emit_env_t *emit_env = env;
FILE *F = emit_env->out;
ir_op *op = get_irn_op(irn);
+ DEBUG_ONLY(firm_dbg_module_t *mod = emit_env->mod;)
DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
}
}
+/**
+ * Emits gas alignment directives
+ */
+static void ia32_emit_alignment(FILE *F, unsigned align, unsigned skip) {
+ fprintf(F, "\t.p2align %u,,%u\n", align, skip);
+}
+
+/**
+ * Emits gas alignment directives for Functions depended on cpu architecture.
+ */
+static void ia32_emit_align_func(FILE *F, cpu_support cpu) {
+ unsigned align; unsigned maximum_skip;
+
+ /* gcc doesn't emit alignment for p4 ?*/
+ if (cpu == arch_pentium_4)
+ return;
+
+ switch (cpu) {
+ case arch_i386:
+ align = 2; maximum_skip = 3;
+ break;
+ case arch_i486:
+ align = 4; maximum_skip = 15;
+ break;
+ case arch_k6:
+ align = 5; maximum_skip = 31;
+ break;
+ default:
+ align = 4; maximum_skip = 15;
+ }
+ ia32_emit_alignment(F, align, maximum_skip);
+}
+
+/**
+ * Emits gas alignment directives for Labels depended on cpu architecture.
+ */
+static void ia32_emit_align_label(FILE *F, cpu_support cpu) {
+ unsigned align; unsigned maximum_skip;
+
+ /* gcc doesn't emit alignment for p4 ?*/
+ if (cpu == arch_pentium_4)
+ return;
+
+ switch (cpu) {
+ case arch_i386:
+ align = 2; maximum_skip = 3;
+ break;
+ case arch_i486:
+ align = 4; maximum_skip = 15;
+ break;
+ case arch_k6:
+ align = 5; maximum_skip = 7;
+ break;
+ default:
+ align = 4; maximum_skip = 7;
+ }
+ ia32_emit_alignment(F, align, maximum_skip);
+}
+
/**
* Walks over the nodes in a block connected by scheduling edges
* and emits code for each node.
*/
static void ia32_gen_block(ir_node *block, void *env) {
+ ia32_emit_env_t *emit_env = env;
const ir_node *irn;
+ int need_label = block != get_irg_start_block(get_irn_irg(block));
if (! is_Block(block))
return;
- fprintf(((ia32_emit_env_t *)env)->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
+ if (need_label && (emit_env->cg->opt & IA32_OPT_EXTBB)) {
+ /* if the extended block scheduler is used, only leader blocks need
+ labels. */
+ need_label = (block == get_extbb_leader(get_nodes_extbb(block)));
+ }
+
+ if (need_label) {
+ ia32_emit_align_label(emit_env->out, emit_env->isa->opt_arch);
+ fprintf(emit_env->out, BLOCK_PREFIX("%ld:\n"), get_irn_node_nr(block));
+ }
+
sched_foreach(block, irn) {
ia32_emit_node(irn, env);
}
/**
* Emits code for function start.
*/
-static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
+static void ia32_emit_func_prolog(FILE *F, ir_graph *irg, cpu_support cpu) {
entity *irg_ent = get_irg_entity(irg);
- const char *irg_name = get_entity_name(irg_ent);
+ const char *irg_name = get_entity_ld_name(irg_ent);
- fprintf(F, "\t.section\t.text\n");
+ fprintf(F, "\n");
+ ia32_switch_section(F, SECTION_TEXT);
+ ia32_emit_align_func(F, cpu);
if (get_entity_visibility(irg_ent) == visibility_external_visible) {
fprintf(F, ".globl %s\n", irg_name);
}
- fprintf(F, "\t.type\t%s, @function\n", irg_name);
+ ia32_dump_function_object(F, irg_name);
fprintf(F, "%s:\n", irg_name);
}
* Emits code for function end
*/
static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
- const char *irg_name = get_entity_name(get_irg_entity(irg));
+ const char *irg_name = get_entity_ld_name(get_irg_entity(irg));
fprintf(F, "\tret\n");
- fprintf(F, "\t.size\t%s, .-%s\n\n", irg_name, irg_name);
+ ia32_dump_function_size(F, irg_name);
+ fprintf(F, "\n");
}
/**
ia32_register_emitters();
- ia32_emit_func_prolog(F, irg);
+ ia32_emit_func_prolog(F, irg, emit_env.isa->opt_arch);
irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
- if (cg->opt.extbb && cg->blk_sched) {
+ if ((cg->opt & IA32_OPT_EXTBB) && cg->blk_sched) {
int i, n = ARR_LEN(cg->blk_sched);
for (i = 0; i < n;) {
projects / libfirm / blobdiff