#include "irgwalk.h"
#include "irprintf.h"
#include "irop_t.h"
+#include "irargs_t.h"
#include "../besched.h"
#define SNPRINTF_BUF_LEN 128
-static set *cur_reg_set = NULL;
+static const arch_env_t *arch_env = NULL;
/*************************************************************
/**
- * Returns the register at in position pos. If the IN node is not an
- * ia32 node, we check for phi and proj.
+ * Returns the register at in position pos.
*/
static const arch_register_t *get_in_reg(ir_node *irn, int pos) {
ir_node *op;
const arch_register_t *reg = NULL;
- const arch_register_t **slots;
assert(get_irn_arity(irn) > pos && "Invalid IN position");
in register we need. */
op = get_irn_n(irn, pos);
- if (is_Proj(op)) {
- pos = (int)translate_proj_pos(op);
- while(is_Proj(op))
- op = get_Proj_pred(op);
- }
+ reg = arch_get_irn_register(arch_env, op);
+
+ assert(reg && "no in register found");
+ return reg;
+}
+
+/**
+ * Returns the register at out position pos.
+ */
+static const arch_register_t *get_out_reg(ir_node *irn, int pos) {
+ ir_node *proj;
+ const arch_register_t *reg = NULL;
+
+ assert(get_irn_n_edges(irn) > pos && "Invalid OUT position");
- if (is_ia32_irn(op)) {
- /* The operator is an ia32 node: this node has only one out */
- slots = get_ia32_slots(op);
- reg = slots[0];
+ /* 1st case: irn is not of mode_T, so it has only */
+ /* one OUT register -> good */
+ /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
+ /* Proj with the corresponding projnum for the register */
+
+ if (get_irn_mode(irn) != mode_T) {
+ reg = arch_get_irn_register(arch_env, irn);
+ }
+ else if (is_ia32_irn(irn)) {
+ reg = get_ia32_out_reg(irn, pos);
}
else {
- /* The operator is not an ia32 node: check for Phi or Proj */
- if (is_Phi(op)) {
- /* Phi's getting register assigned */
- reg = ia32_get_firm_reg(NULL, op, cur_reg_set);
- assert(reg && "No register assigned to Phi node");
- }
- else {
- assert(0 && "Unsupported node for IN register");
+ const ir_edge_t *edge;
+
+ foreach_out_edge(irn, edge) {
+ proj = get_edge_src_irn(edge);
+ assert(is_Proj(proj) && "non-Proj from mode_T node");
+ if (get_Proj_proj(proj) == pos) {
+ reg = arch_get_irn_register(arch_env, proj);
+ break;
+ }
}
}
+ assert(reg && "no out register found");
return reg;
}
/**
* Returns the number of the in register at position pos.
*/
-int get_ia32_in_regnr(ir_node *irn, int pos) {
+int get_ia32_reg_nr(ir_node *irn, int pos, int in_out) {
const arch_register_t *reg;
+ ir_node *op;
- reg = get_in_reg(irn, pos);
- assert(reg && "no in register");
- return reg->index;
+ if (in_out == 1) {
+ /* special case Proj P_fame_base */
+ op = get_irn_n(irn, pos);
+ if (is_Proj(op) && get_Proj_proj(op) == pn_Start_P_frame_base) {
+ return 10;
+ }
+
+ reg = get_in_reg(irn, pos);
+ }
+ else {
+ reg = get_out_reg(irn, pos);
+ }
+
+ return arch_register_get_index(reg);
}
/**
* Returns the name of the in register at position pos.
*/
-const char *get_ia32_in_reg_name(ir_node *irn, int pos) {
+const char *get_ia32_reg_name(ir_node *irn, int pos, int in_out) {
const arch_register_t *reg;
+ ir_node *op;
+
+ if (in_out == 1) {
+ /* special case Proj P_fame_base */
+ op = get_irn_n(irn, pos);
+ if (is_Proj(op) && get_Proj_proj(op) == pn_Start_P_frame_base) {
+ return "x(esp)";
+ }
+ reg = get_in_reg(irn, pos);
+ }
+ else {
+ reg = get_out_reg(irn, pos);
+ }
- reg = get_in_reg(irn, pos);
- assert(reg && "no in register");
- return reg->name;
+ return arch_register_get_name(reg);
}
/**
if (!X)
return lc_arg_append(app, occ, "(null)", 6);
- if (occ->conversion == 's') {
- buf = get_ia32_in_reg_name(X, nr);
+ if (occ->conversion == 'S') {
+ buf = get_ia32_reg_name(X, nr, 1);
}
- else { /* 'd' */
- buf = get_ia32_out_reg_name(X, nr);
+ else { /* 'D' */
+ buf = get_ia32_reg_name(X, nr, 0);
}
+ lc_appendable_chadd(app, '%');
return lc_arg_append(app, occ, buf, strlen(buf));
}
if (!X)
return lc_arg_append(app, occ, "(null)", 6);
- if (occ->conversion == 'c') {
+ if (occ->conversion == 'C') {
buf = node_const_to_str(X);
}
- else { /* 'o' */
+ else { /* 'O' */
buf = node_offset_to_str(X);
}
* We use the firm environment with some additional handlers.
*/
const lc_arg_env_t *ia32_get_arg_env(void) {
- static lc_arg_env_t *env = NULL;
-
- static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
- static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
- static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
-
- if(env == NULL) {
- env = lc_arg_new_env();
-
- lc_arg_register(env, "ia32:sreg", 's', &ia32_reg_handler);
- lc_arg_register(env, "ia32:dreg", 'd', &ia32_reg_handler);
- lc_arg_register(env, "ia32:cnst", 'c', &ia32_const_handler);
- lc_arg_register(env, "ia32:offs", 'o', &ia32_const_handler);
- lc_arg_register(env, "ia32:mode", 'm', &ia32_mode_handler);
- }
+ static lc_arg_env_t *env = NULL;
+
+ static const lc_arg_handler_t ia32_reg_handler = { ia32_get_arg_type, ia32_get_reg_name };
+ static const lc_arg_handler_t ia32_const_handler = { ia32_get_arg_type, ia32_const_to_str };
+ static const lc_arg_handler_t ia32_mode_handler = { ia32_get_arg_type, ia32_get_mode_suffix };
+
+ if(env == NULL) {
+ /* extend the firm printer */
+ env = firm_get_arg_env();
+ //lc_arg_new_env();
+
+ lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
+ lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
+ lc_arg_register(env, "ia32:cnst", 'C', &ia32_const_handler);
+ lc_arg_register(env, "ia32:offs", 'O', &ia32_const_handler);
+ lc_arg_register(env, "ia32:mode", 'M', &ia32_mode_handler);
+ }
- return env;
+ return env;
}
/**
* For 2-address code we need to make sure the first src reg is equal to dest reg.
*/
void equalize_dest_src(FILE *F, ir_node *n) {
- if (get_ia32_in_regnr(n, 0) != get_ia32_out_regnr(n, 0)) {
- if (get_irn_arity(n) > 1 && get_ia32_in_regnr(n, 1) == get_ia32_out_regnr(n, 0)) {
+ if (get_ia32_reg_nr(n, 0, 1) != get_ia32_reg_nr(n, 0, 0)) {
+ if (get_irn_arity(n) > 1 && get_ia32_reg_nr(n, 1, 1) == get_ia32_reg_nr(n, 0, 0)) {
if (! is_op_commutative(get_irn_op(n))) {
- /* we only need to echange for non-commutative ops */
- lc_efprintf(ia32_get_arg_env(), F, "\txchg %1s, %2s\t\t\t/* xchg src1 <-> src2 for 2 address code */\n", n, n);
+ /* we only need to exchange for non-commutative ops */
+ lc_efprintf(ia32_get_arg_env(), F, "\txchg %1S, %2S\t\t\t/* xchg src1 <-> src2 for 2 address code */\n", n, n);
}
}
else {
- lc_efprintf(ia32_get_arg_env(), F, "\tmovl %1s, %1d\t\t\t/* src -> dest for 2 address code */\n", n, n);
+ lc_efprintf(ia32_get_arg_env(), F, "\tmovl %1S, %1D\t\t\t/* src -> dest for 2 address code */\n", n, n);
}
}
}
static void emit_ia32_CondJmp(ir_node *irn, emit_env_t *env) {
FILE *F = env->out;
- lc_efprintf(ia32_get_arg_env(), F, "\tcmp %2s, %1s\t\t\t/* CondJmp(%+F, %+F) */\n", irn, irn,
+ lc_efprintf(ia32_get_arg_env(), F, "\tcmp %2S, %1S\t\t\t/* CondJmp(%+F, %+F) */\n", irn, irn,
get_irn_n(irn, 0), get_irn_n(irn, 1));
finish_CondJmp(F, irn);
}
void emit_ia32_CondJmp_i(ir_node *irn, emit_env_t *env) {
FILE *F = env->out;
- lc_efprintf(ia32_get_arg_env(), F, "\tcmp %c, %1s\t\t\t/* CondJmp_i(%+F) */\n", irn, irn, get_irn_n(irn, 0));
+ lc_efprintf(ia32_get_arg_env(), F, "\tcmp %C, %1S\t\t\t/* CondJmp_i(%+F) */\n", irn, irn, get_irn_n(irn, 0));
finish_CondJmp(F, irn);
}
/* emit the table */
if (tbl.min_value != 0) {
fprintf(F, "\tcmpl %lu, -%d", interval, tbl.min_value);
- lc_efprintf(env, F, "(%1s)\t\t/* first switch value is not 0 */\n", irn);
+ lc_efprintf(env, F, "(%1S)\t\t/* first switch value is not 0 */\n", irn);
}
else {
fprintf(F, "\tcmpl %lu, ", interval);
- lc_efprintf(env, F, "%1s\t\t\t/* compare for switch */\n", irn);
+ lc_efprintf(env, F, "%1S\t\t\t/* compare for switch */\n", irn);
}
fprintf(F, "\tja %s\t\t\t/* default jump if out of range */\n", get_cfop_target(tbl.defProj, buf));
if (tbl.num_branches > 1) {
/* create table */
- fprintf(F, "\tjmp *%s", tbl.label);
- lc_efprintf(env, F, "(,%1s,4)\t\t/* get jump table entry as target */\n", irn);
+ //fprintf(F, "\tjmp *%s", tbl.label);
+ lc_efprintf(env, F, "\tjmp *%s(,%1S,4)\t\t/* get jump table entry as target */\n", tbl.label, irn);
fprintf(F, "\t.section\t.rodata\t\t/* start jump table */\n");
fprintf(F, "\t.align 4\n");
else { // no jump table
for (i = 0; i < tbl.num_branches; ++i) {
fprintf(F, "\tcmpl %d, ", tbl.branches[i].value);
- lc_efprintf(env, F, "%1s", irn);
+ lc_efprintf(env, F, "%1S", irn);
fprintf(F, "\t\t\t/* case %d */\n", tbl.branches[i].value);
fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
}
#define EMIT(a) if (get_irn_opcode(irn) == iro_##a) { emit_##a(irn, emit_env); return; }
/* generated int emitter functions */
+ IA32_EMIT(Copy);
+ IA32_EMIT(Perm);
+
IA32_EMIT(Const);
IA32_EMIT(Add);
void ia32_gen_block(ir_node *block, void *env) {
ir_node *irn;
+ if (! is_Block(block))
+ return;
+
fprintf(((emit_env_t *)env)->out, "BLOCK_%ld:\n", get_irn_node_nr(block));
sched_foreach(block, irn) {
ia32_emit_node(irn, env);
/**
* Main driver
*/
-void ia32_gen_routine(FILE *F, ir_graph *irg, set *reg_set) {
+void ia32_gen_routine(FILE *F, ir_graph *irg, const arch_env_t *env) {
emit_env_t emit_env;
- emit_env.mod = firm_dbg_register("be.codegen.ia32");
- emit_env.out = F;
- emit_env.reg_set = reg_set;
+ emit_env.mod = firm_dbg_register("ir.be.codegen.ia32");
+ emit_env.out = F;
+ emit_env.arch_env = env;
- cur_reg_set = reg_set;
+ arch_env = env;
ia32_emit_start(F, irg);
irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
- irg_block_walk_graph(irg, NULL, ia32_gen_block, &emit_env);
+ irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
ia32_emit_end(F, irg);
}
projects / libfirm / blobdiff