#include "irprintf.h"
#include "irop_t.h"
#include "irargs_t.h"
+#include "irprog_t.h"
#include "../besched.h"
+#include "../benode_t.h"
#include "ia32_emitter.h"
#include "gen_ia32_emitter.h"
#include "ia32_new_nodes.h"
#include "ia32_map_regs.h"
+#ifdef obstack_chunk_alloc
+# undef obstack_chunk_alloc
+# define obstack_chunk_alloc xmalloc
+#else
+# define obstack_chunk_alloc xmalloc
+# define obstack_chunk_free free
+#endif
+
+extern int obstack_printf(struct obstack *obst, char *fmt, ...);
+
#define SNPRINTF_BUF_LEN 128
static const arch_env_t *arch_env = NULL;
+/**
+ * Emits registers and/or address mode of a binary operation.
+ */
+char *ia32_emit_binop(const ir_node *n) {
+ static char *buf = NULL;
-/*************************************************************
- * _ _ __ _ _
- * (_) | | / _| | | | |
- * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
- * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
- * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
- * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
- * | | | |
- * |_| |_|
- *************************************************************/
+ if (! buf) {
+ buf = xcalloc(1, SNPRINTF_BUF_LEN);
+ }
+ else {
+ memset(buf, 0, SNPRINTF_BUF_LEN);
+ }
+
+ switch(get_ia32_op_type(n)) {
+ case ia32_Normal:
+ if (get_ia32_cnst(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, get_ia32_cnst(n));
+ }
+ else {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %4S", n, n);
+ }
+ break;
+ case ia32_AddrModeS:
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n));
+ break;
+ case ia32_AddrModeD:
+ if (get_ia32_cnst(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %s", ia32_emit_am(n), get_ia32_cnst(n));
+ }
+ else {
+ if (is_ia32_St(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %3S", ia32_emit_am(n), n);
+ }
+ else {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %4S", ia32_emit_am(n), n);
+ }
+ }
+ break;
+ default:
+ assert(0 && "unsupported op type");
+ }
+
+ return buf;
+}
/**
- * Return node's tarval as string.
+ * Emits registers and/or address mode of a unary operation.
*/
-const char *node_const_to_str(ir_node *n) {
- char *buf;
- tarval *tv = get_ia32_Immop_tarval(n);
+char *ia32_emit_unop(const ir_node *n) {
+ static char *buf = NULL;
- if (tv) {
- buf = xmalloc(SNPRINTF_BUF_LEN);
- tarval_snprintf(buf, SNPRINTF_BUF_LEN, tv);
- return buf;
+ if (! buf) {
+ buf = xcalloc(1, SNPRINTF_BUF_LEN);
}
- else if (get_ia32_old_ir(n)) {
- return get_sc_name(get_ia32_old_ir(n));
+ else {
+ memset(buf, 0, SNPRINTF_BUF_LEN);
}
- else
- return "0";
+
+ switch(get_ia32_op_type(n)) {
+ case ia32_Normal:
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D", n);
+ break;
+ case ia32_am_Dest:
+ snprintf(buf, SNPRINTF_BUF_LEN, ia32_emit_am(n));
+ break;
+ default:
+ assert(0 && "unsupported op type");
+ }
+
+ return buf;
}
/**
- * Returns node's offset as string.
+ * Emits adressmode.
*/
-char *node_offset_to_str(ir_node *n) {
- char *buf;
- tarval *tv = get_ia32_am_offs(n);
+char *ia32_emit_am(const ir_node *n) {
+ ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
+ int had_output = 0;
+ char *s;
+ int size;
+ static struct obstack *obst = NULL;
+
+ if (! obst) {
+ obst = xcalloc(1, sizeof(*obst));
+ }
+ else {
+ obstack_free(obst, NULL);
+ }
- if (tv) {
- buf = xmalloc(SNPRINTF_BUF_LEN);
- tarval_snprintf(buf, SNPRINTF_BUF_LEN, tv);
- return buf;
+ /* obstack_free with NULL results in an uninitialized obstack */
+ obstack_init(obst);
+
+ obstack_printf(obst, "[");
+
+ if (am_flav & ia32_B) {
+ lc_eoprintf(ia32_get_arg_env(), obst, "%1S", n);
+ had_output = 1;
}
- else
- return "";
+
+ if (am_flav & ia32_I) {
+ if (had_output) {
+ obstack_printf(obst, "+");
+ }
+
+ lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
+
+ if (am_flav & ia32_S) {
+ obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
+ }
+
+ had_output = 1;
+ }
+
+ if (am_flav & ia32_O) {
+ obstack_printf(obst, get_ia32_am_offs(n));
+ }
+
+ obstack_printf(obst, "] ");
+
+ size = obstack_object_size(obst);
+ s = obstack_finish(obst);
+ s[size - 1] = '\0';
+
+ return s;
}
+/*************************************************************
+ * _ _ __ _ _
+ * (_) | | / _| | | | |
+ * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
+ * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
+ * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
+ * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
+ * | | | |
+ * |_| |_|
+ *************************************************************/
+
/* We always pass the ir_node which is a pointer. */
static int ia32_get_arg_type(const lc_arg_occ_t *occ) {
return lc_arg_type_ptr;
/**
* Returns the register at in position pos.
*/
-static const arch_register_t *get_in_reg(ir_node *irn, int pos) {
+static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
ir_node *op;
const arch_register_t *reg = NULL;
/**
* Returns the register at out position pos.
*/
-static const arch_register_t *get_out_reg(ir_node *irn, int pos) {
+static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
ir_node *proj;
const arch_register_t *reg = NULL;
return arch_register_get_index(reg);
}
+enum io_direction {
+ IN_REG,
+ OUT_REG
+};
+
/**
* Returns the name of the in register at position pos.
*/
-const char *get_ia32_reg_name(ir_node *irn, int pos, int in_out) {
+static const char *get_ia32_reg_name(ir_node *irn, int pos, enum io_direction in_out) {
const arch_register_t *reg;
- if (in_out == 1) {
+ if (in_out == IN_REG) {
reg = get_in_reg(irn, pos);
}
else {
+ /* destination address mode nodes don't have outputs */
+ if (get_ia32_op_type(irn) == ia32_AddrModeD) {
+ return "MEM";
+ }
+
reg = get_out_reg(irn, pos);
}
if (!X)
return lc_arg_append(app, occ, "(null)", 6);
- if (occ->conversion == 'S') {
- buf = get_ia32_reg_name(X, nr, 1);
- }
- else { /* 'D' */
- buf = get_ia32_reg_name(X, nr, 0);
- }
+ buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
- lc_appendable_chadd(app, '%');
return lc_arg_append(app, occ, buf, strlen(buf));
}
/**
- * Returns the tarval or offset of an ia32 as a string.
+ * Returns the tarval, offset or scale of an ia32 as a string.
*/
static int ia32_const_to_str(lc_appendable_t *app,
const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
return lc_arg_append(app, occ, "(null)", 6);
if (occ->conversion == 'C') {
- buf = node_const_to_str(X);
+ buf = get_ia32_cnst(X);
}
else { /* 'O' */
- buf = node_offset_to_str(X);
+ buf = get_ia32_am_offs(X);
}
- return lc_arg_append(app, occ, buf, strlen(buf));
+ return buf ? lc_arg_append(app, occ, buf, strlen(buf)) : 0;
}
/**
if (!X)
return lc_arg_append(app, occ, "(null)", 6);
- if (get_mode_size_bits(get_irn_mode(X)) == 32)
- return lc_appendable_chadd(app, 's');
- else
- return lc_appendable_chadd(app, 'd');
+ return lc_appendable_chadd(app, get_mode_size_bits(get_irn_mode(X)) == 32 ? 's' : 'd');
}
/**
if(env == NULL) {
/* extend the firm printer */
env = firm_get_arg_env();
- //lc_arg_new_env();
lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
return env;
}
-/**
- * For 2-address code we need to make sure the first src reg is equal to dest reg.
- */
-void equalize_dest_src(FILE *F, ir_node *n) {
- if (get_ia32_reg_nr(n, 0, 1) != get_ia32_reg_nr(n, 0, 0)) {
- if (get_irn_arity(n) > 1 && get_ia32_reg_nr(n, 1, 1) == get_ia32_reg_nr(n, 0, 0)) {
- if (! is_op_commutative(get_irn_op(n))) {
- /* we only need to exchange for non-commutative ops */
- lc_efprintf(ia32_get_arg_env(), F, "\txchg %1S, %2S\t\t\t/* xchg src1 <-> src2 for 2 address code */\n", n, n);
- }
- }
- else {
- lc_efprintf(ia32_get_arg_env(), F, "\tmovl %1S, %1D\t\t\t/* src -> dest for 2 address code */\n", n, n);
- }
- }
-}
/*
* Add a number to a prefix. This number will not be used a second time.
*/
-char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
+static char *get_unique_label(char *buf, size_t buflen, const char *prefix) {
static unsigned long id = 0;
snprintf(buf, buflen, "%s%lu", prefix, ++id);
return buf;
/**
* Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
*/
-static void finish_CondJmp(FILE *F, ir_node *irn) {
+static void finish_CondJmp(FILE *F, const ir_node *irn) {
const ir_node *proj;
const ir_edge_t *edge;
char buf[SNPRINTF_BUF_LEN];
/**
* Emits code for conditional jump with two variables.
*/
-static void emit_ia32_CondJmp(ir_node *irn, emit_env_t *env) {
+static void emit_ia32_CondJmp(const ir_node *irn, emit_env_t *env) {
FILE *F = env->out;
lc_efprintf(ia32_get_arg_env(), F, "\tcmp %2S, %1S\t\t\t/* CondJmp(%+F, %+F) */\n", irn, irn,
/**
* Emits code for conditional jump with immediate.
*/
-void emit_ia32_CondJmp_i(ir_node *irn, emit_env_t *env) {
+void emit_ia32_CondJmp_i(const ir_node *irn, emit_env_t *env) {
FILE *F = env->out;
lc_efprintf(ia32_get_arg_env(), F, "\tcmp %C, %1S\t\t\t/* CondJmp_i(%+F) */\n", irn, irn, get_irn_n(irn, 0));
if (do_jmp_tbl) {
/* emit the table */
if (tbl.min_value != 0) {
- fprintf(F, "\tcmpl %lu, -%d", interval, tbl.min_value);
- lc_efprintf(env, F, "(%1S)\t\t/* first switch value is not 0 */\n", irn);
+ lc_efprintf(env, F, "\tcmpl %lu, -%d(%1S)\t\t/* first switch value is not 0 */\n",
+ interval, tbl.min_value, irn);
}
else {
- fprintf(F, "\tcmpl %lu, ", interval);
- lc_efprintf(env, F, "%1S\t\t\t/* compare for switch */\n", irn);
+ lc_efprintf(env, F, "\tcmpl %lu, %1S\t\t\t/* compare for switch */\n", interval, irn);
}
fprintf(F, "\tja %s\t\t\t/* default jump if out of range */\n", get_cfop_target(tbl.defProj, buf));
if (tbl.num_branches > 1) {
/* create table */
- //fprintf(F, "\tjmp *%s", tbl.label);
lc_efprintf(env, F, "\tjmp *%s(,%1S,4)\t\t/* get jump table entry as target */\n", tbl.label, irn);
fprintf(F, "\t.section\t.rodata\t\t/* start jump table */\n");
}
else { // no jump table
for (i = 0; i < tbl.num_branches; ++i) {
- fprintf(F, "\tcmpl %d, ", tbl.branches[i].value);
- lc_efprintf(env, F, "%1S", irn);
- fprintf(F, "\t\t\t/* case %d */\n", tbl.branches[i].value);
+ lc_efprintf(env, F, "\tcmpl %d, %1S\t\t\t/* case %d */\n", tbl.branches[i].value, irn, i);
fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
}
/**
* Emits code for a unconditional jump.
*/
-void emit_Jmp(ir_node *irn, emit_env_t *env) {
+void emit_Jmp(const ir_node *irn, emit_env_t *env) {
FILE *F = env->out;
char buf[SNPRINTF_BUF_LEN];
/**
* Emits code for a proj -> node
*/
-void emit_Proj(ir_node *irn, emit_env_t *env) {
+void emit_Proj(const ir_node *irn, emit_env_t *env) {
ir_node *pred = get_Proj_pred(irn);
if (get_irn_op(pred) == op_Start) {
}
}
-/********************
- * _____ _ _
- * / ____| | | |
- * | | __ _| | |
- * | | / _` | | |
- * | |___| (_| | | |
- * \_____\__,_|_|_|
- *
- ********************/
+/**********************************
+ * _____ ____
+ * / ____| | _ \
+ * | | ___ _ __ _ _| |_) |
+ * | | / _ \| '_ \| | | | _ <
+ * | |___| (_) | |_) | |_| | |_) |
+ * \_____\___/| .__/ \__, |____/
+ * | | __/ |
+ * |_| |___/
+ **********************************/
+
+static void emit_CopyB_prolog(FILE *F, int rem, int size) {
+ fprintf(F, "\t/* memcopy %d bytes*/\n", size);
+ fprintf(F, "\tcld\t\t\t\t/* copy direction forward*/\n");
+
+ switch(rem) {
+ case 1:
+ fprintf(F, "\tmovsb\t\t\t\t/* memcopy remainder 1 */\n");
+ break;
+ case 2:
+ fprintf(F, "\tmovsw\t\t\t\t/* memcopy remainder 2 */\n");
+ break;
+ case 3:
+ fprintf(F, "\tmovsb\t\t\t\t/* memcopy remainder 3 */\n");
+ fprintf(F, "\tmovsw\t\t\t\t/* memcopy remainder 3 */\n");
+ break;
+ }
+}
-void emit_ia32_Call(ir_node *irn, emit_env_t *emit_env) {
- int i, n = get_irn_arity(irn);
- int args_size = 0;
- ir_node *sync = get_irn_n(irn, n - 1);
- FILE *F = emit_env->out;
- const lc_arg_env_t *env = ia32_get_arg_env();
+void emit_ia32_CopyB(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ tarval *tv = get_ia32_Immop_tarval(irn);
+ int rem = get_tarval_long(tv);
+ int size = get_tarval_long(get_ia32_Immop_tarval(get_irn_n(irn, 2)));
- if (get_irn_op(sync) == op_Sync) {
- /* We have stack arguments */
- ir_node **args = get_Sync_preds_arr(sync);
+ emit_CopyB_prolog(F, rem, size);
- for (i = 0; i < get_Sync_n_preds(sync); i++) {
- lc_efprintf(env, F, "\tpush %1D\t\t\t\t/* push %+F on stack */\n", args[i], args[i]);
+ fprintf(F, "\trep movsd\t\t\t\t/* memcopy */\n");
+}
- if (mode_is_int(get_irn_mode(args[i]))) {
- args_size += 4;
- }
- else {
- args_size += 16;
- }
- }
+void emit_ia32_CopyB_i(const ir_node *irn, emit_env_t *emit_env) {
+ tarval *tv = get_ia32_Immop_tarval(irn);
+ int size = get_tarval_long(tv);
+ FILE *F = emit_env->out;
+
+ emit_CopyB_prolog(F, size & 0x3, size);
+
+ size >>= 2;
+ while (size--) {
+ fprintf(F, "\tmovsd\t\t\t\t/* memcopy unrolled */\n");
}
+}
- lc_efprintf(env, F, "\tcall %C\t\t\t/* %+F */\n", irn, irn);
- if (get_irn_op(sync) == op_Sync) {
- /* We had stack arguments: clear the stack */
- fprintf(F, "\tadd %d, ", args_size);
- if (emit_env->cg->has_alloca) {
- fprintf(F, "%ebp");
- }
- else {
- fprintf(F, "%esp");
- }
- fprintf(F, "\t\t\t\t/* clear stack after call */\n");
+
+/*******************************************
+ * _ _
+ * | | | |
+ * | |__ ___ _ __ ___ __| | ___ ___
+ * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
+ * | |_) | __/ | | | (_) | (_| | __/\__ \
+ * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
+ *
+ *******************************************/
+
+void emit_be_Call(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+
+ lc_efprintf(ia32_get_arg_env(), F, "\tcall %3S\t\t\t/* %+F(%+F) (be_Call) */\n", irn, irn, get_irn_n(irn, 2));
+}
+
+void emit_be_IncSP(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ unsigned offs = be_get_IncSP_offset(irn);
+ be_stack_dir_t dir = be_get_IncSP_direction(irn);
+
+ if (offs) {
+ lc_efprintf(ia32_get_arg_env(), F, "\tadd %1S,%s%u\t\t\t/* %+F (IncSP) */\n", irn,
+ (dir == be_stack_dir_along) ? " -" : " ", offs, irn);
}
+ else {
+ fprintf(F, "\t\t\t\t\t/* omitted IncSP with 0 */\n");
+ }
+}
+
+void emit_be_AddSP(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ lc_efprintf(ia32_get_arg_env(), F, "\tadd %1D, %1S\t\t\t/* %+F (AddSP) */\n", irn, irn, irn);
}
+
/***********************************************************************************
* _ __ _
* (_) / _| | |
***********************************************************************************/
/**
- * Emits code for a node.
+ * Enters the emitter functions for handled nodes into the generic
+ * pointer of an opcode.
*/
-void ia32_emit_node(ir_node *irn, void *env) {
- emit_env_t *emit_env = env;
- firm_dbg_module_t *mod = emit_env->mod;
- FILE *F = emit_env->out;
-
- DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
-
-#define IA32_EMIT(a) if (is_ia32_##a(irn)) { emit_ia32_##a(irn, emit_env); return; }
-#define EMIT(a) if (get_irn_opcode(irn) == iro_##a) { emit_##a(irn, emit_env); return; }
-
- /* generated int emitter functions */
- IA32_EMIT(Copy);
- IA32_EMIT(Perm);
-
- IA32_EMIT(Const);
-
- IA32_EMIT(Add);
- IA32_EMIT(Add_i);
- IA32_EMIT(Sub);
- IA32_EMIT(Sub_i);
- IA32_EMIT(Minus);
- IA32_EMIT(Inc);
- IA32_EMIT(Dec);
-
- IA32_EMIT(Max);
- IA32_EMIT(Min);
-
- IA32_EMIT(And);
- IA32_EMIT(And_i);
- IA32_EMIT(Or);
- IA32_EMIT(Or_i);
- IA32_EMIT(Eor);
- IA32_EMIT(Eor_i);
- IA32_EMIT(Not);
-
- IA32_EMIT(Shl);
- IA32_EMIT(Shl_i);
- IA32_EMIT(Shr);
- IA32_EMIT(Shr_i);
- IA32_EMIT(Shrs);
- IA32_EMIT(Shrs_i);
- IA32_EMIT(RotL);
- IA32_EMIT(RotL_i);
- IA32_EMIT(RotR);
-
- IA32_EMIT(Lea);
- IA32_EMIT(Lea_i);
-
- IA32_EMIT(Mul);
- IA32_EMIT(Mul_i);
-
- IA32_EMIT(Cltd);
- IA32_EMIT(DivMod);
+static void ia32_register_emitters(void) {
- IA32_EMIT(Store);
- IA32_EMIT(Load);
+#define IA32_EMIT(a) op_ia32_##a->ops.generic = (op_func)emit_ia32_##a
+#define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
+#define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
- /* generated floating point emitter */
- IA32_EMIT(fConst);
+ /* first clear the generic function pointer for all ops */
+ clear_irp_opcodes_generic_func();
- IA32_EMIT(fAdd);
- IA32_EMIT(fSub);
- IA32_EMIT(fMinus);
+ /* register all emitter functions defined in spec */
+ ia32_register_spec_emitters();
- IA32_EMIT(fMul);
- IA32_EMIT(fDiv);
-
- IA32_EMIT(fMin);
- IA32_EMIT(fMax);
-
- IA32_EMIT(fLoad);
- IA32_EMIT(fStore);
-
- /* other emitter functions */
+ /* other ia32 emitter functions */
IA32_EMIT(CondJmp);
- IA32_EMIT(CondJmp_i);
IA32_EMIT(SwitchJmp);
- IA32_EMIT(Call);
+ IA32_EMIT(CopyB);
+ IA32_EMIT(CopyB_i);
+ /* benode emitter */
+ BE_EMIT(Call);
+ BE_EMIT(IncSP);
+ // BE_EMIT(AddSP);
+
+ /* firm emitter */
EMIT(Jmp);
EMIT(Proj);
- ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
+#undef IA32_EMIT
+#undef BE_EMIT
+#undef EMIT
+}
+
+/**
+ * Emits code for a node.
+ */
+static void ia32_emit_node(const ir_node *irn, void *env) {
+ emit_env_t *emit_env = env;
+ firm_dbg_module_t *mod = emit_env->mod;
+ FILE *F = emit_env->out;
+ ir_op *op = get_irn_op(irn);
+
+ DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
+
+ if (op->ops.generic) {
+ void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
+ (*emit)(irn, env);
+ }
+ else {
+ ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
+ }
}
/**
* Walks over the nodes in a block connected by scheduling edges
* and emits code for each node.
*/
-void ia32_gen_block(ir_node *block, void *env) {
- ir_node *irn;
+static void ia32_gen_block(ir_node *block, void *env) {
+ const ir_node *irn;
if (! is_Block(block))
return;
/**
* Emits code for function start.
*/
-void ia32_emit_start(FILE *F, ir_graph *irg) {
+static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
const char *irg_name = get_entity_name(get_irg_entity(irg));
fprintf(F, "\t.text\n");
/**
* Emits code for function end
*/
-void ia32_emit_end(FILE *F, ir_graph *irg) {
+static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
const char *irg_name = get_entity_name(get_irg_entity(irg));
fprintf(F, "\tret\n");
* Sets labels for control flow nodes (jump target)
* TODO: Jump optimization
*/
-void ia32_gen_labels(ir_node *block, void *env) {
+static void ia32_gen_labels(ir_node *block, void *env) {
ir_node *pred;
int n = get_Block_n_cfgpreds(block);
}
/**
- * Main driver
+ * Main driver. Emits the code for one routine.
*/
void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
emit_env_t emit_env;
emit_env.arch_env = cg->arch_env;
emit_env.cg = cg;
- ia32_emit_start(F, irg);
+ /* set the global arch_env (needed by print hooks) */
+ arch_env = cg->arch_env;
+
+ ia32_register_emitters();
+
+ ia32_emit_func_prolog(F, irg);
irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
- ia32_emit_end(F, irg);
+ ia32_emit_func_epilog(F, irg);
}
projects / libfirm / blobdiff