#include "irprintf.h"
#include "irop_t.h"
#include "irargs_t.h"
+#include "irprog_t.h"
#include "../besched.h"
+#include "../benode_t.h"
#include "ia32_emitter.h"
#include "gen_ia32_emitter.h"
# define obstack_chunk_free free
#endif
+extern int obstack_printf(struct obstack *obst, char *fmt, ...);
+
#define SNPRINTF_BUF_LEN 128
static const arch_env_t *arch_env = NULL;
+/**
+ * Emits registers and/or address mode of a binary operation.
+ */
char *ia32_emit_binop(const ir_node *n) {
static char *buf = NULL;
+ /* verify that this function is never called on non-AM supporting operations */
+ assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
+
if (! buf) {
buf = xcalloc(1, SNPRINTF_BUF_LEN);
}
switch(get_ia32_op_type(n)) {
case ia32_Normal:
if (get_ia32_cnst(n)) {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, get_ia32_cnst(n));
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %s", n, get_ia32_cnst(n));
}
else {
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %4S", n, n);
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%3S, %4S", n, n);
}
break;
- case ia32_am_Source:
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%1D, %s", n, ia32_emit_am(n));
+ case ia32_AddrModeS:
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%4S, %s", n, ia32_emit_am(n));
break;
- case ia32_am_Dest:
- lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %4S", ia32_emit_am(n), n);
+ case ia32_AddrModeD:
+ if (get_ia32_cnst(n)) {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %s", ia32_emit_am(n), get_ia32_cnst(n));
+ }
+ else {
+ lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %3S", ia32_emit_am(n), n);
+ }
break;
default:
assert(0 && "unsupported op type");
return buf;
}
+/**
+ * Emits registers and/or address mode of a unary operation.
+ */
char *ia32_emit_unop(const ir_node *n) {
static char *buf = NULL;
return buf;
}
+/**
+ * Emits adressmode.
+ */
char *ia32_emit_am(const ir_node *n) {
ia32_am_flavour_t am_flav = get_ia32_am_flavour(n);
int had_output = 0;
char *s;
int size;
static struct obstack *obst = NULL;
+ ir_mode *mode = get_ia32_ls_mode(n);
+
+ if (! is_ia32_Lea(n))
+ assert(mode && "AM node must have ls_mode attribute set.");
if (! obst) {
obst = xcalloc(1, sizeof(*obst));
/* obstack_free with NULL results in an uninitialized obstack */
obstack_init(obst);
+ if (mode) {
+ switch (get_mode_size_bits(mode)) {
+ case 8:
+ obstack_printf(obst, "BYTE PTR ");
+ break;
+ case 16:
+ obstack_printf(obst, "WORD PTR ");
+ break;
+ case 32:
+ obstack_printf(obst, "DWORD PTR ");
+ break;
+ default:
+ assert(0 && "unsupported mode size");
+ }
+ }
+
obstack_printf(obst, "[");
if (am_flav & ia32_B) {
lc_eoprintf(ia32_get_arg_env(), obst, "%2S", n);
if (am_flav & ia32_S) {
- obstack_printf(obst, "*%d", get_ia32_am_scale(n));
+ obstack_printf(obst, "*%d", 1 << get_ia32_am_scale(n));
}
had_output = 1;
/**
* Returns the register at in position pos.
*/
-static const arch_register_t *get_in_reg(ir_node *irn, int pos) {
+static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
ir_node *op;
const arch_register_t *reg = NULL;
/**
* Returns the register at out position pos.
*/
-static const arch_register_t *get_out_reg(ir_node *irn, int pos) {
+static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
ir_node *proj;
const arch_register_t *reg = NULL;
- assert(get_irn_n_edges(irn) > pos && "Invalid OUT position");
-
/* 1st case: irn is not of mode_T, so it has only */
/* one OUT register -> good */
/* 2nd case: irn is of mode_T -> collect all Projs and ask the */
return reg;
}
-/**
- * Returns the number of the in register at position pos.
- */
-int get_ia32_reg_nr(ir_node *irn, int pos, int in_out) {
- const arch_register_t *reg;
-
- if (in_out == 1) {
- reg = get_in_reg(irn, pos);
- }
- else {
- reg = get_out_reg(irn, pos);
- }
-
- return arch_register_get_index(reg);
-}
-
enum io_direction {
IN_REG,
OUT_REG
reg = get_in_reg(irn, pos);
}
else {
+ /* destination address mode nodes don't have outputs */
+ if (is_ia32_irn(irn) && get_ia32_op_type(irn) == ia32_AddrModeD) {
+ return "MEM";
+ }
+
reg = get_out_reg(irn, pos);
}
if (!X)
return lc_arg_append(app, occ, "(null)", 6);
- buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
+ buf = get_ia32_reg_name(X, nr, occ->conversion == 'S' ? IN_REG : OUT_REG);
- lc_appendable_chadd(app, '%');
return lc_arg_append(app, occ, buf, strlen(buf));
}
/**
- * Returns the tarval or offset of an ia32 as a string.
+ * Returns the tarval, offset or scale of an ia32 as a string.
*/
static int ia32_const_to_str(lc_appendable_t *app,
const lc_arg_occ_t *occ, const lc_arg_value_t *arg)
buf = get_ia32_am_offs(X);
}
- return lc_arg_append(app, occ, buf, strlen(buf));
+ return buf ? lc_arg_append(app, occ, buf, strlen(buf)) : 0;
}
/**
if (!X)
return lc_arg_append(app, occ, "(null)", 6);
- if (get_mode_size_bits(get_irn_mode(X)) == 32)
- return lc_appendable_chadd(app, 's');
- else
- return lc_appendable_chadd(app, 'd');
+ return lc_appendable_chadd(app, get_mode_size_bits(get_irn_mode(X)) == 32 ? 's' : 'd');
}
/**
if(env == NULL) {
/* extend the firm printer */
env = firm_get_arg_env();
- //lc_arg_new_env();
lc_arg_register(env, "ia32:sreg", 'S', &ia32_reg_handler);
lc_arg_register(env, "ia32:dreg", 'D', &ia32_reg_handler);
/**
* Emits the jump sequence for a conditional jump (cmp + jmp_true + jmp_false)
*/
-static void finish_CondJmp(FILE *F, ir_node *irn) {
+static void finish_CondJmp(FILE *F, const ir_node *irn) {
const ir_node *proj;
const ir_edge_t *edge;
char buf[SNPRINTF_BUF_LEN];
/**
* Emits code for conditional jump with two variables.
*/
-static void emit_ia32_CondJmp(ir_node *irn, emit_env_t *env) {
+static void emit_ia32_CondJmp(const ir_node *irn, emit_env_t *env) {
FILE *F = env->out;
- lc_efprintf(ia32_get_arg_env(), F, "\tcmp %2S, %1S\t\t\t/* CondJmp(%+F, %+F) */\n", irn, irn,
- get_irn_n(irn, 0), get_irn_n(irn, 1));
+ lc_efprintf(ia32_get_arg_env(), F, "\tcmp %s\t\t\t/* CondJmp(%+F, %+F) */\n",
+ ia32_emit_binop(irn), get_irn_n(irn, 0), get_irn_n(irn, 1));
finish_CondJmp(F, irn);
}
/**
* Emits code for conditional jump with immediate.
*/
-void emit_ia32_CondJmp_i(ir_node *irn, emit_env_t *env) {
+void emit_ia32_CondJmp_i(const ir_node *irn, emit_env_t *env) {
FILE *F = env->out;
- lc_efprintf(ia32_get_arg_env(), F, "\tcmp %C, %1S\t\t\t/* CondJmp_i(%+F) */\n", irn, irn, get_irn_n(irn, 0));
+ lc_efprintf(ia32_get_arg_env(), F, "\tcmp %s\t\t\t/* CondJmp_i(%+F) */\n",
+ ia32_emit_binop(irn), get_irn_n(irn, 0));
finish_CondJmp(F, irn);
}
if (do_jmp_tbl) {
/* emit the table */
if (tbl.min_value != 0) {
- fprintf(F, "\tcmpl %lu, -%d", interval, tbl.min_value);
- lc_efprintf(env, F, "(%1S)\t\t/* first switch value is not 0 */\n", irn);
+ lc_efprintf(env, F, "\tcmpl %lu, -%d(%1S)\t\t/* first switch value is not 0 */\n",
+ interval, tbl.min_value, irn);
}
else {
- fprintf(F, "\tcmpl %lu, ", interval);
- lc_efprintf(env, F, "%1S\t\t\t/* compare for switch */\n", irn);
+ lc_efprintf(env, F, "\tcmpl %lu, %1S\t\t\t/* compare for switch */\n", interval, irn);
}
fprintf(F, "\tja %s\t\t\t/* default jump if out of range */\n", get_cfop_target(tbl.defProj, buf));
if (tbl.num_branches > 1) {
/* create table */
- //fprintf(F, "\tjmp *%s", tbl.label);
- lc_efprintf(env, F, "\tjmp *%s(,%1S,4)\t\t/* get jump table entry as target */\n", tbl.label, irn);
+ lc_efprintf(env, F, "\tjmp [%1S*4+%s]\t\t/* get jump table entry as target */\n", irn, tbl.label);
fprintf(F, "\t.section\t.rodata\t\t/* start jump table */\n");
fprintf(F, "\t.align 4\n");
}
else { // no jump table
for (i = 0; i < tbl.num_branches; ++i) {
- fprintf(F, "\tcmpl %d, ", tbl.branches[i].value);
- lc_efprintf(env, F, "%1S", irn);
- fprintf(F, "\t\t\t/* case %d */\n", tbl.branches[i].value);
+ lc_efprintf(env, F, "\tcmpl %d, %1S\t\t\t/* case %d */\n", tbl.branches[i].value, irn, i);
fprintf(F, "\tje %s\n", get_cfop_target(tbl.branches[i].target, buf));
}
/**
* Emits code for a unconditional jump.
*/
-void emit_Jmp(ir_node *irn, emit_env_t *env) {
+void emit_Jmp(const ir_node *irn, emit_env_t *env) {
FILE *F = env->out;
char buf[SNPRINTF_BUF_LEN];
/**
* Emits code for a proj -> node
*/
-void emit_Proj(ir_node *irn, emit_env_t *env) {
+void emit_Proj(const ir_node *irn, emit_env_t *env) {
ir_node *pred = get_Proj_pred(irn);
if (get_irn_op(pred) == op_Start) {
}
}
-void emit_ia32_CopyB(ir_node *irn, emit_env_t *emit_env) {
+void emit_ia32_CopyB(const ir_node *irn, emit_env_t *emit_env) {
FILE *F = emit_env->out;
tarval *tv = get_ia32_Immop_tarval(irn);
int rem = get_tarval_long(tv);
fprintf(F, "\trep movsd\t\t\t\t/* memcopy */\n");
}
-void emit_ia32_CopyB_i(ir_node *irn, emit_env_t *emit_env) {
+void emit_ia32_CopyB_i(const ir_node *irn, emit_env_t *emit_env) {
tarval *tv = get_ia32_Immop_tarval(irn);
int size = get_tarval_long(tv);
FILE *F = emit_env->out;
}
}
-/********************
- * _____ _ _
- * / ____| | | |
- * | | __ _| | |
- * | | / _` | | |
- * | |___| (_| | | |
- * \_____\__,_|_|_|
+
+
+/*******************************************
+ * _ _
+ * | | | |
+ * | |__ ___ _ __ ___ __| | ___ ___
+ * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
+ * | |_) | __/ | | | (_) | (_| | __/\__ \
+ * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
*
- ********************/
+ *******************************************/
+
+void emit_be_Call(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ entity *ent = be_Call_get_entity(irn);
+
+ fprintf(F, "\tcall ");
+
+ if (ent) {
+ fprintf(F, "%s", get_entity_name(ent));
+ }
+ else {
+ lc_efprintf(ia32_get_arg_env(), F, "%1D", get_irn_n(irn, be_pos_Call_ptr));
+ }
+
+ ir_fprintf(F, "\t\t\t/* %+F (be_Call) */\n", irn);
+}
+
+void emit_be_IncSP(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ unsigned offs = be_get_IncSP_offset(irn);
+ be_stack_dir_t dir = be_get_IncSP_direction(irn);
+
+ if (offs) {
+ lc_efprintf(ia32_get_arg_env(), F, "\tadd %1S,%s%u\t\t\t/* %+F (IncSP) */\n", irn,
+ (dir == be_stack_dir_along) ? " -" : " ", offs, irn);
+ }
+ else {
+ fprintf(F, "\t\t\t\t\t/* omitted IncSP with 0 */\n");
+ }
+}
+
+void emit_be_SetSP(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
-void emit_ia32_Call(ir_node *irn, emit_env_t *emit_env) {
+ lc_efprintf(ia32_get_arg_env(), F, "\tmov %1D,%3S\t\t\t/* restore SP */\n", irn, irn);
}
+void emit_be_Copy(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+ lc_efprintf(ia32_get_arg_env(), F, "\tmov %1D,%1S\t\t\t/* %+F */\n", irn, irn, irn);
+}
+
+void emit_be_Perm(const ir_node *irn, emit_env_t *emit_env) {
+ FILE *F = emit_env->out;
+
+ lc_efprintf(ia32_get_arg_env(), F, "\txchg %1S, %2S\t\t\t/* %+F(%1A, %2A) */\n", irn, irn, irn);
+}
/***********************************************************************************
* _ __ _
***********************************************************************************/
/**
- * Emits code for a node.
+ * Enters the emitter functions for handled nodes into the generic
+ * pointer of an opcode.
*/
-void ia32_emit_node(ir_node *irn, void *env) {
- emit_env_t *emit_env = env;
- firm_dbg_module_t *mod = emit_env->mod;
- FILE *F = emit_env->out;
-
- DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
-
-#define IA32_EMIT(a) if (is_ia32_##a(irn)) { emit_ia32_##a(irn, emit_env); return; }
-#define EMIT(a) if (get_irn_opcode(irn) == iro_##a) { emit_##a(irn, emit_env); return; }
-
- /* generated int emitter functions */
- IA32_EMIT(Const);
-
- IA32_EMIT(Add);
- IA32_EMIT(Sub);
- IA32_EMIT(Minus);
- IA32_EMIT(Inc);
- IA32_EMIT(Dec);
-
- IA32_EMIT(Max);
- IA32_EMIT(Min);
- IA32_EMIT(CMov);
+static void ia32_register_emitters(void) {
- IA32_EMIT(And);
- IA32_EMIT(Or);
- IA32_EMIT(Eor);
- IA32_EMIT(Not);
+#define IA32_EMIT(a) op_ia32_##a->ops.generic = (op_func)emit_ia32_##a
+#define EMIT(a) op_##a->ops.generic = (op_func)emit_##a
+#define BE_EMIT(a) op_be_##a->ops.generic = (op_func)emit_be_##a
- IA32_EMIT(Shl);
- IA32_EMIT(Shr);
- IA32_EMIT(Shrs);
- IA32_EMIT(RotL);
- IA32_EMIT(RotR);
+ /* first clear the generic function pointer for all ops */
+ clear_irp_opcodes_generic_func();
- IA32_EMIT(Lea);
-
- IA32_EMIT(Mul);
-
- IA32_EMIT(Cdq);
- IA32_EMIT(DivMod);
-
- IA32_EMIT(Store);
- IA32_EMIT(Load);
+ /* register all emitter functions defined in spec */
+ ia32_register_spec_emitters();
+ /* other ia32 emitter functions */
+ IA32_EMIT(CondJmp);
+ IA32_EMIT(SwitchJmp);
IA32_EMIT(CopyB);
IA32_EMIT(CopyB_i);
- /* generated floating point emitter */
- IA32_EMIT(fConst);
-
- IA32_EMIT(fAdd);
- IA32_EMIT(fSub);
+ /* benode emitter */
+ BE_EMIT(Call);
+ BE_EMIT(IncSP);
+ BE_EMIT(SetSP);
+ BE_EMIT(Copy);
+ BE_EMIT(Perm);
- IA32_EMIT(fMul);
- IA32_EMIT(fDiv);
-
- IA32_EMIT(fMin);
- IA32_EMIT(fMax);
+ /* firm emitter */
+ EMIT(Jmp);
+ EMIT(Proj);
- IA32_EMIT(fLoad);
- IA32_EMIT(fStore);
+#undef IA32_EMIT
+#undef BE_EMIT
+#undef EMIT
+}
- /* other emitter functions */
- IA32_EMIT(CondJmp);
- IA32_EMIT(SwitchJmp);
- IA32_EMIT(Call);
+/**
+ * Emits code for a node.
+ */
+static void ia32_emit_node(const ir_node *irn, void *env) {
+ emit_env_t *emit_env = env;
+ firm_dbg_module_t *mod = emit_env->mod;
+ FILE *F = emit_env->out;
+ ir_op *op = get_irn_op(irn);
- EMIT(Jmp);
- EMIT(Proj);
+ DBG((mod, LEVEL_1, "emitting code for %+F\n", irn));
- ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
+ if (op->ops.generic) {
+ void (*emit)(const ir_node *, void *) = (void (*)(const ir_node *, void *))op->ops.generic;
+ (*emit)(irn, env);
+ }
+ else {
+ ir_fprintf(F, "\t\t\t\t\t/* %+F */\n", irn);
+ }
}
/**
* Walks over the nodes in a block connected by scheduling edges
* and emits code for each node.
*/
-void ia32_gen_block(ir_node *block, void *env) {
- ir_node *irn;
+static void ia32_gen_block(ir_node *block, void *env) {
+ const ir_node *irn;
if (! is_Block(block))
return;
/**
* Emits code for function start.
*/
-void ia32_emit_start(FILE *F, ir_graph *irg) {
+static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
const char *irg_name = get_entity_name(get_irg_entity(irg));
fprintf(F, "\t.text\n");
/**
* Emits code for function end
*/
-void ia32_emit_end(FILE *F, ir_graph *irg) {
+static void ia32_emit_func_epilog(FILE *F, ir_graph *irg) {
const char *irg_name = get_entity_name(get_irg_entity(irg));
fprintf(F, "\tret\n");
* Sets labels for control flow nodes (jump target)
* TODO: Jump optimization
*/
-void ia32_gen_labels(ir_node *block, void *env) {
+static void ia32_gen_labels(ir_node *block, void *env) {
ir_node *pred;
int n = get_Block_n_cfgpreds(block);
}
/**
- * Main driver
+ * Main driver. Emits the code for one routine.
*/
void ia32_gen_routine(FILE *F, ir_graph *irg, const ia32_code_gen_t *cg) {
emit_env_t emit_env;
/* set the global arch_env (needed by print hooks) */
arch_env = cg->arch_env;
- ia32_emit_start(F, irg);
+ ia32_register_emitters();
+
+ ia32_emit_func_prolog(F, irg);
irg_block_walk_graph(irg, ia32_gen_labels, NULL, &emit_env);
irg_walk_blkwise_graph(irg, NULL, ia32_gen_block, &emit_env);
- ia32_emit_end(F, irg);
+ ia32_emit_func_epilog(F, irg);
}
projects / libfirm / blobdiff