assert(reg && "no in register found");
- /* in case of a joker register: just return a valid register */
- if (arch_register_type_is(reg, joker)) {
+ if(reg == &ia32_gp_regs[REG_GP_NOREG])
+ panic("trying to emit noreg");
+
+ /* in case of unknown register: just return a valid register */
+ if (reg == &ia32_gp_regs[REG_GP_UKNWN]) {
const arch_register_req_t *req;
/* ask for the requirements */
case 64:
return 'l';
case 80:
+ case 96:
return 't';
}
} else {
static
int produces_result(const ir_node *node) {
- return !(is_ia32_St(node) ||
- is_ia32_CondJmp(node) ||
- is_ia32_xCondJmp(node) ||
- is_ia32_CmpSet(node) ||
- is_ia32_xCmpSet(node) ||
- is_ia32_SwitchJmp(node));
+ return
+ !is_ia32_CmpSet(node) &&
+ !is_ia32_CondJmp(node) &&
+ !is_ia32_St(node) &&
+ !is_ia32_SwitchJmp(node) &&
+ !is_ia32_TestJmp(node) &&
+ !is_ia32_xCmpSet(node) &&
+ !is_ia32_xCondJmp(node);
}
static
void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
{
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_x87_attr_t *attr = get_ia32_x87_attr_const(node);
assert(pos < 3);
be_emit_char(env, '%');
return;
case ia32_ImmSymConst:
ent = get_ia32_Immop_symconst(node);
- mark_entity_visited(ent);
+ set_entity_backend_marked(ent, 1);
id = get_entity_ld_ident(ent);
be_emit_ident(env, id);
return;
- case ia32_ImmAsm:
case ia32_ImmNone:
break;
}
}
+static
+void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node);
/**
* Emits registers and/or address mode of a binary operation.
*/
void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) {
- switch(get_ia32_op_type(node)) {
- case ia32_Normal:
- if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
- ia32_emit_immediate(env, node);
- be_emit_cstring(env, ", ");
- ia32_emit_source_register(env, node, 2);
- } else {
- const arch_register_t *in1 = get_in_reg(env, node, 2);
- const arch_register_t *in2 = get_in_reg(env, node, 3);
- const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
- const arch_register_t *in;
- const char *in_name;
-
- in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
- out = out ? out : in1;
- in_name = arch_register_get_name(in);
+ int right_pos;
+ const ir_node *right_op;
- if (is_ia32_emit_cl(node)) {
- assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
- in_name = "cl";
- }
-
- be_emit_char(env, '%');
- be_emit_string(env, in_name);
- be_emit_cstring(env, ", %");
- be_emit_string(env, arch_register_get_name(out));
- }
+ switch(get_ia32_op_type(node)) {
+ case ia32_Normal:
+ right_op = get_irn_n(node, 3);
+ if(is_ia32_Immediate(right_op)) {
+ emit_ia32_Immediate(env, right_op);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 2);
break;
- case ia32_AddrModeS:
- ia32_emit_am(env, node);
+ } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ ia32_emit_immediate(env, node);
be_emit_cstring(env, ", ");
- if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
- assert(!produces_result(node) && "Source AM with Const must not produce result");
- ia32_emit_immediate(env, node);
- } else if (produces_result(node)) {
- ia32_emit_dest_register(env, node, 0);
- } else {
- ia32_emit_source_register(env, node, 2);
+ ia32_emit_source_register(env, node, 2);
+ } else {
+ const arch_register_t *in1 = get_in_reg(env, node, 2);
+ const arch_register_t *in2 = get_in_reg(env, node, 3);
+ const arch_register_t *out = produces_result(node) ? get_out_reg(env, node, 0) : NULL;
+ const arch_register_t *in;
+ const char *in_name;
+
+ in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
+ out = out ? out : in1;
+ in_name = arch_register_get_name(in);
+
+ if (is_ia32_emit_cl(node)) {
+ assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
+ in_name = "cl";
}
- break;
- case ia32_AddrModeD:
- if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
- ia32_emit_immediate(env, node);
- be_emit_cstring(env, ", ");
- ia32_emit_am(env, node);
- } else {
- const arch_register_t *in1 = get_in_reg(env, node,
- get_irn_arity(node) == 5 ? 3 : 2);
- ir_mode *mode = get_ia32_ls_mode(node);
- const char *in_name;
- in_name = ia32_get_reg_name_for_mode(env, mode, in1);
+ be_emit_char(env, '%');
+ be_emit_string(env, in_name);
+ be_emit_cstring(env, ", %");
+ be_emit_string(env, arch_register_get_name(out));
+ }
+ break;
+ case ia32_AddrModeS:
+ ia32_emit_am(env, node);
+ be_emit_cstring(env, ", ");
+ if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ assert(!produces_result(node) && "Source AM with Const must not produce result");
+ ia32_emit_immediate(env, node);
+ } else if (produces_result(node)) {
+ ia32_emit_dest_register(env, node, 0);
+ } else {
+ ia32_emit_source_register(env, node, 2);
+ }
+ break;
+ case ia32_AddrModeD:
+ right_pos = get_irn_arity(node) == 5 ? 3 : 2;
+ right_op = get_irn_n(node, right_pos);
+ if(is_ia32_Immediate(right_op)) {
+ emit_ia32_Immediate(env, right_op);
+ be_emit_cstring(env, ", ");
+ ia32_emit_am(env, node);
+ break;
+ } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ ia32_emit_immediate(env, node);
+ be_emit_cstring(env, ", ");
+ ia32_emit_am(env, node);
+ } else {
+ const arch_register_t *in1 = get_in_reg(env, node, right_pos);
+ ir_mode *mode = get_ia32_ls_mode(node);
+ const char *in_name;
- if (is_ia32_emit_cl(node)) {
- assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
- in_name = "cl";
- }
+ in_name = ia32_get_reg_name_for_mode(env, mode, in1);
- be_emit_char(env, '%');
- be_emit_string(env, in_name);
- be_emit_cstring(env, ", ");
- ia32_emit_am(env, node);
+ if (is_ia32_emit_cl(node)) {
+ assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
+ in_name = "cl";
}
- break;
- default:
- assert(0 && "unsupported op type");
+
+ be_emit_char(env, '%');
+ be_emit_string(env, in_name);
+ be_emit_cstring(env, ", ");
+ ia32_emit_am(env, node);
+ }
+ break;
+ default:
+ assert(0 && "unsupported op type");
}
}
// should not happen...
assert(0);
} else {
- ia32_attr_t *attr = get_ia32_attr(node);
- const arch_register_t *in1 = attr->x87[0];
- const arch_register_t *in2 = attr->x87[1];
- const arch_register_t *out = attr->x87[2];
+ const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
+ const arch_register_t *in1 = x87_attr->x87[0];
+ const arch_register_t *in2 = x87_attr->x87[1];
+ const arch_register_t *out = x87_attr->x87[2];
const arch_register_t *in;
in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
}
}
+void ia32_emit_am_or_dest_register(ia32_emit_env_t *env, const ir_node *node,
+ int pos) {
+ if(get_ia32_op_type(node) == ia32_Normal) {
+ ia32_emit_dest_register(env, node, pos);
+ } else {
+ assert(get_ia32_op_type(node) == ia32_AddrModeD);
+ ia32_emit_am(env, node);
+ }
+}
+
/**
* Emits registers and/or address mode of a unary operation.
*/
-void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) {
+void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node, int pos) {
+ const ir_node *op;
+
switch(get_ia32_op_type(node)) {
- case ia32_Normal:
- if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
- ia32_emit_immediate(env, node);
- } else {
- if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) {
- ia32_emit_source_register(env, node, 3);
- } else if(is_ia32_IDiv(node) || is_ia32_Div(node)) {
- ia32_emit_source_register(env, node, 4);
- } else if(is_ia32_Push(node)) {
- ia32_emit_source_register(env, node, 2);
- } else if(is_ia32_Pop(node)) {
- ia32_emit_dest_register(env, node, 1);
- } else {
- ia32_emit_dest_register(env, node, 0);
- }
- }
- break;
- case ia32_AddrModeS:
- case ia32_AddrModeD:
- ia32_emit_am(env, node);
- break;
- default:
- assert(0 && "unsupported op type");
+ case ia32_Normal:
+ op = get_irn_n(node, pos);
+ if (is_ia32_Immediate(op)) {
+ emit_ia32_Immediate(env, op);
+ } else if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) {
+ ia32_emit_immediate(env, node);
+ } else {
+ ia32_emit_source_register(env, node, pos);
+ }
+ break;
+ case ia32_AddrModeS:
+ case ia32_AddrModeD:
+ ia32_emit_am(env, node);
+ break;
+ default:
+ assert(0 && "unsupported op type");
}
}
if (ent != NULL) {
ident *id;
- mark_entity_visited(ent);
+ set_entity_backend_marked(ent, 1);
id = get_entity_ld_ident(ent);
if (is_ia32_am_sc_sign(node))
be_emit_char(env, '-');
* returns the condition code
*/
static
-const char *get_cmp_suffix(int cmp_code)
+const char *get_cmp_suffix(pn_Cmp cmp_code)
{
assert( (cmp2condition_s[cmp_code & 15].num) == (cmp_code & 15));
assert( (cmp2condition_u[cmp_code & 7].num) == (cmp_code & 7));
return get_irn_link(irn);
}
+/**
+ * Emits a block label for the given block.
+ */
static
void ia32_emit_block_name(ia32_emit_env_t *env, const ir_node *block)
{
}
/**
- * Returns the target label for a control flow node.
+ * Emits the target label for a control flow node.
*/
static
void ia32_emit_cfop_target(ia32_emit_env_t * env, const ir_node *node) {
*/
static
void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) {
- if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) {
- be_emit_cstring(env, "\ttest ");
- ia32_emit_immediate(env, node);
- be_emit_cstring(env, ", ");
- ia32_emit_source_register(env, node, 0);
- be_emit_finish_line_gas(env, node);
- } else {
- be_emit_cstring(env, "\ttest ");
- ia32_emit_source_register(env, node, 1);
- be_emit_cstring(env, ", ");
- ia32_emit_source_register(env, node, 0);
- be_emit_finish_line_gas(env, node);
- }
+ be_emit_cstring(env, "\ttest ");
+ ia32_emit_binop(env, node);
+ be_emit_finish_line_gas(env, node);
+
finish_CondJmp(env, node, mode_Iu, get_ia32_pncode(node));
}
*/
static
void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
- ia32_attr_t *attr = get_ia32_attr(node);
- const char *reg = attr->x87[1]->name;
- long pnc = get_ia32_pncode(node);
+ const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
+ const char *reg = x87_attr->x87[1]->name;
+ long pnc = get_ia32_pncode(node);
switch (get_ia32_irn_opcode(node)) {
case iro_ia32_fcomrJmp:
pnc = get_inversed_pnc(pnc);
- reg = attr->x87[0]->name;
+ reg = x87_attr->x87[0]->name;
case iro_ia32_fcomJmp:
default:
be_emit_cstring(env, "\tfucom ");
break;
case iro_ia32_fcomrpJmp:
pnc = get_inversed_pnc(pnc);
- reg = attr->x87[0]->name;
+ reg = x87_attr->x87[0]->name;
case iro_ia32_fcompJmp:
be_emit_cstring(env, "\tfucomp ");
break;
}
static
-void CMov_emitter(ia32_emit_env_t *env, const ir_node *node) {
+void emit_register_or_immediate(ia32_emit_env_t *env, const ir_node *node,
+ int pos)
+{
+ ir_node *op = get_irn_n(node, pos);
+ if(is_ia32_Immediate(op)) {
+ emit_ia32_Immediate(env, op);
+ } else {
+ ia32_emit_source_register(env, node, pos);
+ }
+}
+
+static
+int is_ia32_Immediate_0(const ir_node *node)
+{
+ const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
+
+ return attr->offset == 0 && attr->symconst == NULL;
+}
+
+static
+void CMov_emitter(ia32_emit_env_t *env, const ir_node *node)
+{
long pnc = get_ia32_pncode(node);
- int is_PsiCondCMov = is_ia32_PsiCondCMov(node);
- int idx_left = 2 - is_PsiCondCMov;
- int idx_right = 3 - is_PsiCondCMov;
const arch_register_t *in1, *in2, *out;
out = arch_get_irn_register(env->arch_env, node);
- in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_left));
- in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, idx_right));
+ in1 = arch_get_irn_register(env->arch_env, get_irn_n(node, 2));
+ in2 = arch_get_irn_register(env->arch_env, get_irn_n(node, 3));
/* we have to emit the cmp first, because the destination register */
/* could be one of the compare registers */
if (is_ia32_CmpCMov(node)) {
- be_emit_cstring(env, "\tcmp ");
- ia32_emit_source_register(env, node, 1);
- be_emit_cstring(env, ", ");
- ia32_emit_source_register(env, node, 0);
+ long pncr = pnc & ~ia32_pn_Cmp_Unsigned;
+ ir_node *cmp_right = get_irn_n(node, 1);
+
+ if( (pncr == pn_Cmp_Eq || pncr == pn_Cmp_Lg)
+ && is_ia32_Immediate(cmp_right)
+ && is_ia32_Immediate_0(cmp_right)) {
+ be_emit_cstring(env, "\ttest ");
+ ia32_emit_source_register(env, node, 0);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ } else {
+ be_emit_cstring(env, "\tcmp ");
+ emit_register_or_immediate(env, node, 1);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, 0);
+ }
} else if (is_ia32_xCmpCMov(node)) {
be_emit_cstring(env, "\tucomis");
ia32_emit_mode_suffix_mode(env, get_irn_mode(node));
ia32_emit_source_register(env, node, 1);
be_emit_cstring(env, ", ");
ia32_emit_source_register(env, node, 0);
- } else if (is_PsiCondCMov) {
- /* omit compare because flags are already set by And/Or */
- be_emit_cstring(env, "\ttest ");
- ia32_emit_source_register(env, node, 0);
- be_emit_cstring(env, ", ");
- ia32_emit_source_register(env, node, 0);
} else {
assert(0 && "unsupported CMov");
}
} else if (REGS_ARE_EQUAL(out, in1)) {
ir_node *n = (ir_node*) node;
/* true in == out -> need complement compare and exchange true and default in */
- ir_node *t = get_irn_n(n, idx_left);
- set_irn_n(n, idx_left, get_irn_n(n, idx_right));
- set_irn_n(n, idx_right, t);
+ ir_node *t = get_irn_n(n, 2);
+ set_irn_n(n, 2, get_irn_n(n, 3));
+ set_irn_n(n, 3, t);
pnc = get_negated_pnc(pnc, get_irn_mode(node));
} else {
/* out is different from in: need copy default -> out */
- if (is_PsiCondCMov) {
- be_emit_cstring(env, "\tmovl ");
- ia32_emit_dest_register(env, node, 2);
- be_emit_cstring(env, ", ");
- ia32_emit_dest_register(env, node, 0);
- } else {
- be_emit_cstring(env, "\tmovl ");
- ia32_emit_source_register(env, node, 3);
- be_emit_cstring(env, ", ");
- ia32_emit_dest_register(env, node, 0);
- }
- be_emit_finish_line_gas(env, node);
- }
-
- if (is_PsiCondCMov) {
- be_emit_cstring(env, "\tcmov");
- ia32_emit_cmp_suffix(env, pnc);
- be_emit_cstring(env, "l ");
- ia32_emit_source_register(env, node, 1);
- be_emit_cstring(env, ", ");
- ia32_emit_dest_register(env, node, 0);
- } else {
- be_emit_cstring(env, "\tcmov");
- ia32_emit_cmp_suffix(env, pnc);
- be_emit_cstring(env, "l ");
- ia32_emit_source_register(env, node, 2);
+ be_emit_cstring(env, "\tmovl ");
+ ia32_emit_source_register(env, node, n_ia32_CmpCMov_val_false);
be_emit_cstring(env, ", ");
ia32_emit_dest_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
}
- be_emit_finish_line_gas(env, node);
-}
-static
-void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node) {
- CMov_emitter(env, node);
+ be_emit_cstring(env, "\tcmov");
+ ia32_emit_cmp_suffix(env, pnc);
+ be_emit_cstring(env, "l ");
+ ia32_emit_source_register(env, node, n_ia32_CmpCMov_val_true);
+ be_emit_cstring(env, ", ");
+ ia32_emit_dest_register(env, node, 0);
+ be_emit_finish_line_gas(env, node);
}
static
-void emit_ia32_PsiCondCMov(ia32_emit_env_t *env, const ir_node *node) {
+void emit_ia32_CmpCMov(ia32_emit_env_t *env, const ir_node *node)
+{
CMov_emitter(env, node);
}
static
-void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node) {
+void emit_ia32_xCmpCMov(ia32_emit_env_t *env, const ir_node *node)
+{
CMov_emitter(env, node);
}
static
-void Set_emitter(ia32_emit_env_t *env, const ir_node *node, ir_mode *mode) {
- int pnc = get_ia32_pncode(node);
+void Set_emitter(ia32_emit_env_t *env, const ir_node *node)
+{
+ long pnc = get_ia32_pncode(node);
const char *reg8bit;
const arch_register_t *out;
reg8bit = ia32_get_mapped_reg_name(env->isa->regs_8bit, out);
if (is_ia32_CmpSet(node)) {
- be_emit_cstring(env, "\tcmp ");
- ia32_emit_binop(env, node);
+ long pncr = pnc & ~ia32_pn_Cmp_Unsigned;
+ ir_node *cmp_right = get_irn_n(node, n_ia32_CmpSet_cmp_right);
+
+ if( (pncr == pn_Cmp_Eq || pncr == pn_Cmp_Lg)
+ && is_ia32_Immediate(cmp_right)
+ && is_ia32_Immediate_0(cmp_right)) {
+ be_emit_cstring(env, "\ttest ");
+ ia32_emit_source_register(env, node, n_ia32_CmpSet_cmp_left);
+ be_emit_cstring(env, ", ");
+ ia32_emit_source_register(env, node, n_ia32_CmpSet_cmp_left);
+ } else {
+ be_emit_cstring(env, "\tcmp ");
+ ia32_emit_binop(env, node);
+ }
} else if (is_ia32_xCmpSet(node)) {
be_emit_cstring(env, "\tucomis");
ia32_emit_mode_suffix_mode(env, get_irn_mode(get_irn_n(node, 2)));
be_emit_char(env, ' ');
ia32_emit_binop(env, node);
- } else if (is_ia32_PsiCondSet(node)) {
- be_emit_cstring(env, "\tcmp $0, ");
- ia32_emit_source_register(env, node, 0);
} else {
assert(0 && "unsupported Set");
}
static
void emit_ia32_CmpSet(ia32_emit_env_t *env, const ir_node *node) {
- Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
-}
-
-static
-void emit_ia32_PsiCondSet(ia32_emit_env_t *env, const ir_node *node) {
- Set_emitter(env, node, get_irn_mode(get_irn_n(node, 0)));
+ Set_emitter(env, node);
}
static
void emit_ia32_xCmpSet(ia32_emit_env_t *env, const ir_node *node) {
- Set_emitter(env, node, get_irn_mode(get_irn_n(node, 2)));
+ Set_emitter(env, node);
}
static
/* jump table for switch generation */
typedef struct _jmp_tbl_t {
ir_node *defProj; /**< default target */
- int min_value; /**< smallest switch case */
- int max_value; /**< largest switch case */
- int num_branches; /**< number of jumps */
+ long min_value; /**< smallest switch case */
+ long max_value; /**< largest switch case */
+ long num_branches; /**< number of jumps */
char *label; /**< label of the jump table */
branch_t *branches; /**< jump array */
} jmp_tbl_t;
static
void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
{
- ia32_attr_t *attr = get_ia32_attr(node);
+ const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
- if(attr->am_sc != NULL) {
- ident *id = get_entity_ld_ident(attr->am_sc);
+ be_emit_char(env, '$');
+ if(attr->symconst != NULL) {
+ ident *id = get_entity_ld_ident(attr->symconst);
- if(attr->data.am_sc_sign)
+ if(attr->attr.data.am_sc_sign)
be_emit_char(env, '-');
be_emit_ident(env, id);
}
- if(attr->cnst_val.tv != NULL) {
- if(attr->am_sc != NULL)
+ if(attr->symconst == NULL || attr->offset != 0) {
+ if(attr->symconst != NULL)
be_emit_char(env, '+');
- else
- be_emit_char(env, '$');
- be_emit_tarval(env, attr->cnst_val.tv);
+ be_emit_irprintf(env->emit, "%d", attr->offset);
}
}
const char *s)
{
const arch_register_t *reg;
- const char *reg_name;
- char c;
- char modifier = 0;
- int num = -1;
- ia32_attr_t *attr;
- int n_outs;
- int p;
+ const char *reg_name;
+ char c;
+ char modifier = 0;
+ int num = -1;
+ const ia32_attr_t *attr;
+ int n_outs;
+ int p;
assert(*s == '%');
c = *(++s);
}
/* get register */
- attr = get_ia32_attr(node);
- n_outs = attr->data.n_res;
+ attr = get_ia32_attr_const(node);
+ n_outs = ARR_LEN(attr->slots);
if(num < n_outs) {
reg = get_out_reg(env, node, num);
} else {
static
void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
{
- ia32_attr_t *attr = get_ia32_attr(node);
- ident *asm_text = attr->cnst_val.asm_text;
- const char *s = get_id_str(asm_text);
+ const void *gen_attr = get_irn_generic_attr_const(node);
+ const ia32_asm_attr_t *attr
+ = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, gen_attr);
+ ident *asm_text = attr->asm_text;
+ const char *s = get_id_str(asm_text);
be_emit_cstring(env, "# Begin ASM \t");
be_emit_finish_line_gas(env, node);
if (REGS_ARE_EQUAL(in_reg, &ia32_gp_regs[REG_EAX]) &&
REGS_ARE_EQUAL(out_reg, in_reg) &&
- signed_mode)
+ signed_mode &&
+ smaller_bits == 16)
{
/* argument and result are both in EAX and */
- /* signedness is ok: -> use converts */
- if (smaller_bits == 8) {
- be_emit_cstring(env, "\tcbtw");
- } else if (smaller_bits == 16) {
- be_emit_cstring(env, "\tcwtl");
- } else {
- assert(0);
- }
+ /* signedness is ok: -> use the smaller cwtl opcode */
+ be_emit_cstring(env, "\tcwtl");
} else {
const char *sreg = ia32_get_reg_name_for_mode(env, smaller_mode, in_reg);
be_emit_cstring(env, "\tcall ");
if (ent) {
- mark_entity_visited(ent);
+ set_entity_backend_marked(ent, 1);
be_emit_string(env, get_entity_ld_name(ent));
} else {
be_emit_char(env, '*');
}
static
-void emit_be_Return(ia32_emit_env_t *env, const ir_node *node) {
+void emit_be_Return(ia32_emit_env_t *env, const ir_node *node)
+{
be_emit_cstring(env, "\tret");
be_emit_finish_line_gas(env, node);
}
static
-void emit_Nothing(ia32_emit_env_t *env, const ir_node *node) {
+void emit_Nothing(ia32_emit_env_t *env, const ir_node *node)
+{
+ (void) env;
+ (void) node;
}
IA32_EMIT(CJmp);
IA32_EMIT(CJmpAM);
IA32_EMIT(CmpCMov);
- IA32_EMIT(PsiCondCMov);
IA32_EMIT(CmpSet);
- IA32_EMIT(PsiCondSet);
IA32_EMIT(SwitchJmp);
IA32_EMIT(CopyB);
IA32_EMIT(CopyB_i);
ir_node *pred_block = get_nodes_block(pred);
/* we don't need labels for fallthrough blocks, however switch-jmps
- * are no fallthoughs */
+ * are no fallthroughs */
if(pred_block == prev &&
!(is_Proj(pred) && is_ia32_SwitchJmp(get_Proj_pred(pred)))) {
need_label = 0;
* Sets labels for control flow nodes (jump target)
*/
static
-void ia32_gen_labels(ir_node *block, void *data) {
+void ia32_gen_labels(ir_node *block, void *data)
+{
ir_node *pred;
int n = get_Block_n_cfgpreds(block);
+ (void) data;
for (n--; n >= 0; n--) {
pred = get_Block_cfgpred(block, n);
projects / libfirm / blobdiff