* @author Christian Wuerdig, Matthias Braun
* @version $Id$
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include <limits.h>
#define SNPRINTF_BUF_LEN 128
-static const arch_env_t *arch_env;
static const ia32_isa_t *isa;
static ia32_code_gen_t *cg;
static int do_pic;
return get_irn_link(block);
}
+/** Checks if the current block is a fall-through target. */
static int is_fallthrough(const ir_node *cfgpred)
{
ir_node *pred;
return 1;
}
+/**
+ * returns non-zero if the given block needs a label
+ * because of being a jump-target (and not a fall-through)
+ */
static int block_needs_label(const ir_node *block)
{
int need_label = 1;
in register we need. */
op = get_irn_n(irn, pos);
- reg = arch_get_irn_register(arch_env, op);
+ reg = arch_get_irn_register(op);
assert(reg && "no in register found");
/* in case of unknown register: just return a valid register */
if (reg == &ia32_gp_regs[REG_GP_UKNWN]) {
- const arch_register_req_t *req;
-
- /* ask for the requirements */
- req = arch_get_register_req(arch_env, irn, pos);
+ const arch_register_req_t *req = arch_get_register_req(irn, pos);
if (arch_register_req_is(req, limited)) {
/* in case of limited requirements: get the first allowed register */
if (get_irn_mode(irn) != mode_T) {
assert(pos == 0);
- reg = arch_get_irn_register(arch_env, irn);
+ reg = arch_get_irn_register(irn);
} else if (is_ia32_irn(irn)) {
- reg = get_ia32_out_reg(irn, pos);
+ reg = arch_irn_get_register(irn, pos);
} else {
const ir_edge_t *edge;
proj = get_edge_src_irn(edge);
assert(is_Proj(proj) && "non-Proj from mode_T node");
if (get_Proj_proj(proj) == pos) {
- reg = arch_get_irn_register(arch_env, proj);
+ reg = arch_get_irn_register(proj);
break;
}
}
* |_| |_|
*************************************************************/
+/**
+ * Emit the name of the 8bit low register
+ */
static void emit_8bit_register(const arch_register_t *reg)
{
const char *reg_name = arch_register_get_name(reg);
be_emit_char('l');
}
+/**
+ * Emit the name of the 8bit high register
+ */
+static void emit_8bit_register_high(const arch_register_t *reg)
+{
+ const char *reg_name = arch_register_get_name(reg);
+
+ be_emit_char('%');
+ be_emit_char(reg_name[1]);
+ be_emit_char('h');
+}
+
static void emit_16bit_register(const arch_register_t *reg)
{
const char *reg_name = ia32_get_mapped_reg_name(isa->regs_16bit, reg);
be_emit_string(reg_name);
}
+/**
+ * emit a register, possible shortened by a mode
+ *
+ * @param reg the register
+ * @param mode the mode of the register or NULL for full register
+ */
static void emit_register(const arch_register_t *reg, const ir_mode *mode)
{
const char *reg_name;
emit_register(reg, NULL);
}
-static void emit_ia32_Immediate(const ir_node *node);
+static void ia32_emit_entity(ir_entity *entity, int no_pic_adjust)
+{
+ ident *id;
+
+ set_entity_backend_marked(entity, 1);
+ id = get_entity_ld_ident(entity);
+ be_emit_ident(id);
+
+ if (get_entity_owner(entity) == get_tls_type()) {
+ if (get_entity_visibility(entity) == visibility_external_allocated) {
+ be_emit_cstring("@INDNTPOFF");
+ } else {
+ be_emit_cstring("@NTPOFF");
+ }
+ }
+
+ if (!no_pic_adjust && do_pic) {
+ /* TODO: only do this when necessary */
+ be_emit_char('-');
+ be_emit_string(pic_base_label);
+ }
+}
+
+static void emit_ia32_Immediate_no_prefix(const ir_node *node)
+{
+ const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
+
+ if (attr->symconst != NULL) {
+ if (attr->sc_sign)
+ be_emit_char('-');
+ ia32_emit_entity(attr->symconst, 0);
+ }
+ if (attr->symconst == NULL || attr->offset != 0) {
+ if (attr->symconst != NULL) {
+ be_emit_irprintf("%+d", attr->offset);
+ } else {
+ be_emit_irprintf("0x%X", attr->offset);
+ }
+ }
+}
+
+static void emit_ia32_Immediate(const ir_node *node)
+{
+ be_emit_char('$');
+ emit_ia32_Immediate_no_prefix(node);
+}
void ia32_emit_8bit_source_register_or_immediate(const ir_node *node, int pos)
{
const arch_register_t *reg;
- ir_node *in = get_irn_n(node, pos);
+ const ir_node *in = get_irn_n(node, pos);
if (is_ia32_Immediate(in)) {
emit_ia32_Immediate(in);
return;
emit_8bit_register(reg);
}
+void ia32_emit_8bit_high_source_register(const ir_node *node, int pos)
+{
+ const arch_register_t *reg = get_in_reg(node, pos);
+ emit_8bit_register_high(reg);
+}
+
+void ia32_emit_16bit_source_register_or_immediate(const ir_node *node, int pos)
+{
+ const arch_register_t *reg;
+ const ir_node *in = get_irn_n(node, pos);
+ if (is_ia32_Immediate(in)) {
+ emit_ia32_Immediate(in);
+ return;
+ }
+
+ reg = get_in_reg(node, pos);
+ emit_16bit_register(reg);
+}
+
void ia32_emit_dest_register(const ir_node *node, int pos)
{
const arch_register_t *reg = get_out_reg(node, pos);
emit_register(reg, NULL);
}
+void ia32_emit_dest_register_size(const ir_node *node, int pos)
+{
+ const arch_register_t *reg = get_out_reg(node, pos);
+
+ emit_register(reg, get_ia32_ls_mode(node));
+}
+
void ia32_emit_8bit_dest_register(const ir_node *node, int pos)
{
const arch_register_t *reg = get_out_reg(node, pos);
static void ia32_emit_mode_suffix_mode(const ir_mode *mode)
{
- if (mode_is_float(mode)) {
- switch(get_mode_size_bits(mode)) {
- case 32: be_emit_char('s'); return;
- case 64: be_emit_char('l'); return;
- case 80:
- case 96: be_emit_char('t'); return;
- }
- } else {
- assert(mode_is_int(mode) || mode_is_reference(mode));
- switch(get_mode_size_bits(mode)) {
+ assert(mode_is_int(mode) || mode_is_reference(mode));
+ switch (get_mode_size_bits(mode)) {
+ case 8: be_emit_char('b'); return;
+ case 16: be_emit_char('w'); return;
+ case 32: be_emit_char('l'); return;
/* gas docu says q is the suffix but gcc, objdump and icc use ll
* apparently */
case 64: be_emit_cstring("ll"); return;
- case 32: be_emit_char('l'); return;
- case 16: be_emit_char('w'); return;
- case 8: be_emit_char('b'); return;
- }
}
panic("Can't output mode_suffix for %+F", mode);
}
void ia32_emit_x87_mode_suffix(const ir_node *node)
{
+ ir_mode *mode;
+
/* we only need to emit the mode on address mode */
- if (get_ia32_op_type(node) != ia32_Normal) {
- ir_mode *mode = get_ia32_ls_mode(node);
- assert(mode != NULL);
- ia32_emit_mode_suffix_mode(mode);
+ if (get_ia32_op_type(node) == ia32_Normal)
+ return;
+
+ mode = get_ia32_ls_mode(node);
+ assert(mode != NULL);
+
+ if (mode_is_float(mode)) {
+ switch (get_mode_size_bits(mode)) {
+ case 32: be_emit_char('s'); return;
+ case 64: be_emit_char('l'); return;
+ case 80:
+ case 96: be_emit_char('t'); return;
+ }
+ } else {
+ assert(mode_is_int(mode));
+ switch (get_mode_size_bits(mode)) {
+ case 16: be_emit_char('s'); return;
+ case 32: be_emit_char('l'); return;
+ /* gas docu says q is the suffix but gcc, objdump and icc use ll
+ * apparently */
+ case 64: be_emit_cstring("ll"); return;
+ }
}
+ panic("Can't output mode_suffix for %+F", mode);
}
static char get_xmm_mode_suffix(ir_mode *mode)
be_emit_char(get_xmm_mode_suffix(mode));
}
-void ia32_emit_extend_suffix(const ir_mode *mode)
+void ia32_emit_extend_suffix(const ir_node *node)
{
+ ir_mode *mode = get_ia32_ls_mode(node);
if (get_mode_size_bits(mode) == 32)
return;
be_emit_char(mode_is_signed(mode) ? 's' : 'z');
+ ia32_emit_mode_suffix_mode(mode);
}
void ia32_emit_source_register_or_immediate(const ir_node *node, int pos)
}
/**
- * Emits registers and/or address mode of a binary operation.
+ * Returns the target block for a control flow node.
*/
-void ia32_emit_binop(const ir_node *node)
+static ir_node *get_cfop_target_block(const ir_node *irn)
{
- const ir_node *right_op = get_irn_n(node, n_ia32_binary_right);
- const ir_mode *mode = get_ia32_ls_mode(node);
- const arch_register_t *reg_left;
+ assert(get_irn_mode(irn) == mode_X);
+ return get_irn_link(irn);
+}
- switch(get_ia32_op_type(node)) {
- case ia32_Normal:
- reg_left = get_in_reg(node, n_ia32_binary_left);
- if (is_ia32_Immediate(right_op)) {
- emit_ia32_Immediate(right_op);
- be_emit_cstring(", ");
- emit_register(reg_left, mode);
+/**
+ * Emits a block label for the given block.
+ */
+static void ia32_emit_block_name(const ir_node *block)
+{
+ if (has_Block_label(block)) {
+ be_emit_string(be_gas_block_label_prefix());
+ be_emit_irprintf("%lu", get_Block_label(block));
+ } else {
+ be_emit_cstring(BLOCK_PREFIX);
+ be_emit_irprintf("%ld", get_irn_node_nr(block));
+ }
+}
+
+/**
+ * Emits the target label for a control flow node.
+ */
+static void ia32_emit_cfop_target(const ir_node *node)
+{
+ ir_node *block = get_cfop_target_block(node);
+ ia32_emit_block_name(block);
+}
+
+/*
+ * positive conditions for signed compares
+ */
+static const char *const cmp2condition_s[] = {
+ NULL, /* always false */
+ "e", /* == */
+ "l", /* < */
+ "le", /* <= */
+ "g", /* > */
+ "ge", /* >= */
+ "ne", /* != */
+ NULL /* always true */
+};
+
+/*
+ * positive conditions for unsigned compares
+ */
+static const char *const cmp2condition_u[] = {
+ NULL, /* always false */
+ "e", /* == */
+ "b", /* < */
+ "be", /* <= */
+ "a", /* > */
+ "ae", /* >= */
+ "ne", /* != */
+ NULL /* always true */
+};
+
+/**
+ * Emit the suffix for a compare instruction.
+ */
+static void ia32_emit_cmp_suffix(int pnc)
+{
+ const char *str;
+
+ if (pnc == ia32_pn_Cmp_parity) {
+ be_emit_char('p');
+ return;
+ }
+ if (pnc & ia32_pn_Cmp_float || pnc & ia32_pn_Cmp_unsigned) {
+ str = cmp2condition_u[pnc & 7];
+ } else {
+ str = cmp2condition_s[pnc & 7];
+ }
+
+ be_emit_string(str);
+}
+
+typedef enum ia32_emit_mod_t {
+ EMIT_RESPECT_LS = 1U << 0,
+ EMIT_ALTERNATE_AM = 1U << 1,
+ EMIT_LONG = 1U << 2
+} ia32_emit_mod_t;
+
+/**
+ * fmt parameter output
+ * ---- ---------------------- ---------------------------------------------
+ * %% %
+ * %AM <node> address mode of the node
+ * %AR const arch_register_t* address mode of the node or register
+ * %ASx <node> address mode of the node or source register x
+ * %Dx <node> destination register x
+ * %I <node> immediate of the node
+ * %L <node> control flow target of the node
+ * %M <node> mode suffix of the node
+ * %P int condition code
+ * %R const arch_register_t* register
+ * %Sx <node> source register x
+ * %s const char* string
+ * %u unsigned int unsigned int
+ * %d signed int signed int
+ *
+ * x starts at 0
+ * # modifier for %ASx, %D and %S uses ls mode of node to alter register width
+ * * modifier does not prefix immediates with $, but AM with *
+ * l modifier for %lu and %ld
+ */
+static void ia32_emitf(const ir_node *node, const char *fmt, ...)
+{
+ va_list ap;
+ va_start(ap, fmt);
+
+ for (;;) {
+ const char *start = fmt;
+ ia32_emit_mod_t mod = 0;
+
+ while (*fmt != '%' && *fmt != '\n' && *fmt != '\0')
+ ++fmt;
+ if (fmt != start) {
+ be_emit_string_len(start, fmt - start);
+ }
+
+ if (*fmt == '\n') {
+ be_emit_finish_line_gas(node);
+ ++fmt;
+ if (*fmt == '\0')
+ break;
+ continue;
+ }
+
+ if (*fmt == '\0')
break;
- } else {
- const arch_register_t *reg_right
- = get_in_reg(node, n_ia32_binary_right);
- emit_register(reg_right, mode);
- be_emit_cstring(", ");
- emit_register(reg_left, mode);
+
+ ++fmt;
+ if (*fmt == '*') {
+ mod |= EMIT_ALTERNATE_AM;
+ ++fmt;
}
- break;
- case ia32_AddrModeS:
- if (is_ia32_Immediate(right_op)) {
- emit_ia32_Immediate(right_op);
- be_emit_cstring(", ");
- ia32_emit_am(node);
- } else {
- reg_left = get_in_reg(node, n_ia32_binary_left);
- ia32_emit_am(node);
- be_emit_cstring(", ");
- emit_register(reg_left, mode);
+
+ if (*fmt == '#') {
+ mod |= EMIT_RESPECT_LS;
+ ++fmt;
}
- break;
- case ia32_AddrModeD:
- panic("DestMode can't be output by %%binop anymore");
- break;
- default:
- assert(0 && "unsupported op type");
+
+ if (*fmt == 'l') {
+ mod |= EMIT_LONG;
+ ++fmt;
+ }
+
+ switch (*fmt++) {
+ case '%':
+ be_emit_char('%');
+ break;
+
+ case 'A': {
+ switch (*fmt++) {
+ case 'M':
+ if (mod & EMIT_ALTERNATE_AM)
+ be_emit_char('*');
+ ia32_emit_am(node);
+ break;
+
+ case 'R': {
+ const arch_register_t *reg = va_arg(ap, const arch_register_t*);
+ if (mod & EMIT_ALTERNATE_AM)
+ be_emit_char('*');
+ if (get_ia32_op_type(node) == ia32_AddrModeS) {
+ ia32_emit_am(node);
+ } else {
+ emit_register(reg, NULL);
+ }
+ break;
+ }
+
+ case 'S':
+ if (get_ia32_op_type(node) == ia32_AddrModeS) {
+ if (mod & EMIT_ALTERNATE_AM)
+ be_emit_char('*');
+ ia32_emit_am(node);
+ ++fmt;
+ } else {
+ assert(get_ia32_op_type(node) == ia32_Normal);
+ goto emit_S;
+ }
+ break;
+
+ default: goto unknown;
+ }
+ break;
+ }
+
+ case 'D': {
+ unsigned pos;
+ const arch_register_t *reg;
+
+ if (*fmt < '0' || '9' <= *fmt)
+ goto unknown;
+
+ pos = *fmt++ - '0';
+ reg = get_out_reg(node, pos);
+ emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL);
+ break;
+ }
+
+ case 'I':
+ if (!(mod & EMIT_ALTERNATE_AM))
+ be_emit_char('$');
+ emit_ia32_Immediate_no_prefix(node);
+ break;
+
+ case 'L':
+ ia32_emit_cfop_target(node);
+ break;
+
+ case 'M': {
+ ia32_emit_mode_suffix_mode(get_ia32_ls_mode(node));
+ break;
+ }
+
+ case 'P': {
+ int pnc = va_arg(ap, int);
+ ia32_emit_cmp_suffix(pnc);
+ break;
+ }
+
+ case 'R': {
+ const arch_register_t *reg = va_arg(ap, const arch_register_t*);
+ emit_register(reg, NULL);
+ break;
+ }
+
+emit_S:
+ case 'S': {
+ unsigned pos;
+ const ir_node *in;
+
+ if (*fmt < '0' || '9' <= *fmt)
+ goto unknown;
+
+ pos = *fmt++ - '0';
+ in = get_irn_n(node, pos);
+ if (is_ia32_Immediate(in)) {
+ if (!(mod & EMIT_ALTERNATE_AM))
+ be_emit_char('$');
+ emit_ia32_Immediate_no_prefix(in);
+ } else {
+ const arch_register_t *reg;
+
+ if (mod & EMIT_ALTERNATE_AM)
+ be_emit_char('*');
+ reg = get_in_reg(node, pos);
+ emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL);
+ }
+ break;
+ }
+
+ case 's': {
+ const char *str = va_arg(ap, const char*);
+ be_emit_string(str);
+ break;
+ }
+
+ case 'u':
+ if (mod & EMIT_LONG) {
+ unsigned long num = va_arg(ap, unsigned long);
+ be_emit_irprintf("%lu", num);
+ } else {
+ unsigned num = va_arg(ap, unsigned);
+ be_emit_irprintf("%u", num);
+ }
+ break;
+
+ case 'd':
+ if (mod & EMIT_LONG) {
+ long num = va_arg(ap, long);
+ be_emit_irprintf("%ld", num);
+ } else {
+ int num = va_arg(ap, int);
+ be_emit_irprintf("%d", num);
+ }
+ break;
+
+ default:
+unknown:
+ panic("unknown format conversion in ia32_emitf()");
+ }
+ }
+
+ va_end(ap);
+}
+
+/**
+ * Emits registers and/or address mode of a binary operation.
+ */
+void ia32_emit_binop(const ir_node *node)
+{
+ if (is_ia32_Immediate(get_irn_n(node, n_ia32_binary_right))) {
+ ia32_emitf(node, "%#S4, %#AS3");
+ } else {
+ ia32_emitf(node, "%#AS4, %#S3");
}
}
{
const ia32_x87_attr_t *x87_attr = get_ia32_x87_attr_const(node);
const arch_register_t *in1 = x87_attr->x87[0];
- const arch_register_t *in2 = x87_attr->x87[1];
+ const arch_register_t *in = x87_attr->x87[1];
const arch_register_t *out = x87_attr->x87[2];
- const arch_register_t *in;
- in = out ? ((out == in2) ? in1 : in2) : in2;
- out = out ? out : in1;
+ if (out == NULL) {
+ out = in1;
+ } else if (out == in) {
+ in = in1;
+ }
be_emit_char('%');
be_emit_string(arch_register_get_name(in));
*/
void ia32_emit_unop(const ir_node *node, int pos)
{
- const ir_node *op;
-
- switch(get_ia32_op_type(node)) {
- case ia32_Normal:
- op = get_irn_n(node, pos);
- if (is_ia32_Immediate(op)) {
- emit_ia32_Immediate(op);
- } else {
- ia32_emit_source_register(node, pos);
- }
- break;
- case ia32_AddrModeS:
- case ia32_AddrModeD:
- ia32_emit_am(node);
- break;
- default:
- assert(0 && "unsupported op type");
- }
-}
-
-static void ia32_emit_entity(ir_entity *entity, int no_pic_adjust)
-{
- ident *id;
-
- set_entity_backend_marked(entity, 1);
- id = get_entity_ld_ident(entity);
- be_emit_ident(id);
-
- if (get_entity_owner(entity) == get_tls_type()) {
- if (get_entity_visibility(entity) == visibility_external_allocated) {
- be_emit_cstring("@INDNTPOFF");
- } else {
- be_emit_cstring("@NTPOFF");
- }
- }
-
- if (!no_pic_adjust && do_pic) {
- /* TODO: only do this when necessary */
- be_emit_char('-');
- be_emit_string(pic_base_label);
- }
+ char fmt[] = "%ASx";
+ fmt[3] = '0' + pos;
+ ia32_emitf(node, fmt);
}
/**
ir_node *left = get_irn_n(node, n_ia32_IMul_left);
const arch_register_t *out_reg = get_out_reg(node, pn_ia32_IMul_res);
- be_emit_cstring("\timul");
- ia32_emit_mode_suffix(node);
- be_emit_char(' ');
-
- ia32_emit_binop(node);
-
/* do we need the 3-address form? */
if (is_ia32_NoReg_GP(left) ||
get_in_reg(node, n_ia32_IMul_left) != out_reg) {
- be_emit_cstring(", ");
- emit_register(out_reg, get_ia32_ls_mode(node));
+ ia32_emitf(node, "\timul%M %#S4, %#AS3, %#D0\n");
+ } else {
+ ia32_emitf(node, "\timul%M %#AS4, %#S3\n");
}
- be_emit_finish_line_gas(node);
}
-/*************************************************
- * _ _ _
- * (_) | | |
- * ___ _ __ ___ _| |_ ___ ___ _ __ __| |
- * / _ \ '_ ` _ \| | __| / __/ _ \| '_ \ / _` |
- * | __/ | | | | | | |_ | (_| (_) | | | | (_| |
- * \___|_| |_| |_|_|\__| \___\___/|_| |_|\__,_|
- *
- *************************************************/
-
-#undef IA32_DO_EMIT
-#define IA32_DO_EMIT(irn) ia32_fprintf_format(F, irn, cmd_buf, cmnt_buf)
-
-/*
- * coding of conditions
- */
-struct cmp2conditon_t {
- const char *name;
- int num;
-};
-
-/*
- * positive conditions for signed compares
- */
-static const struct cmp2conditon_t cmp2condition_s[] = {
- { NULL, pn_Cmp_False }, /* always false */
- { "e", pn_Cmp_Eq }, /* == */
- { "l", pn_Cmp_Lt }, /* < */
- { "le", pn_Cmp_Le }, /* <= */
- { "g", pn_Cmp_Gt }, /* > */
- { "ge", pn_Cmp_Ge }, /* >= */
- { "ne", pn_Cmp_Lg }, /* != */
- { NULL, pn_Cmp_Leg}, /* always true */
-};
-
-/*
- * positive conditions for unsigned compares
- */
-static const struct cmp2conditon_t cmp2condition_u[] = {
- { NULL, pn_Cmp_False }, /* always false */
- { "e", pn_Cmp_Eq }, /* == */
- { "b", pn_Cmp_Lt }, /* < */
- { "be", pn_Cmp_Le }, /* <= */
- { "a", pn_Cmp_Gt }, /* > */
- { "ae", pn_Cmp_Ge }, /* >= */
- { "ne", pn_Cmp_Lg }, /* != */
- { NULL, pn_Cmp_Leg }, /* always true */
-};
-
/**
* walks up a tree of copies/perms/spills/reloads to find the original value
* that is moved around
return pnc;
}
-static void ia32_emit_cmp_suffix(int pnc)
+static pn_Cmp ia32_get_negated_pnc(pn_Cmp pnc)
{
- const char *str;
-
- if ((pnc & ia32_pn_Cmp_float) || (pnc & ia32_pn_Cmp_unsigned)) {
- pnc = pnc & 7;
- assert(cmp2condition_u[pnc].num == pnc);
- str = cmp2condition_u[pnc].name;
- } else {
- pnc = pnc & 7;
- assert(cmp2condition_s[pnc].num == pnc);
- str = cmp2condition_s[pnc].name;
- }
-
- be_emit_string(str);
+ ir_mode *mode = pnc & ia32_pn_Cmp_float ? mode_F : mode_Iu;
+ return get_negated_pnc(pnc, mode);
}
void ia32_emit_cmp_suffix_node(const ir_node *node,
pn_Cmp pnc = get_ia32_condcode(node);
pnc = determine_final_pnc(node, flags_pos, pnc);
- if (attr->data.ins_permuted) {
- if (pnc & ia32_pn_Cmp_float) {
- pnc = get_negated_pnc(pnc, mode_F);
- } else {
- pnc = get_negated_pnc(pnc, mode_Iu);
- }
- }
+ if (attr->data.ins_permuted)
+ pnc = ia32_get_negated_pnc(pnc);
ia32_emit_cmp_suffix(pnc);
}
-/**
- * Returns the target block for a control flow node.
- */
-static ir_node *get_cfop_target_block(const ir_node *irn)
-{
- assert(get_irn_mode(irn) == mode_X);
- return get_irn_link(irn);
-}
-
-/**
- * Emits a block label for the given block.
- */
-static void ia32_emit_block_name(const ir_node *block)
-{
- if (has_Block_label(block)) {
- be_emit_string(be_gas_block_label_prefix());
- be_emit_irprintf("%lu", get_Block_label(block));
- } else {
- be_emit_cstring(BLOCK_PREFIX);
- be_emit_irprintf("%ld", get_irn_node_nr(block));
- }
-}
-
/**
* Emits an exception label for a given node.
*/
be_emit_irprintf("%lu", get_ia32_exc_label_id(node));
}
-/**
- * Emits the target label for a control flow node.
- */
-static void ia32_emit_cfop_target(const ir_node *node)
-{
- ir_node *block = get_cfop_target_block(node);
-
- ia32_emit_block_name(block);
-}
-
/**
* Returns the Proj with projection number proj and NOT mode_M
*/
proj_true = proj_false;
proj_false = t;
- if (pnc & ia32_pn_Cmp_float) {
- pnc = get_negated_pnc(pnc, mode_F);
- } else {
- pnc = get_negated_pnc(pnc, mode_Iu);
- }
+ pnc = ia32_get_negated_pnc(pnc);
}
if (pnc & ia32_pn_Cmp_float) {
* which indicates that the result is unordered */
switch (pnc & 15) {
case pn_Cmp_Uo: {
- be_emit_cstring("\tjp ");
- ia32_emit_cfop_target(proj_true);
- be_emit_finish_line_gas(proj_true);
+ ia32_emitf(proj_true, "\tjp %L\n");
break;
}
case pn_Cmp_Leg:
- be_emit_cstring("\tjnp ");
- ia32_emit_cfop_target(proj_true);
- be_emit_finish_line_gas(proj_true);
+ ia32_emitf(proj_true, "\tjnp %L\n");
break;
case pn_Cmp_Eq:
* as the falseblock might have no label emitted then */
if (can_be_fallthrough(proj_false)) {
need_parity_label = 1;
- be_emit_cstring("\tjp 1f");
+ ia32_emitf(proj_false, "\tjp 1f\n");
} else {
- be_emit_cstring("\tjp ");
- ia32_emit_cfop_target(proj_false);
+ ia32_emitf(proj_false, "\tjp %L\n");
}
- be_emit_finish_line_gas(proj_false);
goto emit_jcc;
case pn_Cmp_Ug:
case pn_Cmp_Uge:
case pn_Cmp_Ne:
- be_emit_cstring("\tjp ");
- ia32_emit_cfop_target(proj_true);
- be_emit_finish_line_gas(proj_true);
+ ia32_emitf(proj_true, "\tjp %L\n");
goto emit_jcc;
default:
}
} else {
emit_jcc:
- be_emit_cstring("\tj");
- ia32_emit_cmp_suffix(pnc);
- be_emit_char(' ');
- ia32_emit_cfop_target(proj_true);
- be_emit_finish_line_gas(proj_true);
+ ia32_emitf(proj_true, "\tj%P %L\n", pnc);
}
if (need_parity_label) {
- be_emit_cstring("1:");
- be_emit_write_line();
+ ia32_emitf(NULL, "1:\n");
}
/* the second Proj might be a fallthrough */
if (can_be_fallthrough(proj_false)) {
- be_emit_cstring("\t/* fallthrough to ");
- ia32_emit_cfop_target(proj_false);
- be_emit_cstring(" */");
- be_emit_finish_line_gas(proj_false);
+ ia32_emitf(proj_false, "\t/* fallthrough to %L */\n");
} else {
- be_emit_cstring("\tjmp ");
- ia32_emit_cfop_target(proj_false);
- be_emit_finish_line_gas(proj_false);
+ ia32_emitf(proj_false, "\tjmp %L\n");
}
}
{
const ia32_attr_t *attr = get_ia32_attr_const(node);
int ins_permuted = attr->data.ins_permuted;
- const arch_register_t *out = arch_get_irn_register(arch_env, node);
+ const arch_register_t *out = arch_irn_get_register(node, pn_ia32_res);
pn_Cmp pnc = get_ia32_condcode(node);
const arch_register_t *in_true;
const arch_register_t *in_false;
pnc = determine_final_pnc(node, n_ia32_CMov_eflags, pnc);
- in_true = arch_get_irn_register(arch_env,
- get_irn_n(node, n_ia32_CMov_val_true));
- in_false = arch_get_irn_register(arch_env,
- get_irn_n(node, n_ia32_CMov_val_false));
+ in_true = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_true));
+ in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_false));
/* should be same constraint fullfilled? */
if (out == in_false) {
in_false = tmp;
} else {
/* we need a mov */
- be_emit_cstring("\tmovl ");
- emit_register(in_false, NULL);
- be_emit_cstring(", ");
- emit_register(out, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tmovl %R, %R\n", in_false, out);
}
- if (ins_permuted) {
- if (pnc & ia32_pn_Cmp_float) {
- pnc = get_negated_pnc(pnc, mode_F);
- } else {
- pnc = get_negated_pnc(pnc, mode_Iu);
- }
- }
+ if (ins_permuted)
+ pnc = ia32_get_negated_pnc(pnc);
/* TODO: handling of Nans isn't correct yet */
- be_emit_cstring("\tcmov");
- ia32_emit_cmp_suffix(pnc);
- be_emit_char(' ');
- if (get_ia32_op_type(node) == ia32_AddrModeS) {
- ia32_emit_am(node);
- } else {
- emit_register(in_true, get_ia32_ls_mode(node));
- }
- be_emit_cstring(", ");
- emit_register(out, get_ia32_ls_mode(node));
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tcmov%P %#AR, %#R\n", pnc, in_true, out);
}
/*********************************************************
const ir_edge_t *edge;
/* fill the table structure */
- tbl.label = xmalloc(SNPRINTF_BUF_LEN);
+ tbl.label = XMALLOCN(char, SNPRINTF_BUF_LEN);
tbl.label = get_unique_label(tbl.label, SNPRINTF_BUF_LEN, ".TBL_");
tbl.defProj = NULL;
tbl.num_branches = get_irn_n_edges(node) - 1;
- tbl.branches = xcalloc(tbl.num_branches, sizeof(tbl.branches[0]));
+ tbl.branches = XMALLOCNZ(branch_t, tbl.num_branches);
tbl.min_value = INT_MAX;
tbl.max_value = INT_MIN;
interval = tbl.max_value - tbl.min_value;
/* emit the table */
- be_emit_cstring("\tcmpl $");
- be_emit_irprintf("%u, ", interval);
- ia32_emit_source_register(node, 0);
- be_emit_finish_line_gas(node);
-
- be_emit_cstring("\tja ");
- ia32_emit_cfop_target(tbl.defProj);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tcmpl $%u, %S0\n", interval);
+ ia32_emitf(tbl.defProj, "\tja %L\n");
if (tbl.num_branches > 1) {
/* create table */
- be_emit_cstring("\tjmp *");
- be_emit_string(tbl.label);
- be_emit_cstring("(,");
- ia32_emit_source_register(node, 0);
- be_emit_cstring(",4)");
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tjmp *%s(,%S0,4)\n", tbl.label);
be_gas_emit_switch_section(GAS_SECTION_RODATA);
- be_emit_cstring("\t.align 4\n");
- be_emit_write_line();
-
- be_emit_string(tbl.label);
- be_emit_cstring(":\n");
- be_emit_write_line();
-
- be_emit_cstring(".long ");
- ia32_emit_cfop_target(tbl.branches[0].target);
- be_emit_finish_line_gas(NULL);
+ ia32_emitf(NULL, "\t.align 4\n");
+ ia32_emitf(NULL, "%s:\n", tbl.label);
last_value = tbl.branches[0].value;
- for (i = 1; i < tbl.num_branches; ++i) {
- while (++last_value < tbl.branches[i].value) {
- be_emit_cstring(".long ");
- ia32_emit_cfop_target(tbl.defProj);
- be_emit_finish_line_gas(NULL);
+ for (i = 0; i != tbl.num_branches; ++i) {
+ while (last_value != tbl.branches[i].value) {
+ ia32_emitf(tbl.defProj, ".long %L\n");
+ ++last_value;
}
- be_emit_cstring(".long ");
- ia32_emit_cfop_target(tbl.branches[i].target);
- be_emit_finish_line_gas(NULL);
+ ia32_emitf(tbl.branches[i].target, ".long %L\n");
+ ++last_value;
}
be_gas_emit_switch_section(GAS_SECTION_TEXT);
} else {
/* one jump is enough */
- be_emit_cstring("\tjmp ");
- ia32_emit_cfop_target(tbl.branches[0].target);
- be_emit_finish_line_gas(node);
+ ia32_emitf(tbl.branches[0].target, "\tjmp %L\n");
}
if (tbl.label)
/* we have a block schedule */
if (can_be_fallthrough(node)) {
- be_emit_cstring("\t/* fallthrough to ");
- ia32_emit_cfop_target(node);
- be_emit_cstring(" */");
+ ia32_emitf(node, "\t/* fallthrough to %L */\n");
} else {
- be_emit_cstring("\tjmp ");
- ia32_emit_cfop_target(node);
- }
- be_emit_finish_line_gas(node);
-}
-
-static void emit_ia32_Immediate(const ir_node *node)
-{
- const ia32_immediate_attr_t *attr = get_ia32_immediate_attr_const(node);
-
- be_emit_char('$');
- if (attr->symconst != NULL) {
- if (attr->sc_sign)
- be_emit_char('-');
- ia32_emit_entity(attr->symconst, 0);
- }
- if (attr->symconst == NULL || attr->offset != 0) {
- if (attr->symconst != NULL) {
- be_emit_irprintf("%+d", attr->offset);
- } else {
- be_emit_irprintf("0x%X", attr->offset);
- }
+ ia32_emitf(node, "\tjmp %L\n");
}
}
/* parse modifiers */
switch(c) {
case 0:
- ir_fprintf(stderr, "Warning: asm text (%+F) ends with %\n", node);
+ ir_fprintf(stderr, "Warning: asm text (%+F) ends with %%\n", node);
be_emit_char('%');
return s + 1;
case '%':
case '9':
break;
default:
- ir_fprintf(stderr, "Warning: asm text (%+F) contains unknown modifier "
- "'%c' for asm op\n", node, c);
+ ir_fprintf(stderr,
+ "Warning: asm text (%+F) contains unknown modifier '%c' for asm op\n",
+ node, c);
++s;
break;
}
s += p;
}
- if (num < 0 || num >= ARR_LEN(asm_regs)) {
- ir_fprintf(stderr, "Error: Custom assembler references invalid "
- "input/output (%+F)\n", node);
+ if (num < 0 || ARR_LEN(asm_regs) <= num) {
+ ir_fprintf(stderr,
+ "Error: Custom assembler references invalid input/output (%+F)\n",
+ node);
return s;
}
asm_reg = & asm_regs[num];
reg = get_in_reg(node, asm_reg->inout_pos);
}
if (reg == NULL) {
- ir_fprintf(stderr, "Warning: no register assigned for %d asm op "
- "(%+F)\n", num, node);
+ ir_fprintf(stderr,
+ "Warning: no register assigned for %d asm op (%+F)\n",
+ num, node);
return s;
}
ident *asm_text = attr->asm_text;
const char *s = get_id_str(asm_text);
- be_emit_cstring("#APP\t");
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "#APP\t\n");
if (s[0] != '\t')
be_emit_char('\t');
}
}
- be_emit_char('\n');
- be_emit_write_line();
-
- be_emit_cstring("#NO_APP\n");
- be_emit_write_line();
+ ia32_emitf(NULL, "\n#NO_APP\n");
}
/**********************************
*/
static void emit_CopyB_prolog(unsigned size)
{
- be_emit_cstring("\tcld");
- be_emit_finish_line_gas(NULL);
-
- switch (size) {
- case 1:
- be_emit_cstring("\tmovsb");
- be_emit_finish_line_gas(NULL);
- break;
- case 2:
- be_emit_cstring("\tmovsw");
- be_emit_finish_line_gas(NULL);
- break;
- case 3:
- be_emit_cstring("\tmovsb");
- be_emit_finish_line_gas(NULL);
- be_emit_cstring("\tmovsw");
- be_emit_finish_line_gas(NULL);
- break;
- }
+ if (size & 1)
+ ia32_emitf(NULL, "\tmovsb\n");
+ if (size & 2)
+ ia32_emitf(NULL, "\tmovsw\n");
}
/**
unsigned size = get_ia32_copyb_size(node);
emit_CopyB_prolog(size);
-
- be_emit_cstring("\trep movsd");
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\trep movsd\n");
}
/**
{
unsigned size = get_ia32_copyb_size(node);
- emit_CopyB_prolog(size & 0x3);
+ emit_CopyB_prolog(size);
size >>= 2;
while (size--) {
- be_emit_cstring("\tmovsd");
- be_emit_finish_line_gas(NULL);
+ ia32_emitf(NULL, "\tmovsd\n");
}
}
/**
* Emit code for conversions (I, FP), (FP, I) and (FP, FP).
*/
-static void emit_ia32_Conv_with_FP(const ir_node *node)
+static void emit_ia32_Conv_with_FP(const ir_node *node, const char* conv_f,
+ const char* conv_d)
{
ir_mode *ls_mode = get_ia32_ls_mode(node);
int ls_bits = get_mode_size_bits(ls_mode);
+ const char *conv = ls_bits == 32 ? conv_f : conv_d;
- be_emit_cstring("\tcvt");
-
- if (is_ia32_Conv_I2FP(node)) {
- if (ls_bits == 32) {
- be_emit_cstring("si2ss");
- } else {
- be_emit_cstring("si2sd");
- }
- } else if (is_ia32_Conv_FP2I(node)) {
- if (ls_bits == 32) {
- be_emit_cstring("ss2si");
- } else {
- be_emit_cstring("sd2si");
- }
- } else {
- assert(is_ia32_Conv_FP2FP(node));
- if (ls_bits == 32) {
- be_emit_cstring("sd2ss");
- } else {
- be_emit_cstring("ss2sd");
- }
- }
- be_emit_char(' ');
-
- switch(get_ia32_op_type(node)) {
- case ia32_Normal:
- ia32_emit_source_register(node, n_ia32_unary_op);
- break;
- case ia32_AddrModeS:
- ia32_emit_am(node);
- break;
- default:
- assert(0 && "unsupported op type for Conv");
- }
- be_emit_cstring(", ");
- ia32_emit_dest_register(node, 0);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tcvt%s %AS3, %D0\n", conv);
}
static void emit_ia32_Conv_I2FP(const ir_node *node)
{
- emit_ia32_Conv_with_FP(node);
+ emit_ia32_Conv_with_FP(node, "si2ss", "si2sd");
}
static void emit_ia32_Conv_FP2I(const ir_node *node)
{
- emit_ia32_Conv_with_FP(node);
+ emit_ia32_Conv_with_FP(node, "ss2si", "sd2si");
}
static void emit_ia32_Conv_FP2FP(const ir_node *node)
{
- emit_ia32_Conv_with_FP(node);
+ emit_ia32_Conv_with_FP(node, "sd2ss", "ss2sd");
}
/**
*/
static void emit_ia32_Conv_I2I(const ir_node *node)
{
- const char *sign_suffix;
- ir_mode *smaller_mode = get_ia32_ls_mode(node);
- int smaller_bits = get_mode_size_bits(smaller_mode);
- int signed_mode;
- const arch_register_t *in_reg, *out_reg;
+ ir_mode *smaller_mode = get_ia32_ls_mode(node);
+ int signed_mode = mode_is_signed(smaller_mode);
+ const char *sign_suffix;
assert(!mode_is_float(smaller_mode));
- assert(smaller_bits == 8 || smaller_bits == 16);
- signed_mode = mode_is_signed(smaller_mode);
sign_suffix = signed_mode ? "s" : "z";
+ ia32_emitf(node, "\tmov%s%Ml %#AS3, %D0\n", sign_suffix);
+}
- out_reg = get_out_reg(node, 0);
-
- switch(get_ia32_op_type(node)) {
- case ia32_Normal:
- in_reg = get_in_reg(node, n_ia32_unary_op);
-
- if (in_reg == &ia32_gp_regs[REG_EAX] &&
- out_reg == &ia32_gp_regs[REG_EAX] &&
- signed_mode &&
- smaller_bits == 16)
- {
- /* argument and result are both in EAX and */
- /* signedness is ok: -> use the smaller cwtl opcode */
- be_emit_cstring("\tcwtl");
- } else {
- be_emit_cstring("\tmov");
- be_emit_string(sign_suffix);
- ia32_emit_mode_suffix_mode(smaller_mode);
- be_emit_cstring("l ");
- emit_register(in_reg, smaller_mode);
- be_emit_cstring(", ");
- emit_register(out_reg, NULL);
- }
- break;
- case ia32_AddrModeS: {
- be_emit_cstring("\tmov");
- be_emit_string(sign_suffix);
- ia32_emit_mode_suffix_mode(smaller_mode);
- be_emit_cstring("l ");
- ia32_emit_am(node);
- be_emit_cstring(", ");
- emit_register(out_reg, NULL);
- break;
- }
- default:
- panic("unsupported op type for Conv");
- }
- be_emit_finish_line_gas(node);
+/**
+ * Emits a call
+ */
+static void emit_ia32_Call(const ir_node *node)
+{
+ /* Special case: Call must not have its immediates prefixed by $, instead
+ * address mode is prefixed by *. */
+ ia32_emitf(node, "\tcall %*AS3\n");
}
*
*******************************************/
-/**
- * Emits a backend call
- */
-static void emit_be_Call(const ir_node *node)
-{
- ir_entity *ent = be_Call_get_entity(node);
-
- be_emit_cstring("\tcall ");
- if (ent) {
- ia32_emit_entity(ent, 1);
- } else {
- const arch_register_t *reg = get_in_reg(node, be_pos_Call_ptr);
- be_emit_char('*');
- emit_register(reg, NULL);
- }
- be_emit_finish_line_gas(node);
-}
-
/**
* Emits code to increase stack pointer.
*/
static void emit_be_IncSP(const ir_node *node)
{
- int offs = be_get_IncSP_offset(node);
- const arch_register_t *reg = arch_get_irn_register(arch_env, node);
+ int offs = be_get_IncSP_offset(node);
if (offs == 0)
return;
if (offs > 0) {
- be_emit_cstring("\tsubl $");
- be_emit_irprintf("%u, ", offs);
- emit_register(reg, NULL);
+ ia32_emitf(node, "\tsubl $%u, %D0\n", offs);
} else {
- be_emit_cstring("\taddl $");
- be_emit_irprintf("%u, ", -offs);
- emit_register(reg, NULL);
+ ia32_emitf(node, "\taddl $%u, %D0\n", -offs);
}
- be_emit_finish_line_gas(node);
}
/**
*/
static void Copy_emitter(const ir_node *node, const ir_node *op)
{
- const arch_register_t *in = arch_get_irn_register(arch_env, op);
- const arch_register_t *out = arch_get_irn_register(arch_env, node);
- ir_mode *mode;
+ const arch_register_t *in = arch_get_irn_register(op);
+ const arch_register_t *out = arch_get_irn_register(node);
if (in == out) {
return;
if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
return;
- mode = get_irn_mode(node);
- if (mode == mode_E) {
- be_emit_cstring("\tmovsd ");
- emit_register(in, NULL);
- be_emit_cstring(", ");
- emit_register(out, NULL);
+ if (get_irn_mode(node) == mode_E) {
+ ia32_emitf(node, "\tmovsd %R, %R\n", in, out);
} else {
- be_emit_cstring("\tmovl ");
- emit_register(in, NULL);
- be_emit_cstring(", ");
- emit_register(out, NULL);
+ ia32_emitf(node, "\tmovl %R, %R\n", in, out);
}
- be_emit_finish_line_gas(node);
}
static void emit_be_Copy(const ir_node *node)
const arch_register_t *in0, *in1;
const arch_register_class_t *cls0, *cls1;
- in0 = arch_get_irn_register(arch_env, get_irn_n(node, 0));
- in1 = arch_get_irn_register(arch_env, get_irn_n(node, 1));
+ in0 = arch_get_irn_register(get_irn_n(node, 0));
+ in1 = arch_get_irn_register(get_irn_n(node, 1));
cls0 = arch_register_get_class(in0);
cls1 = arch_register_get_class(in1);
assert(cls0 == cls1 && "Register class mismatch at Perm");
if (cls0 == &ia32_reg_classes[CLASS_ia32_gp]) {
- be_emit_cstring("\txchg ");
- emit_register(in1, NULL);
- be_emit_cstring(", ");
- emit_register(in0, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\txchg %R, %R\n", in1, in0);
} else if (cls0 == &ia32_reg_classes[CLASS_ia32_xmm]) {
- be_emit_cstring("\txorpd ");
- emit_register(in1, NULL);
- be_emit_cstring(", ");
- emit_register(in0, NULL);
- be_emit_finish_line_gas(NULL);
-
- be_emit_cstring("\txorpd ");
- emit_register(in0, NULL);
- be_emit_cstring(", ");
- emit_register(in1, NULL);
- be_emit_finish_line_gas(NULL);
-
- be_emit_cstring("\txorpd ");
- emit_register(in1, NULL);
- be_emit_cstring(", ");
- emit_register(in0, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(NULL, "\txorpd %R, %R\n", in1, in0);
+ ia32_emitf(NULL, "\txorpd %R, %R\n", in0, in1);
+ ia32_emitf(node, "\txorpd %R, %R\n", in1, in0);
} else if (cls0 == &ia32_reg_classes[CLASS_ia32_vfp]) {
/* is a NOP */
} else if (cls0 == &ia32_reg_classes[CLASS_ia32_st]) {
*/
static void emit_ia32_Const(const ir_node *node)
{
- be_emit_cstring("\tmovl ");
- emit_ia32_Immediate(node);
- be_emit_cstring(", ");
- ia32_emit_dest_register(node, 0);
-
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tmovl %I, %D0\n");
}
/**
*/
static void emit_ia32_LdTls(const ir_node *node)
{
- be_emit_cstring("\tmovl %gs:0, ");
- ia32_emit_dest_register(node, 0);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tmovl %%gs:0, %D0\n");
}
/* helper function for emit_ia32_Minus64Bit */
static void emit_mov(const ir_node* node, const arch_register_t *src, const arch_register_t *dst)
{
- be_emit_cstring("\tmovl ");
- emit_register(src, NULL);
- be_emit_cstring(", ");
- emit_register(dst, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tmovl %R, %R\n", src, dst);
}
/* helper function for emit_ia32_Minus64Bit */
static void emit_neg(const ir_node* node, const arch_register_t *reg)
{
- be_emit_cstring("\tnegl ");
- emit_register(reg, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tnegl %R\n", reg);
}
/* helper function for emit_ia32_Minus64Bit */
static void emit_sbb0(const ir_node* node, const arch_register_t *reg)
{
- be_emit_cstring("\tsbbl $0, ");
- emit_register(reg, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tsbbl $0, %R\n", reg);
}
/* helper function for emit_ia32_Minus64Bit */
static void emit_sbb(const ir_node* node, const arch_register_t *src, const arch_register_t *dst)
{
- be_emit_cstring("\tsbbl ");
- emit_register(src, NULL);
- be_emit_cstring(", ");
- emit_register(dst, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tsbbl %R, %R\n", src, dst);
}
/* helper function for emit_ia32_Minus64Bit */
static void emit_xchg(const ir_node* node, const arch_register_t *src, const arch_register_t *dst)
{
- be_emit_cstring("\txchgl ");
- emit_register(src, NULL);
- be_emit_cstring(", ");
- emit_register(dst, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\txchgl %R, %R\n", src, dst);
}
/* helper function for emit_ia32_Minus64Bit */
static void emit_zero(const ir_node* node, const arch_register_t *reg)
{
- be_emit_cstring("\txorl ");
- emit_register(reg, NULL);
- be_emit_cstring(", ");
- emit_register(reg, NULL);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\txorl %R, %R\n", reg, reg);
}
static void emit_ia32_Minus64Bit(const ir_node *node)
static void emit_ia32_GetEIP(const ir_node *node)
{
- be_emit_cstring("\tcall ");
- be_emit_string(pic_base_label);
- be_emit_finish_line_gas(node);
+ ia32_emitf(node, "\tcall %s\n", pic_base_label);
+ ia32_emitf(NULL, "%s:\n", pic_base_label);
+ ia32_emitf(node, "\tpopl %D0\n");
+}
- be_emit_string(pic_base_label);
- be_emit_cstring(":\n");
- be_emit_write_line();
+static void emit_ia32_ClimbFrame(const ir_node *node)
+{
+ const ia32_climbframe_attr_t *attr = get_ia32_climbframe_attr_const(node);
- be_emit_cstring("\tpopl ");
- ia32_emit_dest_register(node, 0);
- be_emit_char('\n');
- be_emit_write_line();
+ ia32_emitf(node, "\tmovl %S0, %D0\n");
+ ia32_emitf(node, "\tmovl $%u, %S1\n", attr->count);
+ ia32_emitf(NULL, BLOCK_PREFIX "%ld:\n", get_irn_node_nr(node));
+ ia32_emitf(node, "\tmovl (%D0), %D0\n");
+ ia32_emitf(node, "\tdec %S1\n");
+ ia32_emitf(node, "\tjnz " BLOCK_PREFIX "%ld\n", get_irn_node_nr(node));
}
static void emit_be_Return(const ir_node *node)
{
- unsigned pop;
- be_emit_cstring("\tret");
+ unsigned pop = be_Return_get_pop(node);
- pop = be_Return_get_pop(node);
if (pop > 0 || be_Return_get_emit_pop(node)) {
- be_emit_irprintf(" $%d", pop);
+ ia32_emitf(node, "\tret $%u\n", pop);
+ } else {
+ ia32_emitf(node, "\tret\n");
}
- be_emit_finish_line_gas(node);
}
static void emit_Nothing(const ir_node *node)
ia32_register_spec_emitters();
/* other ia32 emitter functions */
+ IA32_EMIT2(Conv_I2I8Bit, Conv_I2I);
IA32_EMIT(Asm);
IA32_EMIT(CMov);
- IA32_EMIT(IMul);
- IA32_EMIT(SwitchJmp);
- IA32_EMIT(CopyB);
- IA32_EMIT(CopyB_i);
- IA32_EMIT(Conv_I2FP);
- IA32_EMIT(Conv_FP2I);
+ IA32_EMIT(Call);
+ IA32_EMIT(Const);
IA32_EMIT(Conv_FP2FP);
+ IA32_EMIT(Conv_FP2I);
+ IA32_EMIT(Conv_I2FP);
IA32_EMIT(Conv_I2I);
- IA32_EMIT2(Conv_I2I8Bit, Conv_I2I);
- IA32_EMIT(Const);
+ IA32_EMIT(CopyB);
+ IA32_EMIT(CopyB_i);
+ IA32_EMIT(GetEIP);
+ IA32_EMIT(IMul);
+ IA32_EMIT(Jcc);
IA32_EMIT(LdTls);
IA32_EMIT(Minus64Bit);
- IA32_EMIT(Jcc);
- IA32_EMIT(GetEIP);
+ IA32_EMIT(SwitchJmp);
+ IA32_EMIT(ClimbFrame);
/* benode emitter */
- BE_EMIT(Call);
- BE_EMIT(IncSP);
BE_EMIT(Copy);
BE_EMIT(CopyKeep);
+ BE_EMIT(IncSP);
BE_EMIT(Perm);
BE_EMIT(Return);
- BE_IGN(RegParams);
BE_IGN(Barrier);
BE_IGN(Keep);
+ BE_IGN(RegParams);
/* firm emitter */
EMIT(Jmp);
- IGN(Proj);
IGN(Phi);
IGN(Start);
typedef void (*emit_func_ptr) (const ir_node *);
+/**
+ * Assign and emit an exception label if the current instruction can fail.
+ */
+static void ia32_assign_exc_label(ir_node *node)
+{
+ /* assign a new ID to the instruction */
+ set_ia32_exc_label_id(node, ++exc_label_id);
+ /* print it */
+ ia32_emit_exc_label(node);
+ be_emit_char(':');
+ be_emit_pad_comment();
+ be_emit_cstring("/* exception to Block ");
+ ia32_emit_cfop_target(node);
+ be_emit_cstring(" */\n");
+ be_emit_write_line();
+}
+
/**
* Emits code for a node.
*/
}
if (mark_spill_reload) {
if (is_ia32_is_spill(node)) {
- be_emit_cstring("\txchg %ebx, %ebx /* spill mark */\n");
- be_emit_write_line();
+ ia32_emitf(NULL, "\txchg %ebx, %ebx /* spill mark */\n");
}
if (is_ia32_is_reload(node)) {
- be_emit_cstring("\txchg %edx, %edx /* reload mark */\n");
- be_emit_write_line();
+ ia32_emitf(NULL, "\txchg %edx, %edx /* reload mark */\n");
}
if (is_ia32_is_remat(node)) {
- be_emit_cstring("\txchg %ecx, %ecx /* remat mark */\n");
- be_emit_write_line();
+ ia32_emitf(NULL, "\txchg %ecx, %ecx /* remat mark */\n");
}
}
}
*/
static void ia32_emit_alignment(unsigned align, unsigned skip)
{
- be_emit_cstring("\t.p2align ");
- be_emit_irprintf("%u,,%u\n", align, skip);
- be_emit_write_line();
+ ia32_emitf(NULL, "\t.p2align %u,,%u\n", align, skip);
}
/**
int i, arity;
ir_exec_freq *exec_freq = cg->birg->exec_freq;
- if (block == get_irg_end_block(irg) || block == get_irg_start_block(irg))
+ if (block == get_irg_end_block(irg))
return;
if (ia32_cg_config.label_alignment > 0) {
/* emit list of pred blocks in comment */
arity = get_irn_arity(block);
- for (i = 0; i < arity; ++i) {
- ir_node *predblock = get_Block_cfgpred_block(block, i);
- be_emit_irprintf(" %d", get_irn_node_nr(predblock));
+ if (arity <= 0) {
+ be_emit_cstring(" none");
+ } else {
+ for (i = 0; i < arity; ++i) {
+ ir_node *predblock = get_Block_cfgpred_block(block, i);
+ be_emit_irprintf(" %d", get_irn_node_nr(predblock));
+ }
}
if (exec_freq != NULL) {
- be_emit_irprintf(" freq: %f",
+ be_emit_irprintf(", freq: %f",
get_block_execfreq(exec_freq, block));
}
be_emit_cstring(" */\n");
}
}
-/**
- * Assign and emit an exception label if the current instruction can fail.
- */
-void ia32_assign_exc_label(ir_node *node)
-{
- if (get_ia32_exc_label(node)) {
- /* assign a new ID to the instruction */
- set_ia32_exc_label_id(node, ++exc_label_id);
- /* print it */
- ia32_emit_exc_label(node);
- be_emit_char(':');
- be_emit_pad_comment();
- be_emit_cstring("/* exception to Block ");
- ia32_emit_cfop_target(node);
- be_emit_cstring(" */\n");
- be_emit_write_line();
- }
-}
-
/**
* Compare two exception_entries.
*/
int i, n;
cg = ia32_cg;
- isa = (const ia32_isa_t*) cg->arch_env;
- arch_env = cg->arch_env;
+ isa = cg->isa;
do_pic = cg->birg->main_env->options->pic;
ia32_register_emitters();
projects / libfirm / blobdiff