* @file
* @brief This file implements the ia32 node emitter.
* @author Christian Wuerdig, Matthias Braun
- * @version $Id$
*
* Summary table for x86 floatingpoint compares:
* (remember effect of unordered on x86: ZF=1, PF=1, CF=1)
#include "raw_bitset.h"
#include "dbginfo.h"
#include "lc_opts.h"
+#include "ircons.h"
-#include "../besched.h"
-#include "../benode.h"
-#include "../beabi.h"
-#include "../be_dbgout.h"
-#include "../beemitter.h"
-#include "../begnuas.h"
-#include "../beirg.h"
-#include "../be_dbgout.h"
+#include "besched.h"
+#include "benode.h"
+#include "beabi.h"
+#include "be_dbgout.h"
+#include "beemitter.h"
+#include "begnuas.h"
+#include "beirg.h"
+#include "be_dbgout.h"
#include "ia32_emitter.h"
#include "ia32_common_transform.h"
int need_label = 1;
int n_cfgpreds = get_Block_n_cfgpreds(block);
- if (has_Block_entity(block))
+ if (get_Block_entity(block) != NULL)
return 1;
if (n_cfgpreds == 0) {
return need_label;
}
-/**
- * Returns the register at in position pos.
- */
-static const arch_register_t *get_in_reg(const ir_node *irn, int pos)
-{
- ir_node *op = get_irn_n(irn, pos);
- return arch_get_irn_register(op);
-}
-
/**
* Add a number to a prefix. This number will not be used a second time.
*/
void ia32_emit_source_register(const ir_node *node, int pos)
{
- const arch_register_t *reg = get_in_reg(node, pos);
+ const arch_register_t *reg = arch_get_irn_register_in(node, pos);
emit_register(reg, NULL);
}
return;
}
- reg = get_in_reg(node, pos);
+ reg = arch_get_irn_register_in(node, pos);
emit_8bit_register(reg);
}
void ia32_emit_8bit_high_source_register(const ir_node *node, int pos)
{
- const arch_register_t *reg = get_in_reg(node, pos);
+ const arch_register_t *reg = arch_get_irn_register_in(node, pos);
emit_8bit_register_high(reg);
}
return;
}
- reg = get_in_reg(node, pos);
+ reg = arch_get_irn_register_in(node, pos);
emit_16bit_register(reg);
}
void ia32_emit_dest_register(const ir_node *node, int pos)
{
- const arch_register_t *reg = arch_irn_get_register(node, pos);
+ const arch_register_t *reg = arch_get_irn_register_out(node, pos);
emit_register(reg, NULL);
}
void ia32_emit_dest_register_size(const ir_node *node, int pos)
{
- const arch_register_t *reg = arch_irn_get_register(node, pos);
+ const arch_register_t *reg = arch_get_irn_register_out(node, pos);
emit_register(reg, get_ia32_ls_mode(node));
}
void ia32_emit_8bit_dest_register(const ir_node *node, int pos)
{
- const arch_register_t *reg = arch_irn_get_register(node, pos);
+ const arch_register_t *reg = arch_get_irn_register_out(node, pos);
emit_register(reg, mode_Bu);
}
emit_ia32_Immediate(in);
} else {
const ir_mode *mode = get_ia32_ls_mode(node);
- const arch_register_t *reg = get_in_reg(node, pos);
+ const arch_register_t *reg = arch_get_irn_register_in(node, pos);
emit_register(reg, mode);
}
}
/* emit base */
if (has_base) {
- const arch_register_t *reg = get_in_reg(node, n_ia32_base);
+ const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_base);
emit_register(reg, NULL);
}
/* emit index + scale */
if (has_index) {
- const arch_register_t *reg = get_in_reg(node, n_ia32_index);
+ const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_index);
int scale;
be_emit_char(',');
emit_register(reg, NULL);
case 'D':
if (*fmt < '0' || '9' <= *fmt)
goto unknown;
- reg = arch_irn_get_register(node, *fmt++ - '0');
+ reg = arch_get_irn_register_out(node, *fmt++ - '0');
goto emit_R;
case 'I':
if (is_ia32_Immediate(imm)) {
goto emit_I;
} else {
- reg = get_in_reg(node, pos);
+ reg = arch_get_irn_register_in(node, pos);
goto emit_R;
}
}
static void emit_ia32_IMul(const ir_node *node)
{
ir_node *left = get_irn_n(node, n_ia32_IMul_left);
- const arch_register_t *out_reg = arch_irn_get_register(node, pn_ia32_IMul_res);
+ const arch_register_t *out_reg = arch_get_irn_register_out(node, pn_ia32_IMul_res);
/* do we need the 3-address form? */
if (is_ia32_NoReg_GP(left) ||
- get_in_reg(node, n_ia32_IMul_left) != out_reg) {
+ arch_get_irn_register_in(node, n_ia32_IMul_left) != out_reg) {
ia32_emitf(node, "\timul%M %#S4, %#AS3, %#D0\n");
} else {
ia32_emitf(node, "\timul%M %#AS4, %#S3\n");
*/
static void emit_ia32_Setcc(const ir_node *node)
{
- const arch_register_t *dreg = arch_irn_get_register(node, pn_ia32_Setcc_res);
+ const arch_register_t *dreg = arch_get_irn_register_out(node, pn_ia32_Setcc_res);
ia32_condition_code_t cc = get_ia32_condcode(node);
cc = determine_final_cc(node, n_ia32_Setcc_eflags, cc);
static void emit_ia32_CMovcc(const ir_node *node)
{
const ia32_attr_t *attr = get_ia32_attr_const(node);
- const arch_register_t *out = arch_irn_get_register(node, pn_ia32_res);
+ const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_res);
ia32_condition_code_t cc = get_ia32_condcode(node);
const arch_register_t *in_true;
const arch_register_t *in_false;
*/
static void emit_ia32_SwitchJmp(const ir_node *node)
{
- ir_entity *jump_table = get_ia32_am_sc(node);
- long default_pn = get_ia32_default_pn(node);
+ ir_entity *jump_table = get_ia32_am_sc(node);
+ const ir_switch_table *table = get_ia32_switch_table(node);
ia32_emitf(node, "\tjmp %*AM\n");
- emit_jump_table(node, default_pn, jump_table, get_cfop_target_block);
+ be_emit_jump_table(node, table, jump_table, get_cfop_target_block);
}
/**
/* get register */
if (asm_reg->use_input == 0) {
- reg = arch_irn_get_register(node, asm_reg->inout_pos);
+ reg = arch_get_irn_register_out(node, asm_reg->inout_pos);
} else {
ir_node *pred = get_irn_n(node, asm_reg->inout_pos);
emit_ia32_Immediate(pred);
return s;
}
- reg = get_in_reg(node, asm_reg->inout_pos);
+ reg = arch_get_irn_register_in(node, asm_reg->inout_pos);
}
if (reg == NULL) {
ir_fprintf(stderr,
panic("Invalid asm op modifier");
}
} else {
- emit_register(reg, asm_reg->mode);
+ emit_register(reg, asm_reg->memory ? mode_Iu : asm_reg->mode);
}
if (asm_reg->memory) {
if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
return;
- if (get_irn_mode(node) == mode_E) {
- ia32_emitf(node, "\tmovsd %R, %R\n", in, out);
- } else {
- ia32_emitf(node, "\tmovl %R, %R\n", in, out);
- }
+ ia32_emitf(node, "\tmovl %R, %R\n", in, out);
}
static void emit_be_Copy(const ir_node *node)
static void emit_ia32_Minus64Bit(const ir_node *node)
{
- const arch_register_t *in_lo = get_in_reg(node, 0);
- const arch_register_t *in_hi = get_in_reg(node, 1);
- const arch_register_t *out_lo = arch_irn_get_register(node, 0);
- const arch_register_t *out_hi = arch_irn_get_register(node, 1);
+ const arch_register_t *in_lo = arch_get_irn_register_in(node, 0);
+ const arch_register_t *in_hi = arch_get_irn_register_in(node, 1);
+ const arch_register_t *out_lo = arch_get_irn_register_out(node, 0);
+ const arch_register_t *out_hi = arch_get_irn_register_out(node, 1);
if (out_lo == in_lo) {
if (out_hi != in_hi) {
#define BE_IGN(a) op_be_##a->ops.generic = (op_func)emit_Nothing
/* first clear the generic function pointer for all ops */
- clear_irp_opcodes_generic_func();
+ ir_clear_opcodes_generic_func();
/* register all emitter functions defined in spec */
ia32_register_spec_emitters();
get_unique_label(pic_base_label, sizeof(pic_base_label), "PIC_BASE");
- be_dbg_method_begin(entity);
be_gas_emit_function_prolog(entity, ia32_cg_config.function_alignment);
/* we use links to point to target blocks */
}
be_gas_emit_function_epilog(entity);
- be_dbg_method_end();
- be_emit_char('\n');
- be_emit_write_line();
ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
if (get_ia32_op_type(node) == ia32_AddrModeS) {
bemit_mod_am(ruval, node);
} else {
- const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+ const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_binary_left);
bemit_modru(reg, ruval);
}
bemit8((unsigned char)attr->offset);
bemit8(opcode);
bemit_mod_am(ruval, node);
} else {
- const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+ const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_binary_left);
if (reg->index == REG_GP_EAX) {
bemit8(opcode_ax);
} else {
*/
static void bemit_binop_2(const ir_node *node, unsigned code)
{
- const arch_register_t *out = get_in_reg(node, n_ia32_binary_left);
+ const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_binary_left);
bemit8(code);
if (get_ia32_op_type(node) == ia32_Normal) {
- const arch_register_t *op2 = get_in_reg(node, n_ia32_binary_right);
+ const arch_register_t *op2 = arch_get_irn_register_in(node, n_ia32_binary_right);
bemit_modrr(op2, out);
} else {
bemit_mod_am(reg_gp_map[out->index], node);
{
bemit8(code);
if (get_ia32_op_type(node) == ia32_Normal) {
- const arch_register_t *in = get_in_reg(node, input);
+ const arch_register_t *in = arch_get_irn_register_in(node, input);
bemit_modru(in, ext);
} else {
bemit_mod_am(ext, node);
static void bemit_unop_reg(const ir_node *node, unsigned char code, int input)
{
- const arch_register_t *out = arch_irn_get_register(node, 0);
+ const arch_register_t *out = arch_get_irn_register_out(node, 0);
bemit_unop(node, code, reg_gp_map[out->index], input);
}
static void bemit_copy(const ir_node *copy)
{
- const arch_register_t *in = get_in_reg(copy, 0);
- const arch_register_t *out = arch_irn_get_register(copy, 0);
+ const arch_register_t *in = arch_get_irn_register_in(copy, 0);
+ const arch_register_t *out = arch_get_irn_register_out(copy, 0);
if (in == out)
return;
if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
return;
- if (get_irn_mode(copy) == mode_E) {
- panic("NIY");
- } else {
- assert(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_gp]);
- bemit8(0x8B);
- bemit_modrr(in, out);
- }
+ assert(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_gp]);
+ bemit8(0x8B);
+ bemit_modrr(in, out);
}
static void bemit_perm(const ir_node *node)
static void bemit_xor0(const ir_node *node)
{
- const arch_register_t *out = arch_irn_get_register(node, 0);
+ const arch_register_t *out = arch_get_irn_register_out(node, 0);
bemit8(0x31);
bemit_modrr(out, out);
}
static void bemit_mov_const(const ir_node *node)
{
- const arch_register_t *out = arch_irn_get_register(node, 0);
+ const arch_register_t *out = arch_get_irn_register_out(node, 0);
bemit8(0xB8 + reg_gp_map[out->index]);
bemit_immediate(node, false);
}
} \
} else { \
bemit8(ext << 3 | 1); \
- bemit_mod_am(reg_gp_map[arch_irn_get_register(val, 0)->index], node); \
+ bemit_mod_am(reg_gp_map[arch_get_irn_register_out(val, 0)->index], node); \
} \
} \
\
bemit8(get_ia32_immediate_attr_const(val)->offset); \
} else { \
bemit8(ext << 3); \
- bemit_mod_am(reg_gp_map[arch_irn_get_register(val, 0)->index], node); \
+ bemit_mod_am(reg_gp_map[arch_get_irn_register_out(val, 0)->index], node); \
} \
}
#define SHIFT(op, ext) \
static void bemit_##op(const ir_node *node) \
{ \
- const arch_register_t *out = arch_irn_get_register(node, 0); \
+ const arch_register_t *out = arch_get_irn_register_out(node, 0); \
ir_node *count = get_irn_n(node, 1); \
if (is_ia32_Immediate(count)) { \
int offset = get_ia32_immediate_attr_const(count)->offset; \
static void bemit_shld(const ir_node *node)
{
- const arch_register_t *in = get_in_reg(node, n_ia32_ShlD_val_low);
- const arch_register_t *out = arch_irn_get_register(node, pn_ia32_ShlD_res);
+ const arch_register_t *in = arch_get_irn_register_in(node, n_ia32_ShlD_val_low);
+ const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_ShlD_res);
ir_node *count = get_irn_n(node, n_ia32_ShlD_count);
bemit8(0x0F);
if (is_ia32_Immediate(count)) {
static void bemit_shrd(const ir_node *node)
{
- const arch_register_t *in = get_in_reg(node, n_ia32_ShrD_val_low);
- const arch_register_t *out = arch_irn_get_register(node, pn_ia32_ShrD_res);
+ const arch_register_t *in = arch_get_irn_register_in(node, n_ia32_ShrD_val_low);
+ const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_ShrD_res);
ir_node *count = get_irn_n(node, n_ia32_ShrD_count);
bemit8(0x0F);
if (is_ia32_Immediate(count)) {
*/
static void bemit_setcc(const ir_node *node)
{
- const arch_register_t *dreg = arch_irn_get_register(node, pn_ia32_Setcc_res);
+ const arch_register_t *dreg = arch_get_irn_register_out(node, pn_ia32_Setcc_res);
ia32_condition_code_t cc = get_ia32_condcode(node);
cc = determine_final_cc(node, n_ia32_Setcc_eflags, cc);
{
const ia32_attr_t *attr = get_ia32_attr_const(node);
int ins_permuted = attr->data.ins_permuted;
- const arch_register_t *out = arch_irn_get_register(node, pn_ia32_res);
+ const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_res);
ia32_condition_code_t cc = get_ia32_condcode(node);
const arch_register_t *in_true;
const arch_register_t *in_false;
if (get_ia32_op_type(node) == ia32_AddrModeS) {
bemit_mod_am(7, node);
} else {
- const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+ const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_binary_left);
bemit_modru(reg, 7);
}
bemit8((unsigned char)attr->offset);
bemit8(0x81);
bemit_mod_am(7, node);
} else {
- const arch_register_t *reg = get_in_reg(node, n_ia32_binary_left);
+ const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_binary_left);
if (reg->index == REG_GP_EAX) {
bemit8(0x3D);
} else {
}
panic("invalid imm size?!?");
} else {
- const arch_register_t *out = get_in_reg(node, n_ia32_binary_left);
+ const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_binary_left);
bemit8(0x3B);
if (get_ia32_op_type(node) == ia32_Normal) {
- const arch_register_t *op2 = get_in_reg(node, n_ia32_binary_right);
+ const arch_register_t *op2 = arch_get_irn_register_in(node, n_ia32_binary_right);
bemit_modrr(op2, out);
} else {
bemit_mod_am(reg_gp_map[out->index], node);
ir_node *right = get_irn_n(node, n_ia32_binary_right);
if (is_ia32_Immediate(right)) {
if (get_ia32_op_type(node) == ia32_Normal) {
- const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left);
+ const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_Cmp_left);
if (out->index == REG_GP_EAX) {
bemit8(0x3C);
} else {
}
bemit8(get_ia32_immediate_attr_const(right)->offset);
} else {
- const arch_register_t *out = get_in_reg(node, n_ia32_Cmp_left);
+ const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_Cmp_left);
bemit8(0x3A);
if (get_ia32_op_type(node) == ia32_Normal) {
- const arch_register_t *in = get_in_reg(node, n_ia32_Cmp_right);
+ const arch_register_t *in = arch_get_irn_register_in(node, n_ia32_Cmp_right);
bemit_modrr(out, in);
} else {
bemit_mod_am(reg_gp_map[out->index], node);
ir_node *right = get_irn_n(node, n_ia32_Test8Bit_right);
if (is_ia32_Immediate(right)) {
if (get_ia32_op_type(node) == ia32_Normal) {
- const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left);
+ const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_Test8Bit_left);
if (out->index == REG_GP_EAX) {
bemit8(0xA8);
} else {
}
bemit8(get_ia32_immediate_attr_const(right)->offset);
} else {
- const arch_register_t *out = get_in_reg(node, n_ia32_Test8Bit_left);
+ const arch_register_t *out = arch_get_irn_register_in(node, n_ia32_Test8Bit_left);
bemit8(0x84);
if (get_ia32_op_type(node) == ia32_Normal) {
- const arch_register_t *in = get_in_reg(node, n_ia32_Test8Bit_right);
+ const arch_register_t *in = arch_get_irn_register_in(node, n_ia32_Test8Bit_right);
bemit_modrr(out, in);
} else {
bemit_mod_am(reg_gp_map[out->index], node);
static void bemit_dec(const ir_node *node)
{
- const arch_register_t *out = arch_irn_get_register(node, pn_ia32_Dec_res);
+ const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_Dec_res);
bemit8(0x48 + reg_gp_map[out->index]);
}
static void bemit_inc(const ir_node *node)
{
- const arch_register_t *out = arch_irn_get_register(node, pn_ia32_Inc_res);
+ const arch_register_t *out = arch_get_irn_register_out(node, pn_ia32_Inc_res);
bemit8(0x40 + reg_gp_map[out->index]);
}
static void bemit_ldtls(const ir_node *node)
{
- const arch_register_t *out = arch_irn_get_register(node, 0);
+ const arch_register_t *out = arch_get_irn_register_out(node, 0);
bemit8(0x65); // gs:
if (out->index == REG_GP_EAX) {
*/
static void bemit_lea(const ir_node *node)
{
- const arch_register_t *out = arch_irn_get_register(node, 0);
+ const arch_register_t *out = arch_get_irn_register_out(node, 0);
bemit8(0x8D);
bemit_mod_am(reg_gp_map[out->index], node);
}
static void bemit_minus64bit(const ir_node *node)
{
- const arch_register_t *in_lo = get_in_reg(node, 0);
- const arch_register_t *in_hi = get_in_reg(node, 1);
- const arch_register_t *out_lo = arch_irn_get_register(node, 0);
- const arch_register_t *out_hi = arch_irn_get_register(node, 1);
+ const arch_register_t *in_lo = arch_get_irn_register_in(node, 0);
+ const arch_register_t *in_hi = arch_get_irn_register_in(node, 1);
+ const arch_register_t *out_lo = arch_get_irn_register_out(node, 0);
+ const arch_register_t *out_hi = arch_get_irn_register_out(node, 1);
if (out_lo == in_lo) {
if (out_hi != in_hi) {
*/
static void bemit_load(const ir_node *node)
{
- const arch_register_t *out = arch_irn_get_register(node, 0);
+ const arch_register_t *out = arch_get_irn_register_out(node, 0);
if (out->index == REG_GP_EAX) {
ir_node *base = get_irn_n(node, n_ia32_base);
bemit_immediate(value, false);
}
} else {
- const arch_register_t *in = get_in_reg(node, n_ia32_Store_val);
+ const arch_register_t *in = arch_get_irn_register_in(node, n_ia32_Store_val);
if (in->index == REG_GP_EAX) {
ir_node *base = get_irn_n(node, n_ia32_base);
bemit8(0xFF);
bemit_mod_am(6, node);
} else {
- const arch_register_t *reg = get_in_reg(node, n_ia32_Push_val);
+ const arch_register_t *reg = arch_get_irn_register_in(node, n_ia32_Push_val);
bemit8(0x50 + reg_gp_map[reg->index]);
}
}
*/
static void bemit_pop(const ir_node *node)
{
- const arch_register_t *reg = arch_irn_get_register(node, pn_ia32_Pop_res);
+ const arch_register_t *reg = arch_get_irn_register_out(node, pn_ia32_Pop_res);
bemit8(0x58 + reg_gp_map[reg->index]);
}
static void bemit_switchjmp(const ir_node *node)
{
- ir_entity *jump_table = get_ia32_am_sc(node);
- long default_pn = get_ia32_default_pn(node);
+ ir_entity *jump_table = get_ia32_am_sc(node);
+ const ir_switch_table *table = get_ia32_switch_table(node);
bemit8(0xFF); // jmp *tbl.label(,%in,4)
bemit_mod_am(0x05, node);
- emit_jump_table(node, default_pn, jump_table, get_cfop_target_block);
+ be_emit_jump_table(node, table, jump_table, get_cfop_target_block);
}
/**
bemit_sub(node);
/* mov %esp, %out */
bemit8(0x8B);
- out = arch_irn_get_register(node, 1);
+ out = arch_get_irn_register_out(node, 1);
bemit8(MOD_REG | ENC_REG(reg_gp_map[out->index]) | ENC_RM(0x04));
}
size = get_signed_imm_size(offs);
bemit8(size == 1 ? 0x83 : 0x81);
- reg = arch_irn_get_register(node, 0);
+ reg = arch_get_irn_register_out(node, 0);
bemit_modru(reg, ext);
if (size == 1) {
static void ia32_register_binary_emitters(void)
{
/* first clear the generic function pointer for all ops */
- clear_irp_opcodes_generic_func();
+ ir_clear_opcodes_generic_func();
/* benode emitter */
register_emitter(op_be_Copy, bemit_copy);
}
be_gas_emit_function_epilog(entity);
- be_dbg_method_end();
- be_emit_char('\n');
- be_emit_write_line();
ir_free_resources(irg, IR_RESOURCE_IRN_LINK);
}
projects / libfirm / blobdiff